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amd-xgbe: Checkpatch driver fixes

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This patch contains fixes identified by checkpatch when run with the
strict option.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Lendacky, Thomas 2014-09-03 12:14:33 -05:00 • committed by David S. Miller
parent e6f0562ff4
commit a2ea14d772
11 changed files with 2 additions and 26 deletions
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11
drivers/net/ethernet/amd/xgbe/xgbe-common.h
View file

@ -271,7 +271,6 @@
#define DMA_PBL_X8_DISABLE 0x00 #define DMA_PBL_X8_DISABLE 0x00
#define DMA_PBL_X8_ENABLE 0x01 #define DMA_PBL_X8_ENABLE 0x01
/* MAC register offsets */ /* MAC register offsets */
#define MAC_TCR 0x0000 #define MAC_TCR 0x0000
#define MAC_RCR 0x0004 #define MAC_RCR 0x0004
@ -792,7 +791,6 @@
#define MTL_Q_DISABLED 0x00 #define MTL_Q_DISABLED 0x00
#define MTL_Q_ENABLED 0x02 #define MTL_Q_ENABLED 0x02
/* MTL traffic class register offsets /* MTL traffic class register offsets
* Multiple traffic classes can be active. The first class has registers * Multiple traffic classes can be active. The first class has registers
* that begin at 0x1100. Each subsequent queue has registers that * that begin at 0x1100. Each subsequent queue has registers that
@ -815,7 +813,6 @@
#define MTL_TSA_SP 0x00 #define MTL_TSA_SP 0x00
#define MTL_TSA_ETS 0x02 #define MTL_TSA_ETS 0x02
/* PCS MMD select register offset /* PCS MMD select register offset
* The MMD select register is used for accessing PCS registers * The MMD select register is used for accessing PCS registers
* when the underlying APB3 interface is using indirect addressing. * when the underlying APB3 interface is using indirect addressing.
@ -825,7 +822,6 @@
*/ */
#define PCS_MMD_SELECT 0xff #define PCS_MMD_SELECT 0xff
/* Descriptor/Packet entry bit positions and sizes */ /* Descriptor/Packet entry bit positions and sizes */
#define RX_PACKET_ERRORS_CRC_INDEX 2 #define RX_PACKET_ERRORS_CRC_INDEX 2
#define RX_PACKET_ERRORS_CRC_WIDTH 1 #define RX_PACKET_ERRORS_CRC_WIDTH 1
@ -929,7 +925,6 @@
#define MDIO_AN_COMP_STAT 0x0030 #define MDIO_AN_COMP_STAT 0x0030
#endif #endif
/* Bit setting and getting macros /* Bit setting and getting macros
* The get macro will extract the current bit field value from within * The get macro will extract the current bit field value from within
* the variable * the variable
@ -957,7 +952,6 @@ do { \
((0x1 << (_width)) - 1)) << (_index))); \ ((0x1 << (_width)) - 1)) << (_index))); \
} while (0) } while (0)
/* Bit setting and getting macros based on register fields /* Bit setting and getting macros based on register fields
* The get macro uses the bit field definitions formed using the input * The get macro uses the bit field definitions formed using the input
* names to extract the current bit field value from within the * names to extract the current bit field value from within the
@ -986,7 +980,6 @@ do { \
_prefix##_##_field##_INDEX, \ _prefix##_##_field##_INDEX, \
_prefix##_##_field##_WIDTH, (_val)) _prefix##_##_field##_WIDTH, (_val))
/* Macros for reading or writing registers /* Macros for reading or writing registers
* The ioread macros will get bit fields or full values using the * The ioread macros will get bit fields or full values using the
* register definitions formed using the input names * register definitions formed using the input names
@ -1014,7 +1007,6 @@ do { \
XGMAC_IOWRITE((_pdata), _reg, reg_val); \ XGMAC_IOWRITE((_pdata), _reg, reg_val); \
} while (0) } while (0)
/* Macros for reading or writing MTL queue or traffic class registers /* Macros for reading or writing MTL queue or traffic class registers
* Similar to the standard read and write macros except that the * Similar to the standard read and write macros except that the
* base register value is calculated by the queue or traffic class number * base register value is calculated by the queue or traffic class number
@ -1041,7 +1033,6 @@ do { \
XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \ XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \
} while (0) } while (0)
/* Macros for reading or writing DMA channel registers /* Macros for reading or writing DMA channel registers
* Similar to the standard read and write macros except that the * Similar to the standard read and write macros except that the
* base register value is obtained from the ring * base register value is obtained from the ring
@ -1066,7 +1057,6 @@ do { \
XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \ XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
} while (0) } while (0)
/* Macros for building, reading or writing register values or bits /* Macros for building, reading or writing register values or bits
* within the register values of XPCS registers. * within the register values of XPCS registers.
*/ */
@ -1076,7 +1066,6 @@ do { \
#define XPCS_IOREAD(_pdata, _off) \ #define XPCS_IOREAD(_pdata, _off) \
ioread32((_pdata)->xpcs_regs + (_off)) ioread32((_pdata)->xpcs_regs + (_off))
/* Macros for building, reading or writing register values or bits /* Macros for building, reading or writing register values or bits
* using MDIO. Different from above because of the use of standardized * using MDIO. Different from above because of the use of standardized
* Linux include values. No shifting is performed with the bit * Linux include values. No shifting is performed with the bit

1
drivers/net/ethernet/amd/xgbe/xgbe-dcb.c
View file

@ -120,7 +120,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static int xgbe_dcb_ieee_getets(struct net_device *netdev, static int xgbe_dcb_ieee_getets(struct net_device *netdev,
struct ieee_ets *ets) struct ieee_ets *ets)
{ {

1
drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c
View file

@ -121,7 +121,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static ssize_t xgbe_common_read(char __user *buffer, size_t count, static ssize_t xgbe_common_read(char __user *buffer, size_t count,
loff_t *ppos, unsigned int value) loff_t *ppos, unsigned int value)
{ {

6
drivers/net/ethernet/amd/xgbe/xgbe-desc.c
View file

@ -117,7 +117,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static void xgbe_unmap_skb(struct xgbe_prv_data *, struct xgbe_ring_data *); static void xgbe_unmap_skb(struct xgbe_prv_data *, struct xgbe_ring_data *);
static void xgbe_free_ring(struct xgbe_prv_data *pdata, static void xgbe_free_ring(struct xgbe_prv_data *pdata,
@ -524,11 +523,8 @@ static void xgbe_realloc_skb(struct xgbe_channel *channel)
/* Allocate skb & assign to each rdesc */ /* Allocate skb & assign to each rdesc */
skb = dev_alloc_skb(pdata->rx_buf_size); skb = dev_alloc_skb(pdata->rx_buf_size);
if (skb == NULL) { if (skb == NULL)
netdev_alert(pdata->netdev,
"failed to allocate skb\n");
break; break;
}
skb_dma = dma_map_single(pdata->dev, skb->data, skb_dma = dma_map_single(pdata->dev, skb->data,
pdata->rx_buf_size, DMA_FROM_DEVICE); pdata->rx_buf_size, DMA_FROM_DEVICE);
if (dma_mapping_error(pdata->dev, skb_dma)) { if (dma_mapping_error(pdata->dev, skb_dma)) {

1
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
View file

@ -122,7 +122,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata, static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
unsigned int usec) unsigned int usec)
{ {

1
drivers/net/ethernet/amd/xgbe/xgbe-drv.c
View file

@ -126,7 +126,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static int xgbe_poll(struct napi_struct *, int); static int xgbe_poll(struct napi_struct *, int);
static void xgbe_set_rx_mode(struct net_device *); static void xgbe_set_rx_mode(struct net_device *);

2
drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
View file

@ -121,7 +121,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
struct xgbe_stats { struct xgbe_stats {
char stat_string[ETH_GSTRING_LEN]; char stat_string[ETH_GSTRING_LEN];
int stat_size; int stat_size;
@ -173,6 +172,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {
XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror), XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),
XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes), XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),
}; };
#define XGBE_STATS_COUNT ARRAY_SIZE(xgbe_gstring_stats) #define XGBE_STATS_COUNT ARRAY_SIZE(xgbe_gstring_stats)
static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data) static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)

1
drivers/net/ethernet/amd/xgbe/xgbe-main.c
View file

@ -128,7 +128,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
MODULE_LICENSE("Dual BSD/GPL"); MODULE_LICENSE("Dual BSD/GPL");
MODULE_VERSION(XGBE_DRV_VERSION); MODULE_VERSION(XGBE_DRV_VERSION);

1
drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
View file

@ -123,7 +123,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg) static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg)
{ {
struct xgbe_prv_data *pdata = mii->priv; struct xgbe_prv_data *pdata = mii->priv;

1
drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
View file

@ -122,7 +122,6 @@
#include "xgbe.h" #include "xgbe.h"
#include "xgbe-common.h" #include "xgbe-common.h"
static cycle_t xgbe_cc_read(const struct cyclecounter *cc) static cycle_t xgbe_cc_read(const struct cyclecounter *cc)
{ {
struct xgbe_prv_data *pdata = container_of(cc, struct xgbe_prv_data *pdata = container_of(cc,

2
drivers/net/ethernet/amd/xgbe/xgbe.h
View file

@ -128,7 +128,6 @@
#include <linux/net_tstamp.h> #include <linux/net_tstamp.h>
#include <net/dcbnl.h> #include <net/dcbnl.h>
#define XGBE_DRV_NAME "amd-xgbe" #define XGBE_DRV_NAME "amd-xgbe"
#define XGBE_DRV_VERSION "1.0.0-a" #define XGBE_DRV_VERSION "1.0.0-a"
#define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver" #define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver"
@ -198,7 +197,6 @@
((_ring)->rdata + \ ((_ring)->rdata + \
((_idx) & ((_ring)->rdesc_count - 1))) ((_idx) & ((_ring)->rdesc_count - 1)))
/* Default coalescing parameters */ /* Default coalescing parameters */
#define XGMAC_INIT_DMA_TX_USECS 50 #define XGMAC_INIT_DMA_TX_USECS 50
#define XGMAC_INIT_DMA_TX_FRAMES 25 #define XGMAC_INIT_DMA_TX_FRAMES 25