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powerpc/booke64: Use SPRG_TLB_EXFRAME on bolted handlers

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While bolted handlers (including e6500) do not need to deal with a TLB
miss recursively causing another TLB miss, nested TLB misses can still
happen with crit/mc/debug exceptions -- so we still need to honor
SPRG_TLB_EXFRAME.

We don't need to spend time modifying it in the TLB miss fastpath,
though -- the special level exception will handle that.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Mihai Caraman <mihai.caraman@freescale.com>
Cc: kvm-ppc@vger.kernel.org
This commit is contained in:
Scott Wood 2014-03-10 17:29:38 -05:00
parent 9d378dfac8
commit a3dc620743
4 changed files with 42 additions and 31 deletions
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10
arch/powerpc/include/asm/exception-64e.h
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@ -172,16 +172,6 @@ exc_##label##_book3e:
ld r9,EX_TLB_R9(r12); \
ld r8,EX_TLB_R8(r12); \
mtlr r16;
#define TLB_MISS_PROLOG_STATS_BOLTED \
mflr r10; \
std r8,PACA_EXTLB+EX_TLB_R8(r13); \
std r9,PACA_EXTLB+EX_TLB_R9(r13); \
std r10,PACA_EXTLB+EX_TLB_LR(r13);
#define TLB_MISS_RESTORE_STATS_BOLTED \
ld r16,PACA_EXTLB+EX_TLB_LR(r13); \
ld r9,PACA_EXTLB+EX_TLB_R9(r13); \
ld r8,PACA_EXTLB+EX_TLB_R8(r13); \
mtlr r16;
#define TLB_MISS_STATS_D(name) \
addi r9,r13,MMSTAT_DSTATS+name; \
bl .tlb_stat_inc;