GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-06-28 17:41:50 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/amd/display: Fix some more color indentations

Browse source 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2017-10-31 16:27:59 -04:00 • committed by Alex Deucher
parent efd5220405
commit a6114e854c
4 changed files with 36 additions and 61 deletions
Download patch file Download diff file Expand all files Collapse all files

11
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View file

@ -2142,6 +2142,7 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream,
const struct drm_connector *connector)
{
struct dc_crtc_timing *timing_out = &stream->timing;
struct dc_transfer_func *tf = dc_create_transfer_func();
memset(timing_out, 0, sizeof(struct dc_crtc_timing));
@ -2185,13 +2186,9 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream,
stream->output_color_space = get_output_color_space(timing_out);
{
struct dc_transfer_func *tf = dc_create_transfer_func();
tf->type = TF_TYPE_PREDEFINED;
tf->tf = TRANSFER_FUNCTION_SRGB;
stream->out_transfer_func = tf;
}
tf->type = TF_TYPE_PREDEFINED;
tf->tf = TRANSFER_FUNCTION_SRGB;
stream->out_transfer_func = tf;
}
static void fill_audio_info(struct audio_info *audio_info,

7
drivers/gpu/drm/amd/display/dc/core/dc.c
View file

@ -1376,10 +1376,9 @@ static void commit_planes_for_stream(struct dc *dc,
continue;
/* work around to program degamma regs for split pipe after set mode. */
if (srf_updates[i].in_transfer_func || (pipe_ctx->top_pipe &&
pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state))
dc->hwss.set_input_transfer_func(
pipe_ctx, pipe_ctx->plane_state);
if (srf_updates[i].in_transfer_func ||
(pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state))
dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
}
}

35
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View file

@ -257,9 +257,9 @@ static void build_prescale_params(struct ipp_prescale_params *prescale_params,
}
}
static bool dce110_set_input_transfer_func(
struct pipe_ctx *pipe_ctx,
const struct dc_plane_state *plane_state)
static bool
dce110_set_input_transfer_func(struct pipe_ctx *pipe_ctx,
const struct dc_plane_state *plane_state)
{
struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp;
const struct dc_transfer_func *tf = NULL;
@ -280,25 +280,19 @@ static bool dce110_set_input_transfer_func(
if (tf == NULL) {
/* Default case if no input transfer function specified */
ipp->funcs->ipp_set_degamma(ipp,
IPP_DEGAMMA_MODE_HW_sRGB);
ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB);
} else if (tf->type == TF_TYPE_PREDEFINED) {
switch (tf->tf) {
case TRANSFER_FUNCTION_SRGB:
ipp->funcs->ipp_set_degamma(ipp,
IPP_DEGAMMA_MODE_HW_sRGB);
ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB);
break;
case TRANSFER_FUNCTION_BT709:
ipp->funcs->ipp_set_degamma(ipp,
IPP_DEGAMMA_MODE_HW_xvYCC);
ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC);
break;
case TRANSFER_FUNCTION_LINEAR:
ipp->funcs->ipp_set_degamma(ipp,
IPP_DEGAMMA_MODE_BYPASS);
ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);
break;
case TRANSFER_FUNCTION_PQ:
result = false;
break;
default:
result = false;
break;
@ -640,9 +634,9 @@ static bool dce110_translate_regamma_to_hw_format(const struct dc_transfer_func
return true;
}
static bool dce110_set_output_transfer_func(
struct pipe_ctx *pipe_ctx,
const struct dc_stream_state *stream)
static bool
dce110_set_output_transfer_func(struct pipe_ctx *pipe_ctx,
const struct dc_stream_state *stream)
{
struct transform *xfm = pipe_ctx->plane_res.xfm;
@ -2756,8 +2750,7 @@ static void dce110_program_front_end_for_pipe(
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
struct xfm_grph_csc_adjustment adjust;
struct out_csc_color_matrix tbl_entry;
struct pipe_ctx *cur_pipe_ctx =
&dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx];
struct pipe_ctx *cur_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx];
unsigned int i;
memset(&tbl_entry, 0, sizeof(tbl_entry));
@ -2850,10 +2843,8 @@ static void dce110_program_front_end_for_pipe(
/* Moved programming gamma from dc to hwss */
if (cur_pipe_ctx->plane_state != pipe_ctx->plane_state) {
dc->hwss.set_input_transfer_func(
pipe_ctx, pipe_ctx->plane_state);
dc->hwss.set_output_transfer_func(
pipe_ctx, pipe_ctx->stream);
dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
}
dm_logger_write(dc->ctx->logger, LOG_SURFACE,

44
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View file

@ -874,8 +874,8 @@ static void dcn10_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_c
pipe_ctx->plane_state->address.grph_stereo.left_addr = addr;
}
static bool dcn10_set_input_transfer_func(
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
static bool dcn10_set_input_transfer_func(struct pipe_ctx *pipe_ctx,
const struct dc_plane_state *plane_state)
{
struct dpp *dpp_base = pipe_ctx->plane_res.dpp;
const struct dc_transfer_func *tf = NULL;
@ -888,28 +888,22 @@ static bool dcn10_set_input_transfer_func(
tf = plane_state->in_transfer_func;
if (plane_state->gamma_correction && dce_use_lut(plane_state))
dpp_base->funcs->dpp_program_input_lut(dpp_base,
plane_state->gamma_correction);
dpp_base->funcs->dpp_program_input_lut(dpp_base, plane_state->gamma_correction);
if (tf == NULL)
dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
else if (tf->type == TF_TYPE_PREDEFINED) {
switch (tf->tf) {
case TRANSFER_FUNCTION_SRGB:
dpp_base->funcs->dpp_set_degamma(dpp_base,
IPP_DEGAMMA_MODE_HW_sRGB);
dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_sRGB);
break;
case TRANSFER_FUNCTION_BT709:
dpp_base->funcs->dpp_set_degamma(dpp_base,
IPP_DEGAMMA_MODE_HW_xvYCC);
dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_xvYCC);
break;
case TRANSFER_FUNCTION_LINEAR:
dpp_base->funcs->dpp_set_degamma(dpp_base,
IPP_DEGAMMA_MODE_BYPASS);
dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
break;
case TRANSFER_FUNCTION_PQ:
result = false;
break;
default:
result = false;
break;
@ -1238,9 +1232,9 @@ static bool dcn10_translate_regamma_to_hw_format(const struct dc_transfer_func
return true;
}
static bool dcn10_set_output_transfer_func(
struct pipe_ctx *pipe_ctx,
const struct dc_stream_state *stream)
static bool
dcn10_set_output_transfer_func(struct pipe_ctx *pipe_ctx,
const struct dc_stream_state *stream)
{
struct dpp *dpp = pipe_ctx->plane_res.dpp;
@ -1250,17 +1244,13 @@ static bool dcn10_set_output_transfer_func(
dpp->regamma_params.hw_points_num = GAMMA_HW_POINTS_NUM;
if (stream->out_transfer_func &&
stream->out_transfer_func->type ==
TF_TYPE_PREDEFINED &&
stream->out_transfer_func->tf ==
TRANSFER_FUNCTION_SRGB) {
stream->out_transfer_func->type == TF_TYPE_PREDEFINED &&
stream->out_transfer_func->tf == TRANSFER_FUNCTION_SRGB)
dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_SRGB);
} else if (dcn10_translate_regamma_to_hw_format(
stream->out_transfer_func, &dpp->regamma_params)) {
dpp->funcs->dpp_program_regamma_pwl(dpp, &dpp->regamma_params, OPP_REGAMMA_USER);
} else {
else if (dcn10_translate_regamma_to_hw_format(stream->out_transfer_func, &dpp->regamma_params))
dpp->funcs->dpp_program_regamma_pwl(dpp, &dpp->regamma_params, OPP_REGAMMA_USER);
else
dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_BYPASS);
}
return true;
}
@ -2047,10 +2037,8 @@ static void program_all_pipe_in_tree(
}
if (cur_pipe_ctx->plane_state != pipe_ctx->plane_state) {
dc->hwss.set_input_transfer_func(
pipe_ctx, pipe_ctx->plane_state);
dc->hwss.set_output_transfer_func(
pipe_ctx, pipe_ctx->stream);
dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
}
}