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https://github.com/Fishwaldo/Star64_linux.git
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bnxt_en: Fix dmesg log firmware error messages.
Use appropriate firmware request header structure to prepare the firmware messages. This avoids the unnecessary conversion of the fields to 32-bit fields. Add appropriate endian conversion when printing out the message fields in dmesg so that they appear correct in the log. Reported-by: Rob Swindell <swindell@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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3 changed files with 17 additions and 31 deletions
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@ -2600,28 +2600,26 @@ alloc_mem_err:
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void bnxt_hwrm_cmd_hdr_init(struct bnxt *bp, void *request, u16 req_type,
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void bnxt_hwrm_cmd_hdr_init(struct bnxt *bp, void *request, u16 req_type,
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u16 cmpl_ring, u16 target_id)
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u16 cmpl_ring, u16 target_id)
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{
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{
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struct hwrm_cmd_req_hdr *req = request;
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struct input *req = request;
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req->cmpl_ring_req_type =
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req->req_type = cpu_to_le16(req_type);
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cpu_to_le32(req_type | (cmpl_ring << HWRM_CMPL_RING_SFT));
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req->cmpl_ring = cpu_to_le16(cmpl_ring);
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req->target_id_seq_id = cpu_to_le32(target_id << HWRM_TARGET_FID_SFT);
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req->target_id = cpu_to_le16(target_id);
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req->resp_addr = cpu_to_le64(bp->hwrm_cmd_resp_dma_addr);
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req->resp_addr = cpu_to_le64(bp->hwrm_cmd_resp_dma_addr);
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}
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}
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int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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{
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{
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int i, intr_process, rc;
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int i, intr_process, rc;
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struct hwrm_cmd_req_hdr *req = msg;
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struct input *req = msg;
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u32 *data = msg;
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u32 *data = msg;
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__le32 *resp_len, *valid;
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__le32 *resp_len, *valid;
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u16 cp_ring_id, len = 0;
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u16 cp_ring_id, len = 0;
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struct hwrm_err_output *resp = bp->hwrm_cmd_resp_addr;
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struct hwrm_err_output *resp = bp->hwrm_cmd_resp_addr;
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req->target_id_seq_id |= cpu_to_le32(bp->hwrm_cmd_seq++);
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req->seq_id = cpu_to_le16(bp->hwrm_cmd_seq++);
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memset(resp, 0, PAGE_SIZE);
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memset(resp, 0, PAGE_SIZE);
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cp_ring_id = (le32_to_cpu(req->cmpl_ring_req_type) &
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cp_ring_id = le16_to_cpu(req->cmpl_ring);
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HWRM_CMPL_RING_MASK) >>
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HWRM_CMPL_RING_SFT;
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intr_process = (cp_ring_id == INVALID_HW_RING_ID) ? 0 : 1;
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intr_process = (cp_ring_id == INVALID_HW_RING_ID) ? 0 : 1;
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/* Write request msg to hwrm channel */
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/* Write request msg to hwrm channel */
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@ -2632,8 +2630,7 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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/* currently supports only one outstanding message */
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/* currently supports only one outstanding message */
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if (intr_process)
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if (intr_process)
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bp->hwrm_intr_seq_id = le32_to_cpu(req->target_id_seq_id) &
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bp->hwrm_intr_seq_id = le16_to_cpu(req->seq_id);
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HWRM_SEQ_ID_MASK;
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/* Ring channel doorbell */
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/* Ring channel doorbell */
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writel(1, bp->bar0 + 0x100);
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writel(1, bp->bar0 + 0x100);
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@ -2651,7 +2648,7 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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if (bp->hwrm_intr_seq_id != HWRM_SEQ_ID_INVALID) {
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if (bp->hwrm_intr_seq_id != HWRM_SEQ_ID_INVALID) {
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netdev_err(bp->dev, "Resp cmpl intr err msg: 0x%x\n",
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netdev_err(bp->dev, "Resp cmpl intr err msg: 0x%x\n",
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req->cmpl_ring_req_type);
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le16_to_cpu(req->req_type));
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return -1;
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return -1;
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}
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}
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} else {
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} else {
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@ -2667,8 +2664,8 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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if (i >= timeout) {
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if (i >= timeout) {
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netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d\n",
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netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d\n",
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timeout, req->cmpl_ring_req_type,
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timeout, le16_to_cpu(req->req_type),
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req->target_id_seq_id, *resp_len);
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le16_to_cpu(req->seq_id), *resp_len);
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return -1;
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return -1;
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}
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}
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@ -2682,8 +2679,8 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
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if (i >= timeout) {
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if (i >= timeout) {
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netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d v:%d\n",
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netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d v:%d\n",
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timeout, req->cmpl_ring_req_type,
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timeout, le16_to_cpu(req->req_type),
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req->target_id_seq_id, len, *valid);
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le16_to_cpu(req->seq_id), len, *valid);
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return -1;
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return -1;
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}
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}
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}
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}
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@ -481,9 +481,11 @@ struct rx_tpa_end_cmp_ext {
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#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
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#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
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#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
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#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
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#define HWRM_RESP_ERR_CODE_MASK 0xffff
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#define HWRM_RESP_ERR_CODE_MASK 0xffff
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#define HWRM_RESP_LEN_OFFSET 4
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#define HWRM_RESP_LEN_MASK 0xffff0000
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#define HWRM_RESP_LEN_MASK 0xffff0000
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#define HWRM_RESP_LEN_SFT 16
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#define HWRM_RESP_LEN_SFT 16
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#define HWRM_RESP_VALID_MASK 0xff000000
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#define HWRM_RESP_VALID_MASK 0xff000000
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#define HWRM_SEQ_ID_INVALID -1
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#define BNXT_HWRM_REQ_MAX_SIZE 128
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#define BNXT_HWRM_REQ_MAX_SIZE 128
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#define BNXT_HWRM_REQS_PER_PAGE (BNXT_PAGE_SIZE / \
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#define BNXT_HWRM_REQS_PER_PAGE (BNXT_PAGE_SIZE / \
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BNXT_HWRM_REQ_MAX_SIZE)
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BNXT_HWRM_REQ_MAX_SIZE)
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@ -645,19 +647,6 @@ struct bnxt_irq {
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#define INVALID_STATS_CTX_ID -1
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#define INVALID_STATS_CTX_ID -1
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struct hwrm_cmd_req_hdr {
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#define HWRM_CMPL_RING_MASK 0xffff0000
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#define HWRM_CMPL_RING_SFT 16
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__le32 cmpl_ring_req_type;
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#define HWRM_SEQ_ID_MASK 0xffff
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#define HWRM_SEQ_ID_INVALID -1
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#define HWRM_RESP_LEN_OFFSET 4
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#define HWRM_TARGET_FID_MASK 0xffff0000
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#define HWRM_TARGET_FID_SFT 16
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__le32 target_id_seq_id;
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__le64 resp_addr;
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};
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struct bnxt_ring_grp_info {
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struct bnxt_ring_grp_info {
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u16 fw_stats_ctx;
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u16 fw_stats_ctx;
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u16 fw_grp_id;
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u16 fw_grp_id;
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@ -801,8 +801,8 @@ static int bnxt_vf_set_link(struct bnxt *bp, struct bnxt_vf_info *vf)
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static int bnxt_vf_req_validate_snd(struct bnxt *bp, struct bnxt_vf_info *vf)
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static int bnxt_vf_req_validate_snd(struct bnxt *bp, struct bnxt_vf_info *vf)
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{
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{
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int rc = 0;
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int rc = 0;
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struct hwrm_cmd_req_hdr *encap_req = vf->hwrm_cmd_req_addr;
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struct input *encap_req = vf->hwrm_cmd_req_addr;
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u32 req_type = le32_to_cpu(encap_req->cmpl_ring_req_type) & 0xffff;
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u32 req_type = le16_to_cpu(encap_req->req_type);
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switch (req_type) {
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switch (req_type) {
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case HWRM_CFA_L2_FILTER_ALLOC:
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case HWRM_CFA_L2_FILTER_ALLOC:
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