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counter: stm32-lptimer-cnt: Provide defines for clock polarities

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[ Upstream commit 05593a3fd1 ]

The STM32 low-power timer permits configuration of the clock polarity
via the LPTIMX_CFGR register CKPOL bits. This patch provides
preprocessor defines for the supported clock polarities.

Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/a111c8905c467805ca530728f88189b59430f27e.1630031207.git.vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Stable-dep-of: 00f4bc5184 ("counter: 104-quad-8: Fix Synapse action reported for Index signals")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
William Breathitt Gray 2021-08-27 12:47:45 +09:00 • committed by Justin Hammond
parent 93e8d120b4
commit ab7bc9200d
2 changed files with 8 additions and 3 deletions
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6
drivers/counter/stm32-lptimer-cnt.c
View file

@ -140,9 +140,9 @@ static const enum counter_function stm32_lptim_cnt_functions[] = {
};
enum stm32_lptim_synapse_action {
STM32_LPTIM_SYNAPSE_ACTION_RISING_EDGE,
STM32_LPTIM_SYNAPSE_ACTION_FALLING_EDGE,
STM32_LPTIM_SYNAPSE_ACTION_BOTH_EDGES,
STM32_LPTIM_SYNAPSE_ACTION_RISING_EDGE = STM32_LPTIM_CKPOL_RISING_EDGE,
STM32_LPTIM_SYNAPSE_ACTION_FALLING_EDGE = STM32_LPTIM_CKPOL_FALLING_EDGE,
STM32_LPTIM_SYNAPSE_ACTION_BOTH_EDGES = STM32_LPTIM_CKPOL_BOTH_EDGES,
STM32_LPTIM_SYNAPSE_ACTION_NONE,
};

5
include/linux/mfd/stm32-lptimer.h
View file

@ -45,6 +45,11 @@
#define STM32_LPTIM_PRESC GENMASK(11, 9)
#define STM32_LPTIM_CKPOL GENMASK(2, 1)
/* STM32_LPTIM_CKPOL */
#define STM32_LPTIM_CKPOL_RISING_EDGE 0
#define STM32_LPTIM_CKPOL_FALLING_EDGE 1
#define STM32_LPTIM_CKPOL_BOTH_EDGES 2
/* STM32_LPTIM_ARR */
#define STM32_LPTIM_MAX_ARR 0xFFFF