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arm64: dts: imx8mq: add USB nodes
It adds USB device and phy nodes for imx8mq SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -516,6 +516,70 @@
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};
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};
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usb_dwc3_0: usb@38100000 {
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compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
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reg = <0x38100000 0x10000>;
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clocks = <&clk IMX8MQ_CLK_USB_BUS>,
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<&clk IMX8MQ_CLK_USB_CORE_REF>,
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<&clk IMX8MQ_CLK_USB1_CTRL_ROOT>;
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clock-names = "bus_early", "ref", "suspend";
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assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
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<&clk IMX8MQ_CLK_USB_CORE_REF>;
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assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
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<&clk IMX8MQ_SYS1_PLL_100M>;
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assigned-clock-rates = <500000000>, <100000000>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb3_phy0>, <&usb3_phy0>;
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phy-names = "usb2-phy", "usb3-phy";
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power-domains = <&pgc_otg1>;
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usb3-resume-missing-cas;
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status = "disabled";
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};
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usb3_phy0: usb-phy@381f0040 {
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compatible = "fsl,imx8mq-usb-phy";
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reg = <0x381f0040 0x40>;
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clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
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clock-names = "phy";
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assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
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assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
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assigned-clock-rates = <100000000>;
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#phy-cells = <0>;
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status = "disabled";
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};
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usb_dwc3_1: usb@38200000 {
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compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
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reg = <0x38200000 0x10000>;
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clocks = <&clk IMX8MQ_CLK_USB_BUS>,
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<&clk IMX8MQ_CLK_USB_CORE_REF>,
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<&clk IMX8MQ_CLK_USB2_CTRL_ROOT>;
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clock-names = "bus_early", "ref", "suspend";
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assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
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<&clk IMX8MQ_CLK_USB_CORE_REF>;
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assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
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<&clk IMX8MQ_SYS1_PLL_100M>;
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assigned-clock-rates = <500000000>, <100000000>;
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interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb3_phy1>, <&usb3_phy1>;
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phy-names = "usb2-phy", "usb3-phy";
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power-domains = <&pgc_otg2>;
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usb3-resume-missing-cas;
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status = "disabled";
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};
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usb3_phy1: usb-phy@382f0040 {
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compatible = "fsl,imx8mq-usb-phy";
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reg = <0x382f0040 0x40>;
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clocks = <&clk IMX8MQ_CLK_USB2_PHY_ROOT>;
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clock-names = "phy";
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assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
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assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
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assigned-clock-rates = <100000000>;
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#phy-cells = <0>;
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status = "disabled";
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};
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gic: interrupt-controller@38800000 {
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compatible = "arm,gic-v3";
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reg = <0x38800000 0x10000>, /* GIC Dist */
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