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ARM: SoC platform updates for 4.16

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These are mostly minor bugfixes, cleanup and many defconfig updates to
 support added drivers. In particular OMAP and PXA keep cleaning up the
 legacy code base, as usual.
 
 Nvidia adds some more SoC support code for Tegra 186.
 
 For the first time on years, we are actually adding a non-DT platform for,
 the EP93xx based Liebherr controller BK3.1. It's a minor variation of
 the EP93xx reference design and in active use, while EP93xx apparently
 doesn't have enough new development to have any device tree support.
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "These are mostly minor bugfixes, cleanup and many defconfig updates to
  support added drivers. In particular OMAP and PXA keep cleaning up the
  legacy code base, as usual.

  Nvidia adds some more SoC support code for Tegra 186.

  For the first time on years, we are actually adding a non-DT platform
  for the EP93xx based Liebherr controller BK3.1. It's a minor variation
  of the EP93xx reference design and in active use, while EP93xx
  apparently doesn't have enough new development to have any device tree
  support"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: omap: hwmod: fix section mismatch warnings
  ARM: pxa/tosa-bt: add MODULE_LICENSE tag
  arm64: defconfig: enable CONFIG_ACPI_APEI_EINJ
  arm64: defconfig: enable EDAC GHES option
  arm64: defconfig: enable CONFIG_ACPI_APEI_MEMORY_FAILURE
  ARM: imx_v6_v7_defconfig: enable CONFIG_CPU_FREQ_STAT
  Wind down ARM/TANGO port
  ARM: davinci: constify gpio_led
  ARM: davinci: drop unneeded newline
  soc: Add SoC driver for Gemini
  ARM: SAMSUNG: Add SPDX license identifiers
  ARM: S5PV210: Add SPDX license identifiers
  ARM: S3C64XX: Add SPDX license identifiers
  ARM: S3C24XX: Add SPDX license identifiers
  ARM: EXYNOS: Add SPDX license identifiers
  ARM: imx: remove unused imx3 pm definitions
  ARM: imx: don't abort MMDC probe if power saving status doesn't match
  ARM: imx_v6_v7_defconfig: enable RTC_DRV_MXC_V2
  ARM: imx_v6_v7_defconfig: Add missing config for DART-MX6 SoM
  ARM: davinci: Use PTR_ERR_OR_ZERO()
  ...
This commit is contained in:
Linus Torvalds 2018-02-01 16:17:40 -08:00
commit adbc128fa8
307 changed files with 1948 additions and 2990 deletions
Download patch file Download diff file Expand all files Collapse all files

74
include/linux/platform_data/i2c-pxa.h Normal file
View file

@ -0,0 +1,74 @@
/*
* i2c_pxa.h
*
* Copyright (C) 2002 Intrinsyc Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _I2C_PXA_H_
#define _I2C_PXA_H_
#if 0
#define DEF_TIMEOUT 3
#else
/* need a longer timeout if we're dealing with the fact we may well be
* looking at a multi-master environment
*/
#define DEF_TIMEOUT 32
#endif
#define BUS_ERROR (-EREMOTEIO)
#define XFER_NAKED (-ECONNREFUSED)
#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
/* ICR initialize bit values
*
* 15. FM 0 (100 Khz operation)
* 14. UR 0 (No unit reset)
* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
* matching its slave address)
* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
* in master mode)
* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
* 9. IRFIE 1 (Enable interrupts from full buffer received)
* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
* 6. IUE 0 (Disable unit until we change settings)
* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
* 4. MA 0 (Only send stop with the ICR stop bit)
* 3. TB 0 (We are not transmitting a byte initially)
* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
* 1. STOP 0 (Do not send a STOP)
* 0. START 0 (Do not send a START)
*
*/
#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
/* I2C status register init values
*
* 10. BED 1 (Clear bus error detected)
* 9. SAD 1 (Clear slave address detected)
* 7. IRF 1 (Clear IDBR Receive Full)
* 6. ITE 1 (Clear IDBR Transmit Empty)
* 5. ALD 1 (Clear Arbitration Loss Detected)
* 4. SSD 1 (Clear Slave Stop Detected)
*/
#define I2C_ISR_INIT 0x7FF /* status register init */
struct i2c_slave_client;
struct i2c_pxa_platform_data {
unsigned int slave_addr;
struct i2c_slave_client *slave;
unsigned int class;
unsigned int use_pio :1;
unsigned int fast_mode :1;
unsigned int high_mode:1;
unsigned char master_code;
unsigned long rate;
};
#endif