dt-bindings: pinctrl: add starfive,jh7100-pinctrl bindings

Add bindings for the pin controller on the StarFive JH7100 SoC [1].

[1] https://github.com/starfive-tech/beaglev_doc

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
This commit is contained in:
Emil Renner Berthing 2021-07-27 14:34:33 +02:00
parent c88b77f77a
commit ae384415b6

View file

@ -0,0 +1,269 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive JH7100 Pin Controller Device Tree Bindings
maintainers:
- Emil Renner Berthing <kernel@esmil.dk>
- Drew Fustini <drew@beagleboard.org>
properties:
compatible:
const: starfive,jh7100-pinctrl
reg:
minItems: 2
maxItems: 2
reg-names:
items:
- const: "gpio"
- const: "padctl"
clocks:
maxItems: 1
gpio-controller: true
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2.
interrupts:
maxItems: 1
description: The GPIO parent interrupt.
interrupt-controller: true
"#interrupt-cells":
const: 2
starfive,signal-group:
description: |
The SoC has a global setting selecting one of 7 different pinmux
configurations of the pads named GPIO[0:63] and FUNC_SHARE[0:141]. After
this global setting is chosen only the 64 "GPIO" pins can be further
muxed by configuring them to be controlled by certain peripherals rather
than software.
Note that in configuration 0 none of GPIOs are routed to pads, and only
in configuration 1 are the GPIOs routed to the pads named GPIO[0:63].
If this property is not set it defaults to the configuration already
chosen by the earlier boot stages.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3, 4, 5, 6]
required:
- compatible
- reg
- reg-names
- clocks
- gpio-controller
- "#gpio-cells"
- interrupts
- interrupt-controller
- "#interrupt-cells"
patternProperties:
'-[0-9]*$':
type: object
patternProperties:
'-pins*$':
type: object
description: |
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to
muxer configuration, bias, input enable/disable, input schmitt
trigger enable/disable, slew-rate and drive strength.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
properties:
pins:
description: |
The list of pin identifiers that properties in the node apply to.
This should be set using either the PAD_GPIO or PAD_FUNC_SHARE
macro. Either this or "pinmux" has to be specified.
pinmux:
description: |
The list of GPIO identifiers and their mux settings that
properties in the node apply to. This should be set using the
GPIOMUX macro. Either this or "pins" has to be specified.
bias-disable: true
bias-pull-up:
type: boolean
bias-pull-down:
type: boolean
drive-strength:
enum: [ 14, 21, 28, 35, 42, 49, 56, 63 ]
input-enable: true
input-disable: true
input-schmitt-enable: true
input-schmitt-disable: true
slew-rate:
maximum: 7
starfive,strong-pull-up:
description: enable strong pull-up.
type: boolean
additionalProperties: false
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/starfive-jh7100.h>
#include <dt-bindings/pinctrl/pinctrl-starfive.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
pio: pinctrl@11910000 {
compatible = "starfive,jh7100-pinctrl";
reg = <0x0 0x11910000 0x0 0x10000>,
<0x0 0x11858000 0x0 0x1000>;
reg-names = "gpio", "padctl";
clocks = <&clkgen JH7100_CLK_GPIO_APB>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <32>;
interrupt-controller;
#interrupt-cells = <2>;
starfive,signal-group = <6>;
gmac_pins_default: gmac-0 {
gtxclk-pins {
pins = <PAD_FUNC_SHARE(115)>;
bias-pull-up;
drive-strength = <35>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
miitxclk-pins {
pins = <PAD_FUNC_SHARE(116)>;
bias-pull-up;
drive-strength = <14>;
input-enable;
input-schmitt-disable;
slew-rate = <0>;
};
tx-pins {
pins = <PAD_FUNC_SHARE(117)>,
<PAD_FUNC_SHARE(119)>,
<PAD_FUNC_SHARE(120)>,
<PAD_FUNC_SHARE(121)>,
<PAD_FUNC_SHARE(122)>,
<PAD_FUNC_SHARE(123)>,
<PAD_FUNC_SHARE(124)>,
<PAD_FUNC_SHARE(125)>,
<PAD_FUNC_SHARE(126)>;
bias-disable;
drive-strength = <35>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
rxclk-pins {
pins = <PAD_FUNC_SHARE(127)>;
bias-pull-up;
drive-strength = <14>;
input-enable;
input-schmitt-disable;
slew-rate = <6>;
};
rxer-pins {
pins = <PAD_FUNC_SHARE(129)>;
bias-pull-up;
drive-strength = <14>;
input-enable;
input-schmitt-disable;
slew-rate = <0>;
};
rx-pins {
pins = <PAD_FUNC_SHARE(128)>,
<PAD_FUNC_SHARE(130)>,
<PAD_FUNC_SHARE(131)>,
<PAD_FUNC_SHARE(132)>,
<PAD_FUNC_SHARE(133)>,
<PAD_FUNC_SHARE(134)>,
<PAD_FUNC_SHARE(135)>,
<PAD_FUNC_SHARE(136)>,
<PAD_FUNC_SHARE(137)>,
<PAD_FUNC_SHARE(138)>,
<PAD_FUNC_SHARE(139)>,
<PAD_FUNC_SHARE(140)>,
<PAD_FUNC_SHARE(141)>;
bias-pull-up;
drive-strength = <14>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
i2c0_pins_default: i2c0-0 {
i2c-pins {
pinmux = <GPIOMUX(62, GPO_LOW,
GPO_I2C0_PAD_SCK_OEN,
GPI_I2C0_PAD_SCK_IN)>,
<GPIOMUX(61, GPO_LOW,
GPO_I2C0_PAD_SDA_OEN,
GPI_I2C0_PAD_SDA_IN)>;
bias-disable; /* external pull-up */
input-enable;
input-schmitt-enable;
};
};
uart3_pins_default: uart3-0 {
rx-pin {
pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
GPI_UART3_PAD_SIN)>;
bias-pull-up;
input-enable;
input-schmitt-enable;
};
tx-pin {
pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
GPO_ENABLE, GPI_NONE)>;
bias-disable;
input-disable;
input-schmitt-disable;
};
};
};
gmac {
pinctrl-0 = <&gmac_pins_default>;
pinctrl-names = "default";
};
i2c0 {
pinctrl-0 = <&i2c0_pins_default>;
pinctrl-names = "default";
};
uart3 {
pinctrl-0 = <&uart3_pins_default>;
pinctrl-names = "default";
};
};
...