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dt-bindings: pinctrl: add starfive,jh7100-pinctrl bindings
Add bindings for the pin controller on the StarFive JH7100 SoC [1]. [1] https://github.com/starfive-tech/beaglev_doc Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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Emil Renner Berthing
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1 changed files with 269 additions and 0 deletions
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7100 Pin Controller Device Tree Bindings
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maintainers:
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- Emil Renner Berthing <kernel@esmil.dk>
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- Drew Fustini <drew@beagleboard.org>
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properties:
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compatible:
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const: starfive,jh7100-pinctrl
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reg:
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minItems: 2
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maxItems: 2
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reg-names:
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items:
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- const: "gpio"
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- const: "padctl"
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clocks:
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maxItems: 1
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gpio-controller: true
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"#gpio-cells":
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const: 2
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description: |
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Number of cells in GPIO specifier. Since the generic GPIO
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binding is used, the amount of cells must be specified as 2.
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interrupts:
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maxItems: 1
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description: The GPIO parent interrupt.
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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starfive,signal-group:
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description: |
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The SoC has a global setting selecting one of 7 different pinmux
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configurations of the pads named GPIO[0:63] and FUNC_SHARE[0:141]. After
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this global setting is chosen only the 64 "GPIO" pins can be further
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muxed by configuring them to be controlled by certain peripherals rather
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than software.
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Note that in configuration 0 none of GPIOs are routed to pads, and only
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in configuration 1 are the GPIOs routed to the pads named GPIO[0:63].
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If this property is not set it defaults to the configuration already
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chosen by the earlier boot stages.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2, 3, 4, 5, 6]
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- gpio-controller
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- "#gpio-cells"
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- interrupts
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- interrupt-controller
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- "#interrupt-cells"
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patternProperties:
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'-[0-9]*$':
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type: object
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patternProperties:
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'-pins*$':
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type: object
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description: |
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A pinctrl node should contain at least one subnode representing the
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pinctrl groups available on the machine. Each subnode will list the
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pins it needs, and how they should be configured, with regard to
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muxer configuration, bias, input enable/disable, input schmitt
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trigger enable/disable, slew-rate and drive strength.
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$ref: "/schemas/pinctrl/pincfg-node.yaml"
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properties:
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pins:
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description: |
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The list of pin identifiers that properties in the node apply to.
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This should be set using either the PAD_GPIO or PAD_FUNC_SHARE
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macro. Either this or "pinmux" has to be specified.
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pinmux:
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description: |
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The list of GPIO identifiers and their mux settings that
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properties in the node apply to. This should be set using the
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GPIOMUX macro. Either this or "pins" has to be specified.
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bias-disable: true
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bias-pull-up:
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type: boolean
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bias-pull-down:
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type: boolean
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drive-strength:
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enum: [ 14, 21, 28, 35, 42, 49, 56, 63 ]
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input-enable: true
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input-disable: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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slew-rate:
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maximum: 7
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starfive,strong-pull-up:
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description: enable strong pull-up.
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type: boolean
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additionalProperties: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/starfive-jh7100.h>
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#include <dt-bindings/pinctrl/pinctrl-starfive.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pio: pinctrl@11910000 {
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compatible = "starfive,jh7100-pinctrl";
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reg = <0x0 0x11910000 0x0 0x10000>,
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<0x0 0x11858000 0x0 0x1000>;
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reg-names = "gpio", "padctl";
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clocks = <&clkgen JH7100_CLK_GPIO_APB>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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starfive,signal-group = <6>;
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gmac_pins_default: gmac-0 {
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gtxclk-pins {
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pins = <PAD_FUNC_SHARE(115)>;
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bias-pull-up;
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drive-strength = <35>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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miitxclk-pins {
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pins = <PAD_FUNC_SHARE(116)>;
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bias-pull-up;
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drive-strength = <14>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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tx-pins {
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pins = <PAD_FUNC_SHARE(117)>,
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<PAD_FUNC_SHARE(119)>,
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<PAD_FUNC_SHARE(120)>,
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<PAD_FUNC_SHARE(121)>,
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<PAD_FUNC_SHARE(122)>,
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<PAD_FUNC_SHARE(123)>,
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<PAD_FUNC_SHARE(124)>,
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<PAD_FUNC_SHARE(125)>,
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<PAD_FUNC_SHARE(126)>;
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bias-disable;
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drive-strength = <35>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rxclk-pins {
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pins = <PAD_FUNC_SHARE(127)>;
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bias-pull-up;
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drive-strength = <14>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <6>;
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};
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rxer-pins {
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pins = <PAD_FUNC_SHARE(129)>;
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bias-pull-up;
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drive-strength = <14>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = <PAD_FUNC_SHARE(128)>,
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<PAD_FUNC_SHARE(130)>,
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<PAD_FUNC_SHARE(131)>,
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<PAD_FUNC_SHARE(132)>,
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<PAD_FUNC_SHARE(133)>,
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<PAD_FUNC_SHARE(134)>,
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<PAD_FUNC_SHARE(135)>,
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<PAD_FUNC_SHARE(136)>,
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<PAD_FUNC_SHARE(137)>,
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<PAD_FUNC_SHARE(138)>,
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<PAD_FUNC_SHARE(139)>,
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<PAD_FUNC_SHARE(140)>,
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<PAD_FUNC_SHARE(141)>;
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bias-pull-up;
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drive-strength = <14>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c0_pins_default: i2c0-0 {
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i2c-pins {
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pinmux = <GPIOMUX(62, GPO_LOW,
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GPO_I2C0_PAD_SCK_OEN,
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GPI_I2C0_PAD_SCK_IN)>,
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<GPIOMUX(61, GPO_LOW,
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GPO_I2C0_PAD_SDA_OEN,
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GPI_I2C0_PAD_SDA_IN)>;
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bias-disable; /* external pull-up */
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input-enable;
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input-schmitt-enable;
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};
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};
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uart3_pins_default: uart3-0 {
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rx-pin {
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pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
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GPI_UART3_PAD_SIN)>;
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bias-pull-up;
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input-enable;
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input-schmitt-enable;
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};
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tx-pin {
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pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
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GPO_ENABLE, GPI_NONE)>;
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bias-disable;
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input-disable;
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input-schmitt-disable;
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};
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};
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};
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gmac {
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pinctrl-0 = <&gmac_pins_default>;
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pinctrl-names = "default";
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};
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i2c0 {
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pinctrl-0 = <&i2c0_pins_default>;
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pinctrl-names = "default";
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};
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uart3 {
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pinctrl-0 = <&uart3_pins_default>;
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pinctrl-names = "default";
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};
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};
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...
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