GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-07-23 23:32:14 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge branch 'pci/misc'

Browse source 
- add macros for PCIe Link Control 2 register (Frederick Lawler)

  - replace IB/hfi1 custom macros with PCI core versions (Frederick Lawler)

  - remove dead microblaze and xtensa code (Bjorn Helgaas)

  - use dev_printk() when possible in xtensa and mips (Bjorn Helgaas)

* pci/misc:
  MIPS: PCI: Use dev_printk() when possible
  xtensa/PCI: Use dev_printk() when possible
  xtensa/PCI: Make variables static
  xtensa/PCI: Remove dead code
  microblaze/PCI: Remove pcibios_claim_one_bus() dead code
  microblaze/PCI: Remove pcibios_finish_adding_to_bus() dead code
  IB/hfi1: Replace custom hfi1 macros with PCIe macros
  PCI: Add PCI_EXP_LNKCTL2_TLS* macros
This commit is contained in:
Bjorn Helgaas 2018-06-06 16:10:12 -05:00
commit aee9684a36
7 changed files with 20 additions and 153 deletions
Download patch file Download diff file Expand all files Collapse all files

5
include/uapi/linux/pci_regs.h
View file

@ -655,6 +655,11 @@
#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
#define PCI_EXP_LNKCTL2_TLS 0x000f
#define PCI_EXP_LNKCTL2_TLS_2_5GT 0x0001 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */