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drm/i915: Don't use crtc->plane in ILK+ get_config()

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crtc->plane can only be different from crtc->pipe pre-Gen4. Don't use it
in new-ish code.

Reviewed-By: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2015-01-20 12:51:47 +00:00 • committed by Daniel Vetter
parent b113d5ee4d
commit aeee5a4944
1 changed files with 8 additions and 8 deletions
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16
drivers/gpu/drm/i915/intel_display.c
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@ -7602,7 +7602,7 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc,
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
u32 val, base, offset; u32 val, base, offset;
int pipe = crtc->pipe, plane = crtc->plane; int pipe = crtc->pipe;
int fourcc, pixel_format; int fourcc, pixel_format;
int aligned_height; int aligned_height;
struct drm_framebuffer *fb; struct drm_framebuffer *fb;
@ -7613,7 +7613,7 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc,
return; return;
} }
val = I915_READ(DSPCNTR(plane)); val = I915_READ(DSPCNTR(pipe));
if (INTEL_INFO(dev)->gen >= 4) if (INTEL_INFO(dev)->gen >= 4)
if (val & DISPPLANE_TILED) if (val & DISPPLANE_TILED)
@ -7624,14 +7624,14 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc,
fb->pixel_format = fourcc; fb->pixel_format = fourcc;
fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8; fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
base = I915_READ(DSPSURF(plane)) & 0xfffff000; base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
offset = I915_READ(DSPOFFSET(plane)); offset = I915_READ(DSPOFFSET(pipe));
} else { } else {
if (plane_config->tiling) if (plane_config->tiling)
offset = I915_READ(DSPTILEOFF(plane)); offset = I915_READ(DSPTILEOFF(pipe));
else else
offset = I915_READ(DSPLINOFF(plane)); offset = I915_READ(DSPLINOFF(pipe));
} }
plane_config->base = base; plane_config->base = base;
@ -7647,8 +7647,8 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc,
plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height); plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
DRM_DEBUG_KMS("pipe/plane %d/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", DRM_DEBUG_KMS("pipe %d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
pipe, plane, fb->width, fb->height, fb->bits_per_pixel, pipe, fb->width, fb->height, fb->bits_per_pixel,
base, fb->pitches[0], plane_config->size); base, fb->pitches[0], plane_config->size);
crtc->base.primary->fb = fb; crtc->base.primary->fb = fb;