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mmc: sdhci: more efficient interrupt enable register handling

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Rather than wasting cycles read-modify-writing the interrupt enable
registers, cache the value locally instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
This commit is contained in:
Russell King 2014-04-25 12:56:01 +01:00 • committed by Chris Ball
parent be138554a7
commit b537f94ce1
2 changed files with 50 additions and 51 deletions
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3
include/linux/mmc/sdhci.h
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@ -178,6 +178,9 @@ struct sdhci_host {
u32 thread_isr;
/* cached registers */
u32 ier;
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */