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ath9k_hw: initialize more timing related registers for half/quarter channels
Initialize the the clock-to-TSF field of AR_USEC and the SIFS and EIFS time registers based on the clock rate instead of relying on initvals. With those changes, some of the hardcoded AR9287 1.3+ specific overrides can be dropped. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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087b6ff682
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1 changed files with 59 additions and 8 deletions
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@ -905,6 +905,13 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
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}
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}
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}
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}
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static void ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us)
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{
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u32 val = ath9k_hw_mac_to_clks(ah, us - 2);
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val = min(val, (u32) 0xFFFF);
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REG_WRITE(ah, AR_D_GBL_IFS_SIFS, val);
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}
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static void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
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static void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
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{
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{
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u32 val = ath9k_hw_mac_to_clks(ah, us);
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u32 val = ath9k_hw_mac_to_clks(ah, us);
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@ -942,25 +949,60 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
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void ath9k_hw_init_global_settings(struct ath_hw *ah)
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void ath9k_hw_init_global_settings(struct ath_hw *ah)
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{
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_conf *conf = &common->hw->conf;
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const struct ath9k_channel *chan = ah->curchan;
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int acktimeout;
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int acktimeout;
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int slottime;
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int slottime;
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int sifstime;
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int sifstime;
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int rx_lat = 0, tx_lat = 0, eifs = 0;
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u32 reg;
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ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
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ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
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ah->misc_mode);
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ah->misc_mode);
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if (!chan)
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return;
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if (ah->misc_mode != 0)
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if (ah->misc_mode != 0)
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REG_SET_BIT(ah, AR_PCU_MISC, ah->misc_mode);
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REG_SET_BIT(ah, AR_PCU_MISC, ah->misc_mode);
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if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
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rx_lat = 37;
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tx_lat = 54;
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if (IS_CHAN_HALF_RATE(chan)) {
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eifs = 175;
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rx_lat *= 2;
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tx_lat *= 2;
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if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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tx_lat += 11;
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slottime = 13;
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sifstime = 32;
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} else if (IS_CHAN_QUARTER_RATE(chan)) {
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eifs = 340;
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rx_lat *= 4;
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tx_lat *= 4;
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if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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tx_lat += 22;
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slottime = 21;
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sifstime = 64;
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} else {
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eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS);
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reg = REG_READ(ah, AR_USEC);
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rx_lat = MS(reg, AR_USEC_RX_LAT);
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tx_lat = MS(reg, AR_USEC_TX_LAT);
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slottime = ah->slottime;
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if (IS_CHAN_5GHZ(chan))
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sifstime = 16;
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sifstime = 16;
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else
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else
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sifstime = 10;
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sifstime = 10;
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}
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/* As defined by IEEE 802.11-2007 17.3.8.6 */
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/* As defined by IEEE 802.11-2007 17.3.8.6 */
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slottime = ah->slottime + 3 * ah->coverage_class;
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acktimeout = slottime + sifstime + 3 * ah->coverage_class;
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acktimeout = slottime + sifstime;
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/*
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/*
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* Workaround for early ACK timeouts, add an offset to match the
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* Workaround for early ACK timeouts, add an offset to match the
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@ -972,11 +1014,20 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
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if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
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if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
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acktimeout += 64 - sifstime - ah->slottime;
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acktimeout += 64 - sifstime - ah->slottime;
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ath9k_hw_setslottime(ah, ah->slottime);
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ath9k_hw_set_sifs_time(ah, sifstime);
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ath9k_hw_setslottime(ah, slottime);
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ath9k_hw_set_ack_timeout(ah, acktimeout);
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ath9k_hw_set_ack_timeout(ah, acktimeout);
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ath9k_hw_set_cts_timeout(ah, acktimeout);
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ath9k_hw_set_cts_timeout(ah, acktimeout);
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if (ah->globaltxtimeout != (u32) -1)
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if (ah->globaltxtimeout != (u32) -1)
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ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
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ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
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REG_WRITE(ah, AR_D_GBL_IFS_EIFS, ath9k_hw_mac_to_clks(ah, eifs));
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REG_RMW(ah, AR_USEC,
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(common->clockrate - 1) |
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SM(rx_lat, AR_USEC_RX_LAT) |
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SM(tx_lat, AR_USEC_TX_LAT),
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AR_USEC_TX_LAT | AR_USEC_RX_LAT | AR_USEC_USEC);
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}
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}
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EXPORT_SYMBOL(ath9k_hw_init_global_settings);
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EXPORT_SYMBOL(ath9k_hw_init_global_settings);
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