mirror of
https://github.com/Fishwaldo/Star64_linux.git
synced 2025-07-23 07:12:09 +00:00
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "These are the highlists of the main MIPS pull request for 4.4: - Add latencytop support - Support appended DTBs - VDSO support and initially use it for gettimeofday. - Drop the .MIPS.abiflags and ELF NOTE sections from vmlinux - Support for the 5KE, an internal test core. - Switch all MIPS platfroms to libata drivers. - Improved support, cleanups for ralink and Lantiq platforms. - Support for the new xilfpga platform. - A number of DTB improvments for BMIPS. - Improved support for CM and CPS. - Minor JZ4740 and BCM47xx enhancements" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (120 commits) MIPS: idle: add case for CPU_5KE MIPS: Octeon: Support APPENDED_DTB MIPS: vmlinux: create a section for appended DTB MIPS: Clean up compat_siginfo_t MIPS: Fix PAGE_MASK definition MIPS: BMIPS: Enable GZIP ramdisk and timed printks MIPS: Add xilfpga defconfig MIPS: xilfpga: Add mipsfpga platform code MIPS: xilfpga: Add xilfpga device tree files. dt-bindings: MIPS: Document xilfpga bindings and boot style MIPS: Make MIPS_CMDLINE_DTB default MIPS: Make the kernel arguments from dtb available MIPS: Use USE_OF as the guard for appended dtb MIPS: BCM63XX: Use pr_* instead of printk MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND. MIPS: lantiq: Disable xbar fpi burst mode MIPS: lantiq: Force the crossbar to big endian MIPS: lantiq: Initialize the USB core on boot MIPS: lantiq: Return correct value for fpi clock on ar9 MIPS: ralink: Add missing clock on rt305x ...
This commit is contained in:
commit
b84da9fa47
151 changed files with 4596 additions and 755 deletions
|
@ -6,6 +6,7 @@ dts-dirs += mti
|
|||
dts-dirs += netlogic
|
||||
dts-dirs += qca
|
||||
dts-dirs += ralink
|
||||
dts-dirs += xilfpga
|
||||
|
||||
obj-y := $(addsuffix /, $(dts-dirs))
|
||||
|
||||
|
|
|
@ -87,14 +87,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406780 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0xf000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <59>;
|
||||
interrupts = <59>, <57>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <60>, <58>, <62>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
@ -144,6 +162,56 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@406380 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406380 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsce: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bsce";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
@ -246,5 +314,47 @@
|
|||
interrupts = <76>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <40>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -81,14 +81,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
@ -138,6 +156,46 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
|
@ -81,14 +81,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
@ -138,6 +156,46 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscc: i2c@406300 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406300 0x58>;
|
||||
interrupts = <26>;
|
||||
interrupt-names = "upg_bscc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
|
|
@ -87,14 +87,32 @@
|
|||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x406600 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x44>;
|
||||
brcm,int-map-mask = <0x44>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <56>;
|
||||
interrupts = <56>, <54>;
|
||||
interrupt-names = "upg_main", "upg_bsc";
|
||||
};
|
||||
|
||||
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
||||
compatible = "brcm,bcm7120-l2-intc";
|
||||
reg = <0x408b80 0x8>;
|
||||
|
||||
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
||||
brcm,int-fwd-mask = <0>;
|
||||
brcm,irq-can-wake;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <57>, <55>, <59>;
|
||||
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
||||
"upg_spi";
|
||||
};
|
||||
|
||||
sun_top_ctrl: syscon@404000 {
|
||||
|
@ -144,6 +162,36 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
bsca: i2c@406200 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406200 0x58>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "upg_bsca";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscb: i2c@406280 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_irq0_intc>;
|
||||
reg = <0x406280 0x58>;
|
||||
interrupts = <25>;
|
||||
interrupt-names = "upg_bscb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bscd: i2c@408980 {
|
||||
clock-frequency = <390000>;
|
||||
compatible = "brcm,brcmstb-i2c";
|
||||
interrupt-parent = <&upg_aon_irq0_intc>;
|
||||
reg = <0x408980 0x58>;
|
||||
interrupts = <27>;
|
||||
interrupt-names = "upg_bscd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@430000 {
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&phy1>;
|
||||
|
@ -189,5 +237,47 @@
|
|||
interrupts = <66>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <86>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -221,5 +221,47 @@
|
|||
interrupts = <73>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@181000 {
|
||||
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <40>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcm,broken-ncq;
|
||||
brcm,broken-phy;
|
||||
status = "disabled";
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1800000 {
|
||||
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x180100 0x0eff>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -29,6 +29,26 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bsce {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -64,3 +84,11 @@
|
|||
&ohci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -29,6 +29,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -29,6 +29,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -29,6 +29,18 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&bsca {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bscd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -40,3 +52,11 @@
|
|||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -1,5 +1,9 @@
|
|||
/dts-v1/;
|
||||
|
||||
/memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
|
||||
/memreserve/ 0x00001000 0x000ef000; /* YAMON */
|
||||
/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
9
arch/mips/boot/dts/xilfpga/Makefile
Normal file
9
arch/mips/boot/dts/xilfpga/Makefile
Normal file
|
@ -0,0 +1,9 @@
|
|||
dtb-$(CONFIG_XILFPGA_NEXYS4DDR) += nexys4ddr.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
|
||||
# Force kbuild to make empty built-in.o if necessary
|
||||
obj- += dummy.o
|
||||
|
||||
always := $(dtb-y)
|
||||
clean-files := *.dtb *.dtb.S
|
21
arch/mips/boot/dts/xilfpga/microAptiv.dtsi
Normal file
21
arch/mips/boot/dts/xilfpga/microAptiv.dtsi
Normal file
|
@ -0,0 +1,21 @@
|
|||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "img,xilfpga";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "mips,m14Kc";
|
||||
clocks = <&ext>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ext: ext {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
46
arch/mips/boot/dts/xilfpga/nexys4ddr.dts
Normal file
46
arch/mips/boot/dts/xilfpga/nexys4ddr.dts
Normal file
|
@ -0,0 +1,46 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "microAptiv.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "digilent,nexys4ddr";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>;
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller@0 {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
compatible = "mti,cpu-interrupt-controller";
|
||||
};
|
||||
|
||||
axi_gpio: gpio@10600000 {
|
||||
#gpio-cells = <1>;
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
gpio-controller;
|
||||
reg = <0x10600000 0x10000>;
|
||||
xlnx,all-inputs = <0x0>;
|
||||
xlnx,dout-default = <0x0>;
|
||||
xlnx,gpio-width = <0x16>;
|
||||
xlnx,interrupt-present = <0x0>;
|
||||
xlnx,is-dual = <0x0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
} ;
|
||||
|
||||
axi_uart16550: serial@10400000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x10400000 0x10000>;
|
||||
|
||||
reg-shift = <2>;
|
||||
reg-offset = <0x1000>;
|
||||
|
||||
clocks = <&ext>;
|
||||
};
|
||||
};
|
||||
|
||||
&ext {
|
||||
clock-frequency = <50000000>;
|
||||
};
|
Loading…
Add table
Add a link
Reference in a new issue