GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-03-17 20:54:10 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge branch 'pci/yinghai-eisa' into for-linus

Browse source 
* pci/yinghai-eisa:
  EISA/PCI: Init EISA early, before PNP
  EISA/PCI: Fix bus res reference
This commit is contained in:
Bjorn Helgaas 2013-04-02 18:02:28 -06:00
commit be7f088bd0
1 changed files with 47 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

69
drivers/eisa/pci_eisa.c
View file

@ -19,10 +19,10 @@
/* There is only *one* pci_eisa device per machine, right ? */ /* There is only *one* pci_eisa device per machine, right ? */
static struct eisa_root_device pci_eisa_root; static struct eisa_root_device pci_eisa_root;
static int __init pci_eisa_init(struct pci_dev *pdev, static int __init pci_eisa_init(struct pci_dev *pdev)
const struct pci_device_id *ent)
{ {
int rc; int rc, i;
struct resource *res, *bus_res = NULL;
if ((rc = pci_enable_device (pdev))) { if ((rc = pci_enable_device (pdev))) {
printk (KERN_ERR "pci_eisa : Could not enable device %s\n", printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
@ -30,9 +30,30 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
return rc; return rc;
} }
/*
* The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
* device, so the resources available on EISA are the same as those
* available on the 82375 bus. This works the same as a PCI-PCI
* bridge in subtractive-decode mode (see pci_read_bridge_bases()).
* We assume other PCI-EISA bridges are similar.
*
* eisa_root_register() can only deal with a single io port resource,
* so we use the first valid io port resource.
*/
pci_bus_for_each_resource(pdev->bus, res, i)
if (res && (res->flags & IORESOURCE_IO)) {
bus_res = res;
break;
}
if (!bus_res) {
dev_err(&pdev->dev, "No resources available\n");
return -1;
}
pci_eisa_root.dev = &pdev->dev; pci_eisa_root.dev = &pdev->dev;
pci_eisa_root.res = pdev->bus->resource[0]; pci_eisa_root.res = bus_res;
pci_eisa_root.bus_base_addr = pdev->bus->resource[0]->start; pci_eisa_root.bus_base_addr = bus_res->start;
pci_eisa_root.slots = EISA_MAX_SLOTS; pci_eisa_root.slots = EISA_MAX_SLOTS;
pci_eisa_root.dma_mask = pdev->dma_mask; pci_eisa_root.dma_mask = pdev->dma_mask;
dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root); dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
@ -45,22 +66,26 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
return 0; return 0;
} }
static struct pci_device_id pci_eisa_pci_tbl[] = { /*
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
PCI_CLASS_BRIDGE_EISA << 8, 0xffff00, 0 }, * Otherwise pnp resource will get enabled early and could prevent eisa
{ 0, } * to be initialized.
}; * Also need to make sure pci_eisa_init_early() is called after
* x86/pci_subsys_init().
static struct pci_driver __refdata pci_eisa_driver = { * So need to use subsys_initcall_sync with it.
.name = "pci_eisa", */
.id_table = pci_eisa_pci_tbl, static int __init pci_eisa_init_early(void)
.probe = pci_eisa_init,
};
static int __init pci_eisa_init_module (void)
{ {
return pci_register_driver (&pci_eisa_driver); struct pci_dev *dev = NULL;
} int ret;
device_initcall(pci_eisa_init_module); for_each_pci_dev(dev)
MODULE_DEVICE_TABLE(pci, pci_eisa_pci_tbl); if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
ret = pci_eisa_init(dev);
if (ret)
return ret;
}
return 0;
}
subsys_initcall_sync(pci_eisa_init_early);