diff --git a/arch/arm/include/asm/dma-direct.h b/arch/arm/include/asm/dma-direct.h deleted file mode 100644 index 4f7bcde03abb..000000000000 --- a/arch/arm/include/asm/dma-direct.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 05f29a72150b..c6aded1b069c 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h @@ -106,7 +106,7 @@ extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); */ extern void __set_dma_addr(unsigned int chan, void *addr); #define set_dma_addr(chan, addr) \ - __set_dma_addr(chan, (void *)__bus_to_virt(addr)) + __set_dma_addr(chan, (void *)isa_bus_to_virt(addr)) /* Set the DMA byte count for this channel * diff --git a/arch/arm/include/asm/hardware/dec21285.h b/arch/arm/include/asm/hardware/dec21285.h index eee390e8d4dc..894f2a635cbb 100644 --- a/arch/arm/include/asm/hardware/dec21285.h +++ b/arch/arm/include/asm/hardware/dec21285.h @@ -22,6 +22,13 @@ #define DC21285_IO(x) (x) #endif +/* + * The footbridge is programmed to expose the system RAM at 0xe0000000. + * The requirement is that the RAM isn't placed at bus address 0, which + * would clash with VGA cards. + */ +#define BUS_OFFSET 0xe0000000 + #define CSR_PCICMD DC21285_IO(0x0004) #define CSR_CLASSREV DC21285_IO(0x0008) #define CSR_PCICACHELINESIZE DC21285_IO(0x000c) diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index a55a9038abc8..d8eef4bd8c71 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -369,17 +369,6 @@ static inline unsigned long __virt_to_idmap(unsigned long x) #define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x)) -/* - * Virtual <-> DMA view memory address translations - * Again, these are *only* valid on the kernel direct mapped RAM - * memory. Use of these is *deprecated* (and that doesn't mean - * use the __ prefixed forms instead.) See dma-mapping.h. - */ -#ifndef __virt_to_bus -#define __virt_to_bus __virt_to_phys -#define __bus_to_virt __phys_to_virt -#endif - /* * Conversion between a struct page and a physical address. * diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index 1a3676109654..b7a4e403ba0f 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -46,7 +46,6 @@ endmenu # Footbridge support config FOOTBRIDGE def_bool y - select ARCH_HAS_PHYS_TO_DMA select ARCH_MIGHT_HAVE_PC_SERIO select ISA_DMA_API diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 9483eccea5ae..629e4676ed77 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -281,13 +281,3 @@ void footbridge_restart(enum reboot_mode mode, const char *cmd) *CSR_SA110_CNTL |= (1 << 13); } } - -dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) -{ - return paddr + (BUS_OFFSET - PHYS_OFFSET); -} - -phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr) -{ - return dev_addr - (BUS_OFFSET - PHYS_OFFSET); -} diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 372600bc15c8..f8920d0010de 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c @@ -5,6 +5,7 @@ * Copyright (C) 1998-2001 Russell King * Copyright (C) 1998-2000 Phil Blundell */ +#include #include #include #include @@ -241,6 +242,22 @@ static irqreturn_t dc21285_parity_irq(int irq, void *dev_id) return IRQ_HANDLED; } +static int dc21285_pci_bus_notifier(struct notifier_block *nb, + unsigned long action, + void *data) +{ + if (action != BUS_NOTIFY_ADD_DEVICE) + return NOTIFY_DONE; + + dma_direct_set_offset(data, PHYS_OFFSET, BUS_OFFSET, SZ_256M); + + return NOTIFY_OK; +} + +static struct notifier_block dc21285_pci_bus_nb = { + .notifier_call = dc21285_pci_bus_notifier, +}; + int __init dc21285_setup(int nr, struct pci_sys_data *sys) { struct resource *res; @@ -266,6 +283,8 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys) pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset); pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); + bus_register_notifier(&pci_bus_type, &dc21285_pci_bus_nb); + return 1; } @@ -329,7 +348,7 @@ void __init dc21285_preinit(void) */ *CSR_PCICSRBASE = 0xf4000000; *CSR_PCICSRIOBASE = 0; - *CSR_PCISDRAMBASE = __virt_to_bus(PAGE_OFFSET); + *CSR_PCISDRAMBASE = BUS_OFFSET; *CSR_PCIROMBASE = 0; *CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE | PCICMD_ERROR_BITS; diff --git a/arch/arm/mach-footbridge/dma-isa.c b/arch/arm/mach-footbridge/dma-isa.c index 0fc0705fd58b..937f5376d5e7 100644 --- a/arch/arm/mach-footbridge/dma-isa.c +++ b/arch/arm/mach-footbridge/dma-isa.c @@ -11,6 +11,7 @@ * arch/arm/kernel/dma-ebsa285.c * Copyright (C) 1998 Phil Blundell */ +#include #include #include #include @@ -18,6 +19,7 @@ #include #include +#include #define ISA_DMA_MASK 0 #define ISA_DMA_MODE 1 @@ -221,6 +223,8 @@ static int __init isa_dma_init(void) request_dma(DMA_ISA_CASCADE, "cascade"); } + dma_direct_set_offset(&isa_dma_dev, PHYS_OFFSET, BUS_OFFSET, SZ_256M); + return 0; } core_initcall(isa_dma_init); diff --git a/arch/arm/mach-footbridge/include/mach/dma-direct.h b/arch/arm/mach-footbridge/include/mach/dma-direct.h deleted file mode 100644 index 01f9e8367c00..000000000000 --- a/arch/arm/mach-footbridge/include/mach/dma-direct.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef MACH_FOOTBRIDGE_DMA_DIRECT_H -#define MACH_FOOTBRIDGE_DMA_DIRECT_H 1 - -dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); -phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr); - -#endif /* MACH_FOOTBRIDGE_DMA_DIRECT_H */ diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h index 8f0ca8e8b37e..9516877667d7 100644 --- a/arch/arm/mach-footbridge/include/mach/memory.h +++ b/arch/arm/mach-footbridge/include/mach/memory.h @@ -16,15 +16,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -/* - * The footbridge is programmed to expose the system RAM at 0xe0000000. - * The requirement is that the RAM isn't placed at bus address 0, which - * would clash with VGA cards. - */ -#define BUS_OFFSET 0xe0000000 -#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) -#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) - /* * Cache flushing area. */