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mmc: meson-gx: improve initial configuration

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Config values which are not changed during runtime we can set
in the probe function already.
The block size setting is overwritten later in
meson_mmc_start_cmd anyway if needed, so it doesn't harm if we
remove this setting in meson_mmc_set_ios.

In addition write config register only if configuration changed.

Don't change the location of clock initialization as in an
earlier version of the patch, this change causes a hang.
This issue was reported and fix suggested by:
Helmut Klein <hgkr.klein@gmail.com>

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Heiner Kallweit 2017-03-04 13:35:13 +01:00 • committed by Ulf Hansson
parent 7b9ebad38f
commit c01d1219ac
1 changed files with 17 additions and 12 deletions
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29
drivers/mmc/host/meson-gx-mmc.c
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@ -394,15 +394,6 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
val &= ~(CFG_BUS_WIDTH_MASK << CFG_BUS_WIDTH_SHIFT); val &= ~(CFG_BUS_WIDTH_MASK << CFG_BUS_WIDTH_SHIFT);
val |= bus_width << CFG_BUS_WIDTH_SHIFT; val |= bus_width << CFG_BUS_WIDTH_SHIFT;
val &= ~(CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT);
val |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT;
val &= ~(CFG_RESP_TIMEOUT_MASK << CFG_RESP_TIMEOUT_SHIFT);
val |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT;
val &= ~(CFG_RC_CC_MASK << CFG_RC_CC_SHIFT);
val |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT;
val &= ~CFG_DDR; val &= ~CFG_DDR;
if (ios->timing == MMC_TIMING_UHS_DDR50 || if (ios->timing == MMC_TIMING_UHS_DDR50 ||
ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_MMC_DDR52 ||
@ -413,11 +404,11 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (ios->timing == MMC_TIMING_MMC_HS400) if (ios->timing == MMC_TIMING_MMC_HS400)
val |= CFG_CHK_DS; val |= CFG_CHK_DS;
writel(val, host->regs + SD_EMMC_CFG); if (val != orig) {
writel(val, host->regs + SD_EMMC_CFG);
if (val != orig)
dev_dbg(host->dev, "%s: SD_EMMC_CFG: 0x%08x -> 0x%08x\n", dev_dbg(host->dev, "%s: SD_EMMC_CFG: 0x%08x -> 0x%08x\n",
__func__, orig, val); __func__, orig, val);
}
} }
static void meson_mmc_request_done(struct mmc_host *mmc, static void meson_mmc_request_done(struct mmc_host *mmc,
@ -695,6 +686,17 @@ static int meson_mmc_get_cd(struct mmc_host *mmc)
return status; return status;
} }
static void meson_mmc_cfg_init(struct meson_host *host)
{
u32 cfg = 0;
cfg |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT;
cfg |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT;
cfg |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT;
writel(cfg, host->regs + SD_EMMC_CFG);
}
static const struct mmc_host_ops meson_mmc_ops = { static const struct mmc_host_ops meson_mmc_ops = {
.request = meson_mmc_request, .request = meson_mmc_request,
.set_ios = meson_mmc_set_ios, .set_ios = meson_mmc_set_ios,
@ -767,6 +769,9 @@ static int meson_mmc_probe(struct platform_device *pdev)
writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN);
/* set config to sane default */
meson_mmc_cfg_init(host);
ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq,
meson_mmc_irq_thread, IRQF_SHARED, meson_mmc_irq_thread, IRQF_SHARED,
DRIVER_NAME, host); DRIVER_NAME, host);