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Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (476 commits) vmwgfx: Implement a proper GMR eviction mechanism drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2 drm/radeon/kms: properly compute group_size on 6xx/7xx drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker drm/radeon/kms/evergreen: set the clear state to the blit state drm/radeon/kms: don't poll dac load detect. gpu: Add Intel GMA500(Poulsbo) Stub Driver drm/radeon/kms: MC vram map needs to be >= pci aperture size drm/radeon/kms: implement display watermark support for evergreen drm/radeon/kms/evergreen: add some additional safe regs v2 drm/radeon/r600: fix tiling issues in CS checker. drm/i915: Move gpu_write_list to per-ring drm/i915: Invalidate the to-ring, flush the old-ring when updating domains drm/i915/ringbuffer: Write the value passed in to the tail register agp/intel: Restore valid PTE bit for Sandybridge afterbdd3072
drm/i915: Fix flushing regression from9af90d19f
drm/i915/sdvo: Remove unused encoding member i915: enable AVI infoframe for intel_hdmi.c [v4] drm/i915: Fix current fb blocking for page flip drm/i915: IS_IRONLAKE is synonymous with gen == 5 ... Fix up conflicts in - drivers/gpu/drm/i915/{i915_gem.c, i915/intel_overlay.c}: due to the new simplified stack-based kmap_atomic() interface - drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: added .llseek entry due to BKL removal cleanups.
This commit is contained in:
commit
c48c43e422
212 changed files with 18938 additions and 11862 deletions
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@ -35,6 +35,7 @@
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#include <drm_edid.h>
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#include <drm_dp_helper.h>
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#include <drm_fixed.h>
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#include <drm_crtc_helper.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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@ -149,12 +150,6 @@ struct radeon_tmds_pll {
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#define RADEON_PLL_USE_POST_DIV (1 << 12)
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#define RADEON_PLL_IS_LCD (1 << 13)
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/* pll algo */
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enum radeon_pll_algo {
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PLL_ALGO_LEGACY,
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PLL_ALGO_NEW
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};
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struct radeon_pll {
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/* reference frequency */
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uint32_t reference_freq;
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@ -187,8 +182,6 @@ struct radeon_pll {
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/* pll id */
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uint32_t id;
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/* pll algo */
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enum radeon_pll_algo algo;
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};
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struct radeon_i2c_chan {
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@ -240,6 +233,8 @@ struct radeon_mode_info {
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struct drm_property *tmds_pll_property;
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/* underscan */
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struct drm_property *underscan_property;
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struct drm_property *underscan_hborder_property;
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struct drm_property *underscan_vborder_property;
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/* hardcoded DFP edid from BIOS */
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struct edid *bios_hardcoded_edid;
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@ -335,22 +330,24 @@ struct radeon_encoder_ext_tmds {
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struct radeon_atom_ss {
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uint16_t percentage;
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uint8_t type;
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uint8_t step;
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uint16_t step;
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uint8_t delay;
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uint8_t range;
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uint8_t refdiv;
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/* asic_ss */
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uint16_t rate;
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uint16_t amount;
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};
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struct radeon_encoder_atom_dig {
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bool linkb;
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/* atom dig */
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bool coherent_mode;
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int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
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/* atom lvds */
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uint32_t lvds_misc;
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int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
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/* atom lvds/edp */
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uint32_t lcd_misc;
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uint16_t panel_pwr_delay;
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enum radeon_pll_algo pll_algo;
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struct radeon_atom_ss *ss;
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uint32_t lcd_ss_id;
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/* panel mode */
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struct drm_display_mode native_mode;
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};
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@ -369,6 +366,8 @@ struct radeon_encoder {
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uint32_t pixel_clock;
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enum radeon_rmx_type rmx_type;
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enum radeon_underscan_type underscan_type;
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uint32_t underscan_hborder;
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uint32_t underscan_vborder;
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struct drm_display_mode native_mode;
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void *enc_priv;
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int audio_polling_active;
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@ -435,6 +434,11 @@ struct radeon_framebuffer {
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struct drm_gem_object *obj;
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};
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/* radeon_get_crtc_scanoutpos() return flags */
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#define RADEON_SCANOUTPOS_VALID (1 << 0)
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#define RADEON_SCANOUTPOS_INVBL (1 << 1)
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#define RADEON_SCANOUTPOS_ACCURATE (1 << 2)
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extern enum radeon_tv_std
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radeon_combios_get_tv_info(struct radeon_device *rdev);
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extern enum radeon_tv_std
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extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
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extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
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struct radeon_atom_ss *ss,
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int id);
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extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
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struct radeon_atom_ss *ss,
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int id, u32 clock);
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extern void radeon_compute_pll(struct radeon_pll *pll,
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uint64_t freq,
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uint32_t *dot_clock_p,
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extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
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extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb);
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extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y,
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enum mode_set_atomic state);
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extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb);
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extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y,
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enum mode_set_atomic state);
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extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y, int atomic);
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extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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int x, int y);
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extern int radeon_get_crtc_scanoutpos(struct radeon_device *rdev, int crtc, int *vpos, int *hpos);
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extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
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extern struct edid *
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radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
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