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mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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4 changed files with 9 additions and 17 deletions
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@ -23,13 +23,8 @@ enum nand_io {
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};
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enum omap_ecc {
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/* 1-bit ecc: stored at end of spare area */
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OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
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OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
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/* 1-bit ecc: stored at beginning of spare area as romcode */
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OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
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/* 1-bit ECC calculation by GPMC, Error detection by Software */
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OMAP_ECC_HAM1_CODE_HW,
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OMAP_ECC_HAM1_CODE_HW = 0,
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/* 4-bit ECC calculation by GPMC, Error detection by Software */
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OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
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/* 4-bit ECC calculation by GPMC, Error detection by ELM */
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