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https://github.com/Fishwaldo/Star64_linux.git
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firewire: normalize STATE_CLEAR/SET CSR access interface
Push the maintenance of STATE_CLEAR/SET.abdicate down into the card driver. This way, the read/write_csr_reg driver method works uniformly across all CSR offsets. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
This commit is contained in:
parent
db3c9cc105
commit
c8a94ded57
5 changed files with 30 additions and 40 deletions
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@ -524,7 +524,7 @@ static void update_topology_map(struct fw_card *card,
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}
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}
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void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation,
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void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation,
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int self_id_count, u32 *self_ids)
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int self_id_count, u32 *self_ids, bool bm_abdicate)
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{
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{
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struct fw_node *local_node;
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struct fw_node *local_node;
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unsigned long flags;
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unsigned long flags;
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@ -552,8 +552,7 @@ void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation,
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smp_wmb();
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smp_wmb();
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card->generation = generation;
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card->generation = generation;
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card->reset_jiffies = jiffies;
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card->reset_jiffies = jiffies;
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card->bm_abdicate = card->csr_abdicate;
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card->bm_abdicate = bm_abdicate;
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card->csr_abdicate = false;
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fw_schedule_bm_work(card, 0);
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fw_schedule_bm_work(card, 0);
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local_node = build_tree(card, self_ids, self_id_count);
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local_node = build_tree(card, self_ids, self_id_count);
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@ -982,20 +982,6 @@ static const struct fw_address_region registers_region =
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{ .start = CSR_REGISTER_BASE,
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{ .start = CSR_REGISTER_BASE,
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.end = CSR_REGISTER_BASE | CSR_CONFIG_ROM, };
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.end = CSR_REGISTER_BASE | CSR_CONFIG_ROM, };
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static u32 read_state_register(struct fw_card *card)
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{
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u32 value;
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/* Bit 8 (cmstr): */
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value = card->driver->read_csr_reg(card, CSR_STATE_CLEAR);
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/* Bit 10 (abdicate): */
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if (card->csr_abdicate)
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value |= CSR_STATE_BIT_ABDICATE;
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return value;
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}
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static void update_split_timeout(struct fw_card *card)
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static void update_split_timeout(struct fw_card *card)
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{
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{
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unsigned int cycles;
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unsigned int cycles;
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@ -1021,29 +1007,25 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
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switch (reg) {
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switch (reg) {
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case CSR_STATE_CLEAR:
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case CSR_STATE_CLEAR:
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if (tcode == TCODE_READ_QUADLET_REQUEST) {
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if (tcode == TCODE_READ_QUADLET_REQUEST)
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*data = cpu_to_be32(read_state_register(card));
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*data = cpu_to_be32(card->driver->
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} else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
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read_csr_reg(card, CSR_STATE_CLEAR));
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else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
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card->driver->write_csr_reg(card, CSR_STATE_CLEAR,
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card->driver->write_csr_reg(card, CSR_STATE_CLEAR,
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be32_to_cpu(*data));
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be32_to_cpu(*data));
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if (*data & cpu_to_be32(CSR_STATE_BIT_ABDICATE))
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else
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card->csr_abdicate = false;
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} else {
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rcode = RCODE_TYPE_ERROR;
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rcode = RCODE_TYPE_ERROR;
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}
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break;
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break;
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case CSR_STATE_SET:
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case CSR_STATE_SET:
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if (tcode == TCODE_READ_QUADLET_REQUEST) {
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if (tcode == TCODE_READ_QUADLET_REQUEST)
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*data = cpu_to_be32(read_state_register(card));
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*data = cpu_to_be32(card->driver->
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} else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
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read_csr_reg(card, CSR_STATE_SET));
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else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
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card->driver->write_csr_reg(card, CSR_STATE_SET,
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card->driver->write_csr_reg(card, CSR_STATE_SET,
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be32_to_cpu(*data));
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be32_to_cpu(*data));
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if (*data & cpu_to_be32(CSR_STATE_BIT_ABDICATE))
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else
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card->csr_abdicate = true;
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} else {
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rcode = RCODE_TYPE_ERROR;
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rcode = RCODE_TYPE_ERROR;
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}
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break;
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break;
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case CSR_NODE_IDS:
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case CSR_NODE_IDS:
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@ -1063,7 +1045,8 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
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case CSR_RESET_START:
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case CSR_RESET_START:
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if (tcode == TCODE_WRITE_QUADLET_REQUEST)
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if (tcode == TCODE_WRITE_QUADLET_REQUEST)
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card->csr_abdicate = false;
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card->driver->write_csr_reg(card, CSR_STATE_CLEAR,
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CSR_STATE_BIT_ABDICATE);
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else
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else
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rcode = RCODE_TYPE_ERROR;
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rcode = RCODE_TYPE_ERROR;
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break;
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break;
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@ -196,7 +196,7 @@ static inline void fw_node_put(struct fw_node *node)
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}
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}
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void fw_core_handle_bus_reset(struct fw_card *card, int node_id,
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void fw_core_handle_bus_reset(struct fw_card *card, int node_id,
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int generation, int self_id_count, u32 *self_ids);
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int generation, int self_id_count, u32 *self_ids, bool bm_abdicate);
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void fw_destroy_nodes(struct fw_card *card);
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void fw_destroy_nodes(struct fw_card *card);
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/*
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/*
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@ -174,6 +174,7 @@ struct fw_ohci {
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unsigned int pri_req_max;
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unsigned int pri_req_max;
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u32 bus_time;
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u32 bus_time;
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bool is_root;
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bool is_root;
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bool csr_state_setclear_abdicate;
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/*
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/*
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* Spinlock for accessing fw_ohci data. Never call out of
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* Spinlock for accessing fw_ohci data. Never call out of
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@ -1529,7 +1530,9 @@ static void bus_reset_tasklet(unsigned long data)
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self_id_count, ohci->self_id_buffer);
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self_id_count, ohci->self_id_buffer);
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fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
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fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
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self_id_count, ohci->self_id_buffer);
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self_id_count, ohci->self_id_buffer,
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ohci->csr_state_setclear_abdicate);
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ohci->csr_state_setclear_abdicate = false;
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}
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}
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static irqreturn_t irq_handler(int irq, void *data)
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static irqreturn_t irq_handler(int irq, void *data)
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@ -2032,13 +2035,16 @@ static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
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switch (csr_offset) {
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switch (csr_offset) {
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case CSR_STATE_CLEAR:
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case CSR_STATE_CLEAR:
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case CSR_STATE_SET:
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case CSR_STATE_SET:
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/* the controller driver handles only the cmstr bit */
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if (ohci->is_root &&
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if (ohci->is_root &&
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(reg_read(ohci, OHCI1394_LinkControlSet) &
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(reg_read(ohci, OHCI1394_LinkControlSet) &
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OHCI1394_LinkControl_cycleMaster))
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OHCI1394_LinkControl_cycleMaster))
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return CSR_STATE_BIT_CMSTR;
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value = CSR_STATE_BIT_CMSTR;
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else
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else
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return 0;
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value = 0;
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if (ohci->csr_state_setclear_abdicate)
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value |= CSR_STATE_BIT_ABDICATE;
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return value;
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case CSR_NODE_IDS:
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case CSR_NODE_IDS:
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return reg_read(ohci, OHCI1394_NodeID) << 16;
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return reg_read(ohci, OHCI1394_NodeID) << 16;
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@ -2078,12 +2084,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
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switch (csr_offset) {
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switch (csr_offset) {
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case CSR_STATE_CLEAR:
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case CSR_STATE_CLEAR:
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/* the controller driver handles only the cmstr bit */
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if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) {
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if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) {
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reg_write(ohci, OHCI1394_LinkControlClear,
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reg_write(ohci, OHCI1394_LinkControlClear,
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OHCI1394_LinkControl_cycleMaster);
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OHCI1394_LinkControl_cycleMaster);
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flush_writes(ohci);
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flush_writes(ohci);
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}
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}
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if (value & CSR_STATE_BIT_ABDICATE)
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ohci->csr_state_setclear_abdicate = false;
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break;
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break;
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case CSR_STATE_SET:
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case CSR_STATE_SET:
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@ -2092,6 +2099,8 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
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OHCI1394_LinkControl_cycleMaster);
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OHCI1394_LinkControl_cycleMaster);
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flush_writes(ohci);
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flush_writes(ohci);
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}
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}
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if (value & CSR_STATE_BIT_ABDICATE)
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ohci->csr_state_setclear_abdicate = true;
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break;
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break;
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case CSR_NODE_IDS:
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case CSR_NODE_IDS:
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@ -119,8 +119,7 @@ struct fw_card {
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int bm_retries;
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int bm_retries;
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int bm_generation;
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int bm_generation;
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__be32 bm_transaction_data[2];
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__be32 bm_transaction_data[2];
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bool bm_abdicate; /* value of csr_abdicate before last bus reset */
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bool bm_abdicate;
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bool csr_abdicate; /* visible in CSR STATE_CLEAR/SET registers */
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bool priority_budget_implemented; /* controller feature */
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bool priority_budget_implemented; /* controller feature */
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bool broadcast_channel_auto_allocated; /* controller feature */
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bool broadcast_channel_auto_allocated; /* controller feature */
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