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usb: musb: pass configuration specifics via pdata
Use platform_data to pass musb configuration-specific details to musb driver. This patch will prevent that other platforms selecting HAVE_CLK and enabling musb won't break tree building. The other parts of it will come when linux-omap merge up more omap2/3 board-files. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
f362a47560
commit
ca6d1b1333
5 changed files with 51 additions and 208 deletions
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@ -317,7 +317,6 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
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printk(error, 6, status);
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printk(error, 6, status);
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return -ENODEV;
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return -ENODEV;
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}
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}
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data->multipoint = 1;
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tusb_device.dev.platform_data = data;
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tusb_device.dev.platform_data = data;
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/* REVISIT let the driver know what DMA channels work */
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/* REVISIT let the driver know what DMA channels work */
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@ -990,12 +990,6 @@ static void musb_shutdown(struct platform_device *pdev)
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* We don't currently use dynamic fifo setup capability to do anything
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* We don't currently use dynamic fifo setup capability to do anything
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* more than selecting one of a bunch of predefined configurations.
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* more than selecting one of a bunch of predefined configurations.
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*/
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*/
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#ifdef MUSB_C_DYNFIFO_DEF
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#define can_dynfifo() 1
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#else
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#define can_dynfifo() 0
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#endif
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#if defined(CONFIG_USB_TUSB6010) || \
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#if defined(CONFIG_USB_TUSB6010) || \
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defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
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defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
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static ushort __initdata fifo_mode = 4;
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static ushort __initdata fifo_mode = 4;
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@ -1008,8 +1002,6 @@ module_param(fifo_mode, ushort, 0);
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MODULE_PARM_DESC(fifo_mode, "initial endpoint configuration");
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MODULE_PARM_DESC(fifo_mode, "initial endpoint configuration");
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#define DYN_FIFO_SIZE (1<<(MUSB_C_RAM_BITS+2))
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enum fifo_style { FIFO_RXTX, FIFO_TX, FIFO_RX } __attribute__ ((packed));
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enum fifo_style { FIFO_RXTX, FIFO_TX, FIFO_RX } __attribute__ ((packed));
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enum buf_mode { BUF_SINGLE, BUF_DOUBLE } __attribute__ ((packed));
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enum buf_mode { BUF_SINGLE, BUF_DOUBLE } __attribute__ ((packed));
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@ -1119,11 +1111,12 @@ fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep,
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c_size = size - 3;
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c_size = size - 3;
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if (cfg->mode == BUF_DOUBLE) {
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if (cfg->mode == BUF_DOUBLE) {
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if ((offset + (maxpacket << 1)) > DYN_FIFO_SIZE)
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if ((offset + (maxpacket << 1)) >
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(1 << (musb->config->ram_bits + 2)))
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return -EMSGSIZE;
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return -EMSGSIZE;
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c_size |= MUSB_FIFOSZ_DPB;
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c_size |= MUSB_FIFOSZ_DPB;
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} else {
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} else {
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if ((offset + maxpacket) > DYN_FIFO_SIZE)
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if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2)))
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return -EMSGSIZE;
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return -EMSGSIZE;
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}
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}
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@ -1219,13 +1212,13 @@ static int __init ep_config_from_table(struct musb *musb)
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/* assert(offset > 0) */
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/* assert(offset > 0) */
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/* NOTE: for RTL versions >= 1.400 EPINFO and RAMINFO would
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/* NOTE: for RTL versions >= 1.400 EPINFO and RAMINFO would
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* be better than static MUSB_C_NUM_EPS and DYN_FIFO_SIZE...
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* be better than static musb->config->num_eps and DYN_FIFO_SIZE...
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*/
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*/
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for (i = 0; i < n; i++) {
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for (i = 0; i < n; i++) {
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u8 epn = cfg->hw_ep_num;
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u8 epn = cfg->hw_ep_num;
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if (epn >= MUSB_C_NUM_EPS) {
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if (epn >= musb->config->num_eps) {
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pr_debug("%s: invalid ep %d\n",
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pr_debug("%s: invalid ep %d\n",
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musb_driver_name, epn);
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musb_driver_name, epn);
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continue;
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continue;
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@ -1242,8 +1235,8 @@ static int __init ep_config_from_table(struct musb *musb)
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printk(KERN_DEBUG "%s: %d/%d max ep, %d/%d memory\n",
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printk(KERN_DEBUG "%s: %d/%d max ep, %d/%d memory\n",
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musb_driver_name,
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musb_driver_name,
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n + 1, MUSB_C_NUM_EPS * 2 - 1,
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n + 1, musb->config->num_eps * 2 - 1,
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offset, DYN_FIFO_SIZE);
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offset, (1 << (musb->config->ram_bits + 2)));
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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if (!musb->bulk_ep) {
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if (!musb->bulk_ep) {
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@ -1270,7 +1263,7 @@ static int __init ep_config_from_hw(struct musb *musb)
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/* FIXME pick up ep0 maxpacket size */
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/* FIXME pick up ep0 maxpacket size */
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for (epnum = 1; epnum < MUSB_C_NUM_EPS; epnum++) {
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for (epnum = 1; epnum < musb->config->num_eps; epnum++) {
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musb_ep_select(mbase, epnum);
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musb_ep_select(mbase, epnum);
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hw_ep = musb->endpoints + epnum;
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hw_ep = musb->endpoints + epnum;
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@ -1424,14 +1417,14 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
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musb->epmask = 1;
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musb->epmask = 1;
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if (reg & MUSB_CONFIGDATA_DYNFIFO) {
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if (reg & MUSB_CONFIGDATA_DYNFIFO) {
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if (can_dynfifo())
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if (musb->config->dyn_fifo)
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status = ep_config_from_table(musb);
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status = ep_config_from_table(musb);
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else {
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else {
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ERR("reconfigure software for Dynamic FIFOs\n");
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ERR("reconfigure software for Dynamic FIFOs\n");
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status = -ENODEV;
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status = -ENODEV;
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}
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}
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} else {
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} else {
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if (!can_dynfifo())
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if (!musb->config->dyn_fifo)
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status = ep_config_from_hw(musb);
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status = ep_config_from_hw(musb);
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else {
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else {
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ERR("reconfigure software for static FIFOs\n");
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ERR("reconfigure software for static FIFOs\n");
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@ -1788,7 +1781,8 @@ static void musb_irq_work(struct work_struct *data)
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*/
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*/
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static struct musb *__init
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static struct musb *__init
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allocate_instance(struct device *dev, void __iomem *mbase)
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allocate_instance(struct device *dev,
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struct musb_hdrc_config *config, void __iomem *mbase)
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{
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{
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struct musb *musb;
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struct musb *musb;
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struct musb_hw_ep *ep;
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struct musb_hw_ep *ep;
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@ -1820,8 +1814,9 @@ allocate_instance(struct device *dev, void __iomem *mbase)
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musb->mregs = mbase;
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musb->mregs = mbase;
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musb->ctrl_base = mbase;
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musb->ctrl_base = mbase;
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musb->nIrq = -ENODEV;
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musb->nIrq = -ENODEV;
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musb->config = config;
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for (epnum = 0, ep = musb->endpoints;
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for (epnum = 0, ep = musb->endpoints;
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epnum < MUSB_C_NUM_EPS;
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epnum < musb->config->num_eps;
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epnum++, ep++) {
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epnum++, ep++) {
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ep->musb = musb;
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ep->musb = musb;
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@ -1929,7 +1924,7 @@ bad_config:
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}
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}
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/* allocate */
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/* allocate */
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musb = allocate_instance(dev, ctrl);
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musb = allocate_instance(dev, plat->config, ctrl);
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if (!musb)
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if (!musb)
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return -ENOMEM;
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return -ENOMEM;
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@ -1987,7 +1982,7 @@ bad_config:
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musb_generic_disable(musb);
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musb_generic_disable(musb);
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/* setup musb parts of the core (especially endpoints) */
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/* setup musb parts of the core (especially endpoints) */
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status = musb_core_init(plat->multipoint
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status = musb_core_init(plat->config->multipoint
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? MUSB_CONTROLLER_MHDRC
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? MUSB_CONTROLLER_MHDRC
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: MUSB_CONTROLLER_HDRC, musb);
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: MUSB_CONTROLLER_HDRC, musb);
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if (status < 0)
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if (status < 0)
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@ -56,18 +56,6 @@ struct musb_ep;
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#include "musb_debug.h"
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#include "musb_debug.h"
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#include "musb_dma.h"
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#include "musb_dma.h"
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#ifdef CONFIG_USB_MUSB_SOC
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/*
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* Get core configuration from a header converted (by cfg_conv)
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* from the Verilog config file generated by the core config utility
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*
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* For now we assume that header is provided along with other
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* arch-specific files. Discrete chips will need a build tweak.
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* So will using AHB IDs from silicon that provides them.
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*/
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#include <asm/arch/hdrc_cnf.h>
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#endif
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#include "musb_io.h"
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#include "musb_io.h"
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#include "musb_regs.h"
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#include "musb_regs.h"
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@ -440,6 +428,8 @@ struct musb {
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struct usb_gadget_driver *gadget_driver; /* its driver */
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struct usb_gadget_driver *gadget_driver; /* its driver */
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#endif
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#endif
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struct musb_hdrc_config *config;
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#ifdef MUSB_CONFIG_PROC_FS
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#ifdef MUSB_CONFIG_PROC_FS
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struct proc_dir_entry *proc_entry;
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struct proc_dir_entry *proc_entry;
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#endif
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#endif
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@ -230,173 +230,4 @@ extern u8 tusb_get_revision(struct musb *musb);
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#define TUSB_REV_30 0x30
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#define TUSB_REV_30 0x30
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#define TUSB_REV_31 0x31
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#define TUSB_REV_31 0x31
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/*----------------------------------------------------------------------------*/
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#ifdef CONFIG_USB_TUSB6010
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/* configuration parameters specific to this silicon */
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/* Number of Tx endpoints. Legal values are 1 - 16 (this value includes EP0) */
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#define MUSB_C_NUM_EPT 16
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/* Number of Rx endpoints. Legal values are 1 - 16 (this value includes EP0) */
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#define MUSB_C_NUM_EPR 16
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/* Endpoint 1 to 15 direction types. C_EP1_DEF is defined if either Tx endpoint
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* 1 or Rx endpoint 1 are used.
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*/
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#define MUSB_C_EP1_DEF
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/* C_EP1_TX_DEF is defined if Tx endpoint 1 is used */
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#define MUSB_C_EP1_TX_DEF
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/* C_EP1_RX_DEF is defined if Rx endpoint 1 is used */
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#define MUSB_C_EP1_RX_DEF
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/* C_EP1_TOR_DEF is defined if Tx endpoint 1 and Rx endpoint 1 share a FIFO */
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/* #define C_EP1_TOR_DEF */
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/* C_EP1_TAR_DEF is defined if both Tx endpoint 1 and Rx endpoint 1 are used
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* and do not share a FIFO.
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*/
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#define MUSB_C_EP1_TAR_DEF
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/* Similarly for all other used endpoints */
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#define MUSB_C_EP2_DEF
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#define MUSB_C_EP2_TX_DEF
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#define MUSB_C_EP2_RX_DEF
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#define MUSB_C_EP2_TAR_DEF
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#define MUSB_C_EP3_DEF
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#define MUSB_C_EP3_TX_DEF
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#define MUSB_C_EP3_RX_DEF
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#define MUSB_C_EP3_TAR_DEF
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#define MUSB_C_EP4_DEF
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#define MUSB_C_EP4_TX_DEF
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#define MUSB_C_EP4_RX_DEF
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#define MUSB_C_EP4_TAR_DEF
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/* Endpoint 1 to 15 FIFO address bits. Legal values are 3 to 13 - corresponding
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* to FIFO sizes of 8 to 8192 bytes. If an Tx endpoint shares a FIFO with an Rx
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* endpoint then the Rx FIFO size must be the same as the Tx FIFO size. All
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* endpoints 1 to 15 must be defined, unused endpoints should be set to 2.
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*/
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#define MUSB_C_EP1T_BITS 5
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#define MUSB_C_EP1R_BITS 5
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#define MUSB_C_EP2T_BITS 5
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#define MUSB_C_EP2R_BITS 5
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#define MUSB_C_EP3T_BITS 3
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#define MUSB_C_EP3R_BITS 3
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#define MUSB_C_EP4T_BITS 3
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#define MUSB_C_EP4R_BITS 3
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#define MUSB_C_EP5T_BITS 2
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#define MUSB_C_EP5R_BITS 2
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#define MUSB_C_EP6T_BITS 2
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#define MUSB_C_EP6R_BITS 2
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#define MUSB_C_EP7T_BITS 2
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#define MUSB_C_EP7R_BITS 2
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#define MUSB_C_EP8T_BITS 2
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#define MUSB_C_EP8R_BITS 2
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#define MUSB_C_EP9T_BITS 2
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#define MUSB_C_EP9R_BITS 2
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#define MUSB_C_EP10T_BITS 2
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#define MUSB_C_EP10R_BITS 2
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#define MUSB_C_EP11T_BITS 2
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#define MUSB_C_EP11R_BITS 2
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#define MUSB_C_EP12T_BITS 2
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#define MUSB_C_EP12R_BITS 2
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#define MUSB_C_EP13T_BITS 2
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#define MUSB_C_EP13R_BITS 2
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#define MUSB_C_EP14T_BITS 2
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#define MUSB_C_EP14R_BITS 2
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#define MUSB_C_EP15T_BITS 2
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#define MUSB_C_EP15R_BITS 2
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/* Define the following constant if the USB2.0 Transceiver Macrocell data width
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* is 16-bits.
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*/
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/* #define C_UTM_16 */
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/* Define this constant if the CPU uses big-endian byte ordering. */
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/* #define C_BIGEND */
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/* Define the following constant if any Tx endpoint is required to support
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* multiple bulk packets.
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*/
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/* #define C_MP_TX */
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/* Define the following constant if any Rx endpoint is required to support
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* multiple bulk packets.
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*/
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/* #define C_MP_RX */
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/* Define the following constant if any Tx endpoint is required to support high
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* bandwidth ISO.
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*/
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/* #define C_HB_TX */
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/* Define the following constant if any Rx endpoint is required to support high
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* bandwidth ISO.
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*/
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/* #define C_HB_RX */
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/* Define the following constant if software connect/disconnect control is
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* required.
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*/
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#define MUSB_C_SOFT_CON
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/* Define the following constant if Vendor Control Registers are required. */
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/* #define C_VEND_REG */
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/* Vendor control register widths. */
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#define MUSB_C_VCTL_BITS 4
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#define MUSB_C_VSTAT_BITS 8
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/* Define the following constant to include a DMA controller. */
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/* #define C_DMA */
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/* Define the following constant if 2 or more DMA channels are required. */
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/* #define C_DMA2 */
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/* Define the following constant if 3 or more DMA channels are required. */
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/* #define C_DMA3 */
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/* Define the following constant if 4 or more DMA channels are required. */
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/* #define C_DMA4 */
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/* Define the following constant if 5 or more DMA channels are required. */
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/* #define C_DMA5 */
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/* Define the following constant if 6 or more DMA channels are required. */
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/* #define C_DMA6 */
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/* Define the following constant if 7 or more DMA channels are required. */
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/* #define C_DMA7 */
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/* Define the following constant if 8 or more DMA channels are required. */
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/* #define C_DMA8 */
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/* Enable Dynamic FIFO Sizing */
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#define MUSB_C_DYNFIFO_DEF
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||||||
/* Derived constants. The following constants are derived from the previous
|
|
||||||
* configuration constants
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Total number of endpoints. Legal values are 2 - 16. This must be equal to
|
|
||||||
* the larger of C_NUM_EPT, C_NUM_EPR
|
|
||||||
*/
|
|
||||||
/* #define MUSB_C_NUM_EPS 5 */
|
|
||||||
|
|
||||||
/* C_EPMAX_BITS is equal to the largest endpoint FIFO word address bits */
|
|
||||||
#define MUSB_C_EPMAX_BITS 11
|
|
||||||
|
|
||||||
/* C_RAM_BITS is the number of address bits required to address the RAM (32-bit
|
|
||||||
* addresses). It is defined as log2 of the sum of 2** of all the endpoint FIFO
|
|
||||||
* dword address bits (rounded up).
|
|
||||||
*/
|
|
||||||
#define MUSB_C_RAM_BITS 12
|
|
||||||
|
|
||||||
#endif /* CONFIG_USB_TUSB6010 */
|
|
||||||
|
|
||||||
#endif /* __TUSB6010_H__ */
|
#endif /* __TUSB6010_H__ */
|
||||||
|
|
|
@ -19,6 +19,36 @@ enum musb_mode {
|
||||||
|
|
||||||
struct clk;
|
struct clk;
|
||||||
|
|
||||||
|
struct musb_hdrc_eps_bits {
|
||||||
|
const char name[16];
|
||||||
|
u8 bits;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct musb_hdrc_config {
|
||||||
|
/* MUSB configuration-specific details */
|
||||||
|
unsigned multipoint:1; /* multipoint device */
|
||||||
|
unsigned dyn_fifo:1; /* supports dynamic fifo sizing */
|
||||||
|
unsigned soft_con:1; /* soft connect required */
|
||||||
|
unsigned utm_16:1; /* utm data witdh is 16 bits */
|
||||||
|
unsigned big_endian:1; /* true if CPU uses big-endian */
|
||||||
|
unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */
|
||||||
|
unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */
|
||||||
|
unsigned high_iso_tx:1; /* Tx ep required for HB iso */
|
||||||
|
unsigned high_iso_rx:1; /* Rx ep required for HD iso */
|
||||||
|
unsigned dma:1; /* supports DMA */
|
||||||
|
unsigned vendor_req:1; /* vendor registers required */
|
||||||
|
|
||||||
|
u8 num_eps; /* number of endpoints _with_ ep0 */
|
||||||
|
u8 dma_channels; /* number of dma channels */
|
||||||
|
u8 dyn_fifo_size; /* dynamic size in bytes */
|
||||||
|
u8 vendor_ctrl; /* vendor control reg width */
|
||||||
|
u8 vendor_stat; /* vendor status reg witdh */
|
||||||
|
u8 dma_req_chan; /* bitmask for required dma channels */
|
||||||
|
u8 ram_bits; /* ram address size */
|
||||||
|
|
||||||
|
struct musb_hdrc_eps_bits *eps_bits;
|
||||||
|
};
|
||||||
|
|
||||||
struct musb_hdrc_platform_data {
|
struct musb_hdrc_platform_data {
|
||||||
/* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
|
/* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
|
||||||
u8 mode;
|
u8 mode;
|
||||||
|
@ -38,16 +68,14 @@ struct musb_hdrc_platform_data {
|
||||||
/* (HOST or OTG) msec/2 after VBUS on till power good */
|
/* (HOST or OTG) msec/2 after VBUS on till power good */
|
||||||
u8 potpgt;
|
u8 potpgt;
|
||||||
|
|
||||||
/* TBD: chip defaults should probably go someplace else,
|
|
||||||
* e.g. number of tx/rx endpoints, etc
|
|
||||||
*/
|
|
||||||
unsigned multipoint:1;
|
|
||||||
|
|
||||||
/* Power the device on or off */
|
/* Power the device on or off */
|
||||||
int (*set_power)(int state);
|
int (*set_power)(int state);
|
||||||
|
|
||||||
/* Turn device clock on or off */
|
/* Turn device clock on or off */
|
||||||
int (*set_clock)(struct clk *clock, int is_on);
|
int (*set_clock)(struct clk *clock, int is_on);
|
||||||
|
|
||||||
|
/* MUSB configuration-specific details */
|
||||||
|
struct musb_hdrc_config *config;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue