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net: dsa: lantiq_gswip: serialize access to the PCE registers
The GSWIP switch accesses various bridging layer tables (VLANs, FDBs, forwarding rules) indirectly through PCE registers. These hardware accesses are non-atomic, being comprised of several register reads and writes. These accesses are currently serialized by the rtnl_lock, but DSA is changing its driver API and that lock will no longer be held when calling ->port_fdb_add() and ->port_fdb_del(). So this driver needs to serialize the access to the PCE registers using its own locking scheme. This patch adds that. Note that the driver also uses the gswip_pce_load_microcode() function to load a static configuration for the packet classification engine into a table using the same registers. It is currently not protected, but since that configuration is only done from the dsa_switch_ops :: setup method, there is no risk of it being concurrent with other operations. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
f7eb4a1c08
commit
cf231b436f
1 changed files with 23 additions and 5 deletions
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@ -276,6 +276,7 @@ struct gswip_priv {
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int num_gphy_fw;
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int num_gphy_fw;
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struct gswip_gphy_fw *gphy_fw;
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struct gswip_gphy_fw *gphy_fw;
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u32 port_vlan_filter;
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u32 port_vlan_filter;
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struct mutex pce_table_lock;
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};
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};
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struct gswip_pce_table_entry {
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struct gswip_pce_table_entry {
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@ -523,10 +524,14 @@ static int gswip_pce_table_entry_read(struct gswip_priv *priv,
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u16 addr_mode = tbl->key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSRD :
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u16 addr_mode = tbl->key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSRD :
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GSWIP_PCE_TBL_CTRL_OPMOD_ADRD;
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GSWIP_PCE_TBL_CTRL_OPMOD_ADRD;
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mutex_lock(&priv->pce_table_lock);
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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GSWIP_PCE_TBL_CTRL_BAS);
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GSWIP_PCE_TBL_CTRL_BAS);
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if (err)
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if (err) {
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mutex_unlock(&priv->pce_table_lock);
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return err;
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return err;
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}
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gswip_switch_w(priv, tbl->index, GSWIP_PCE_TBL_ADDR);
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gswip_switch_w(priv, tbl->index, GSWIP_PCE_TBL_ADDR);
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gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |
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gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |
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@ -536,8 +541,10 @@ static int gswip_pce_table_entry_read(struct gswip_priv *priv,
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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GSWIP_PCE_TBL_CTRL_BAS);
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GSWIP_PCE_TBL_CTRL_BAS);
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if (err)
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if (err) {
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mutex_unlock(&priv->pce_table_lock);
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return err;
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return err;
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}
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for (i = 0; i < ARRAY_SIZE(tbl->key); i++)
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for (i = 0; i < ARRAY_SIZE(tbl->key); i++)
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tbl->key[i] = gswip_switch_r(priv, GSWIP_PCE_TBL_KEY(i));
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tbl->key[i] = gswip_switch_r(priv, GSWIP_PCE_TBL_KEY(i));
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@ -553,6 +560,8 @@ static int gswip_pce_table_entry_read(struct gswip_priv *priv,
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tbl->valid = !!(crtl & GSWIP_PCE_TBL_CTRL_VLD);
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tbl->valid = !!(crtl & GSWIP_PCE_TBL_CTRL_VLD);
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tbl->gmap = (crtl & GSWIP_PCE_TBL_CTRL_GMAP_MASK) >> 7;
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tbl->gmap = (crtl & GSWIP_PCE_TBL_CTRL_GMAP_MASK) >> 7;
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mutex_unlock(&priv->pce_table_lock);
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return 0;
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return 0;
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}
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}
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@ -565,10 +574,14 @@ static int gswip_pce_table_entry_write(struct gswip_priv *priv,
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u16 addr_mode = tbl->key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSWR :
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u16 addr_mode = tbl->key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSWR :
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GSWIP_PCE_TBL_CTRL_OPMOD_ADWR;
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GSWIP_PCE_TBL_CTRL_OPMOD_ADWR;
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mutex_lock(&priv->pce_table_lock);
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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GSWIP_PCE_TBL_CTRL_BAS);
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GSWIP_PCE_TBL_CTRL_BAS);
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if (err)
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if (err) {
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mutex_unlock(&priv->pce_table_lock);
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return err;
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return err;
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}
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gswip_switch_w(priv, tbl->index, GSWIP_PCE_TBL_ADDR);
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gswip_switch_w(priv, tbl->index, GSWIP_PCE_TBL_ADDR);
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gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |
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gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |
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@ -600,8 +613,12 @@ static int gswip_pce_table_entry_write(struct gswip_priv *priv,
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crtl |= GSWIP_PCE_TBL_CTRL_BAS;
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crtl |= GSWIP_PCE_TBL_CTRL_BAS;
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gswip_switch_w(priv, crtl, GSWIP_PCE_TBL_CTRL);
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gswip_switch_w(priv, crtl, GSWIP_PCE_TBL_CTRL);
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return gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,
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GSWIP_PCE_TBL_CTRL_BAS);
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GSWIP_PCE_TBL_CTRL_BAS);
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mutex_unlock(&priv->pce_table_lock);
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return err;
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}
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}
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/* Add the LAN port into a bridge with the CPU port by
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/* Add the LAN port into a bridge with the CPU port by
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@ -2104,6 +2121,7 @@ static int gswip_probe(struct platform_device *pdev)
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priv->ds->priv = priv;
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priv->ds->priv = priv;
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priv->ds->ops = priv->hw_info->ops;
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priv->ds->ops = priv->hw_info->ops;
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priv->dev = dev;
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priv->dev = dev;
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mutex_init(&priv->pce_table_lock);
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version = gswip_switch_r(priv, GSWIP_VERSION);
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version = gswip_switch_r(priv, GSWIP_VERSION);
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np = dev->of_node;
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np = dev->of_node;
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