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KVM: Set TMR when programming ioapic entry
We already know the trigger mode of a given interrupt when programming the ioapice entry. So it's not necessary to set it in each interrupt delivery. Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Reviewed-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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5 changed files with 25 additions and 11 deletions
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@ -468,6 +468,15 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic)
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return result;
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}
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void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr)
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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int i;
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for (i = 0; i < 8; i++)
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apic_set_reg(apic, APIC_TMR + 0x10 * i, tmr[i]);
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}
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static void apic_update_ppr(struct kvm_lapic *apic)
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{
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u32 tpr, isrv, ppr, old_ppr;
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@ -661,12 +670,6 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
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if (dest_map)
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__set_bit(vcpu->vcpu_id, dest_map);
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if (trig_mode) {
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apic_debug("level trig mode for vector %d", vector);
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apic_set_vector(vector, apic->regs + APIC_TMR);
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} else
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apic_clear_vector(vector, apic->regs + APIC_TMR);
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result = !apic_test_and_set_irr(vector, apic);
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trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode,
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trig_mode, vector, !result);
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