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MIPS: malta: Add support for SMP EVA

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Allow secondary cores to program their segment control registers
during smp bootstrap code. This enables EVA on Malta SMP
configurations

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Markos Chandras 2014-01-21 09:52:23 +00:00 • committed by Ralf Baechle
parent 2f284eac28
commit d0ba3544a5
2 changed files with 7 additions and 1 deletions
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6
arch/mips/include/asm/mach-malta/kernel-entry-init.h
View file

@ -154,6 +154,12 @@ nonsc_processor:
* Do SMP slave processor setup necessary before we can safely execute C code. * Do SMP slave processor setup necessary before we can safely execute C code.
*/ */
.macro smp_slave_setup .macro smp_slave_setup
#ifdef CONFIG_EVA
sync
ehb
mfc0 t1, CP0_CONFIG
eva_entry
#endif
.endm .endm
#endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */ #endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */

2
arch/mips/kernel/head.S
View file

@ -175,8 +175,8 @@ NESTED(smp_bootstrap, 16, sp)
DMT 10 # dmt t2 /* t0, t1 are used by CLI and setup_c0_status() */ DMT 10 # dmt t2 /* t0, t1 are used by CLI and setup_c0_status() */
jal mips_ihb jal mips_ihb
#endif /* CONFIG_MIPS_MT_SMTC */ #endif /* CONFIG_MIPS_MT_SMTC */
setup_c0_status_sec
smp_slave_setup smp_slave_setup
setup_c0_status_sec
#ifdef CONFIG_MIPS_MT_SMTC #ifdef CONFIG_MIPS_MT_SMTC
andi t2, t2, VPECONTROL_TE andi t2, t2, VPECONTROL_TE
beqz t2, 2f beqz t2, 2f