mirror of
https://github.com/Fishwaldo/Star64_linux.git
synced 2025-06-29 10:01:25 +00:00
Second batch of iwlwifi patches for 4.18
* Some preparations for new hardware; * A workaround to rescan the bus for the rare situation when older devices become irresponsive, * Hardening of the firmware loading code to avoid issues with corrupted files; * A few clean-ups and bugfixes. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEF3LNfgb2BPWm68smoUecoho8xfoFAlrhyQ0ACgkQoUecoho8 xfqjig//d8DtpK7RT7jI7+/m0goebkxMJIxfbwLdLYXO/YcLABVRFnbFrXCm8RyU DVRfGU9Jh5nHvv0Z20D5ul2nPkA8c6shR4k5lRusR8OAA+PPjS768bQvlT5EGaEC oWXmChX/qpMA2OGufgNy/wOX7c5Yjix/7nJ6iLxev+k6X20kr3Ar0rrKI8hLwUrS FrApZEiqgItxUc00JE3bmD3U6n+w7Cj9fCmD0gKBmftE76yTjJDis0fGk1e4Qu4g jtN4FNEsCtCp8ZtCJ83MXC8wP8AV0sNatY4svVCj34VPsxd7EB5nolL2d9+CstV5 oGXN9Vd+ahg/0USpH+gfRw17h+wqAozApoWORJ+xxhlhcLQnLaAq5WHfmxyFXdRE k2vsVKphVPlz4hKVFzzo6OY4p4/I7krmHMuZEI10qLGDG2i477pDLp9COQ9vkA2A h0HOedzkZmHvhe/A3vjZ6PiC67awmCnuvfdSqIPqgja6JmQqmtyESNAbuvtnZs6l zKdZYYadk27Ib8kc+TZb8/2BZaSC01lI1TAw00qmp1OsuIX1DxbvkfKGwjcB4CN8 IBl0Hys23zyvdHgz1v65zy76c2IQzClfwi0W360XVv4ZgEIL+BVeOQYq02k/mWUD pFHt2v0qdTrDpTS8zFunaXqOZ9ORWlL4s2xM8OW8gOzk8s2NwKE= =pOKl -----END PGP SIGNATURE----- Merge tag 'iwlwifi-next-for-kalle-2018-04-26' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next Second batch of iwlwifi patches for 4.18 * Some preparations for new hardware; * A workaround to rescan the bus for the rare situation when older devices become irresponsive, * Hardening of the firmware loading code to avoid issues with corrupted files; * A few clean-ups and bugfixes.
This commit is contained in:
commit
d22c763de5
28 changed files with 400 additions and 164 deletions
|
@ -1,6 +1,7 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -27,7 +28,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-csr.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
|
@ -91,7 +91,8 @@ static const struct iwl_eeprom_params iwl1000_eeprom_params = {
|
|||
.base_params = &iwl1000_base_params, \
|
||||
.eeprom_params = &iwl1000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl1000_bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 1000 BGN",
|
||||
|
@ -117,7 +118,8 @@ const struct iwl_cfg iwl1000_bg_cfg = {
|
|||
.eeprom_params = &iwl1000_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.rx_with_siso_diversity = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl100_bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 100 BGN",
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -115,7 +116,8 @@ static const struct iwl_eeprom_params iwl20x0_eeprom_params = {
|
|||
.base_params = &iwl2000_base_params, \
|
||||
.eeprom_params = &iwl20x0_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
|
||||
const struct iwl_cfg iwl2000_2bgn_cfg = {
|
||||
|
@ -142,7 +144,8 @@ const struct iwl_cfg iwl2000_2bgn_d_cfg = {
|
|||
.base_params = &iwl2030_base_params, \
|
||||
.eeprom_params = &iwl20x0_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl2030_2bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 2230 BGN",
|
||||
|
@ -163,7 +166,8 @@ const struct iwl_cfg iwl2030_2bgn_cfg = {
|
|||
.eeprom_params = &iwl20x0_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.rx_with_siso_diversity = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl105_bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 105 BGN",
|
||||
|
@ -190,7 +194,8 @@ const struct iwl_cfg iwl105_bgn_d_cfg = {
|
|||
.eeprom_params = &iwl20x0_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.rx_with_siso_diversity = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl135_bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 135 BGN",
|
||||
|
|
|
@ -54,7 +54,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL_22000_UCODE_API_MAX 38
|
||||
|
@ -115,8 +114,6 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
|
|||
.ucode_api_max = IWL_22000_UCODE_API_MAX, \
|
||||
.ucode_api_min = IWL_22000_UCODE_API_MIN, \
|
||||
.device_family = IWL_DEVICE_FAMILY_22000, \
|
||||
.max_inst_size = IWL60_RTC_INST_SIZE, \
|
||||
.max_data_size = IWL60_RTC_DATA_SIZE, \
|
||||
.base_params = &iwl_22000_base_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_22000, \
|
||||
|
@ -143,6 +140,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr = {
|
|||
.name = "Intel(R) Dual Band Wireless AC 22000",
|
||||
.fw_name_pre = IWL_22000_HR_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -153,6 +151,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb = {
|
|||
.name = "Intel(R) Dual Band Wireless AC 22000",
|
||||
.fw_name_pre = IWL_22000_HR_CDB_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -164,6 +163,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_jf = {
|
|||
.name = "Intel(R) Dual Band Wireless AC 22000",
|
||||
.fw_name_pre = IWL_22000_JF_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -174,6 +174,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_hr = {
|
|||
.name = "Intel(R) Dual Band Wireless AX 22000",
|
||||
.fw_name_pre = IWL_22000_HR_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -184,6 +185,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_f0 = {
|
|||
.name = "Intel(R) Dual Band Wireless AX 22000",
|
||||
.fw_name_pre = IWL_22000_HR_F0_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -194,6 +196,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0 = {
|
|||
.name = "Intel(R) Dual Band Wireless AX 22000",
|
||||
.fw_name_pre = IWL_22000_JF_B0_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
@ -204,6 +207,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0 = {
|
|||
.name = "Intel(R) Dual Band Wireless AX 22000",
|
||||
.fw_name_pre = IWL_22000_HR_A0_FW_PRE,
|
||||
IWL_DEVICE_22000,
|
||||
.csr = &iwl_csr_v1,
|
||||
.ht_params = &iwl_22000_ht_params,
|
||||
.nvm_ver = IWL_22000_NVM_VERSION,
|
||||
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -28,7 +29,6 @@
|
|||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
#include "iwl-csr.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL5000_UCODE_API_MAX 5
|
||||
|
@ -89,7 +89,8 @@ static const struct iwl_eeprom_params iwl5000_eeprom_params = {
|
|||
.base_params = &iwl5000_base_params, \
|
||||
.eeprom_params = &iwl5000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl5300_agn_cfg = {
|
||||
.name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
|
||||
|
@ -153,7 +154,8 @@ const struct iwl_cfg iwl5350_agn_cfg = {
|
|||
.eeprom_params = &iwl5000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.internal_wimax_coex = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl5150_agn_cfg = {
|
||||
.name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -135,7 +136,8 @@ static const struct iwl_eeprom_params iwl6000_eeprom_params = {
|
|||
.base_params = &iwl6000_g2_base_params, \
|
||||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6005_2agn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Advanced-N 6205 AGN",
|
||||
|
@ -189,7 +191,8 @@ const struct iwl_cfg iwl6005_2agn_mow2_cfg = {
|
|||
.base_params = &iwl6000_g2_base_params, \
|
||||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6030_2agn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Advanced-N 6230 AGN",
|
||||
|
@ -225,7 +228,8 @@ const struct iwl_cfg iwl6030_2bg_cfg = {
|
|||
.base_params = &iwl6000_g2_base_params, \
|
||||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6035_2agn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Advanced-N 6235 AGN",
|
||||
|
@ -280,7 +284,8 @@ const struct iwl_cfg iwl130_bg_cfg = {
|
|||
.base_params = &iwl6000_base_params, \
|
||||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6000i_2agn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Advanced-N 6200 AGN",
|
||||
|
@ -313,7 +318,8 @@ const struct iwl_cfg iwl6000i_2bg_cfg = {
|
|||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.internal_wimax_coex = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6050_2agn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN",
|
||||
|
@ -339,7 +345,8 @@ const struct iwl_cfg iwl6050_2abg_cfg = {
|
|||
.eeprom_params = &iwl6000_eeprom_params, \
|
||||
.led_mode = IWL_LED_BLINK, \
|
||||
.internal_wimax_coex = true, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl6150_bgn_cfg = {
|
||||
.name = "Intel(R) Centrino(R) Wireless-N + WiMAX 6150 BGN",
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2015 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -35,6 +36,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2015 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -68,7 +70,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL7260_UCODE_API_MAX 17
|
||||
|
@ -160,14 +161,13 @@ static const struct iwl_ht_params iwl7000_ht_params = {
|
|||
|
||||
#define IWL_DEVICE_7000_COMMON \
|
||||
.device_family = IWL_DEVICE_FAMILY_7000, \
|
||||
.max_inst_size = IWL60_RTC_INST_SIZE, \
|
||||
.max_data_size = IWL60_RTC_DATA_SIZE, \
|
||||
.base_params = &iwl7000_base_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_7000, \
|
||||
.non_shared_ant = ANT_A, \
|
||||
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
|
||||
.dccm_offset = IWL7000_DCCM_OFFSET
|
||||
.dccm_offset = IWL7000_DCCM_OFFSET, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
#define IWL_DEVICE_7000 \
|
||||
IWL_DEVICE_7000_COMMON, \
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -34,6 +35,7 @@
|
|||
*
|
||||
* Copyright(c) 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -67,7 +69,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL8000_UCODE_API_MAX 36
|
||||
|
@ -140,8 +141,6 @@ static const struct iwl_tt_params iwl8000_tt_params = {
|
|||
|
||||
#define IWL_DEVICE_8000_COMMON \
|
||||
.device_family = IWL_DEVICE_FAMILY_8000, \
|
||||
.max_inst_size = IWL60_RTC_INST_SIZE, \
|
||||
.max_data_size = IWL60_RTC_DATA_SIZE, \
|
||||
.base_params = &iwl8000_base_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_8000, \
|
||||
|
@ -158,7 +157,8 @@ static const struct iwl_tt_params iwl8000_tt_params = {
|
|||
.apmg_not_supported = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true, \
|
||||
.min_umac_error_event_table = 0x800000
|
||||
.min_umac_error_event_table = 0x800000, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
#define IWL_DEVICE_8000 \
|
||||
IWL_DEVICE_8000_COMMON, \
|
||||
|
|
|
@ -54,7 +54,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/stringify.h>
|
||||
#include "iwl-config.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
#include "fw/file.h"
|
||||
|
||||
/* Highest firmware API version supported */
|
||||
|
@ -135,8 +134,6 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
|||
.ucode_api_max = IWL9000_UCODE_API_MAX, \
|
||||
.ucode_api_min = IWL9000_UCODE_API_MIN, \
|
||||
.device_family = IWL_DEVICE_FAMILY_9000, \
|
||||
.max_inst_size = IWL60_RTC_INST_SIZE, \
|
||||
.max_data_size = IWL60_RTC_DATA_SIZE, \
|
||||
.base_params = &iwl9000_base_params, \
|
||||
.led_mode = IWL_LED_RF_STATE, \
|
||||
.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_9000, \
|
||||
|
@ -156,7 +153,8 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
|||
.rf_id = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true, \
|
||||
.min_umac_error_event_table = 0x800000
|
||||
.min_umac_error_event_table = 0x800000, \
|
||||
.csr = &iwl_csr_v1
|
||||
|
||||
const struct iwl_cfg iwl9160_2ac_cfg = {
|
||||
.name = "Intel(R) Dual Band Wireless AC 9160",
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -35,6 +36,7 @@
|
|||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -143,6 +145,7 @@ enum iwl_ucode_tlv_type {
|
|||
IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
|
||||
IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
|
||||
IWL_UCODE_TLV_FW_MEM_SEG = 51,
|
||||
IWL_UCODE_TLV_IML = 52,
|
||||
};
|
||||
|
||||
struct iwl_ucode_tlv {
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -35,6 +36,7 @@
|
|||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -241,6 +243,8 @@ enum iwl_fw_type {
|
|||
* @ucode_ver: ucode version from the ucode file
|
||||
* @fw_version: firmware version string
|
||||
* @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
|
||||
* @iml_len: length of the image loader image
|
||||
* @iml: image loader fw image
|
||||
* @ucode_capa: capabilities parsed from the ucode file.
|
||||
* @enhance_sensitivity_table: device can do enhanced sensitivity.
|
||||
* @init_evtlog_ptr: event log offset for init ucode.
|
||||
|
@ -267,6 +271,8 @@ struct iwl_fw {
|
|||
|
||||
/* ucode images */
|
||||
struct fw_img img[IWL_UCODE_TYPE_MAX];
|
||||
size_t iml_len;
|
||||
u8 *iml;
|
||||
|
||||
struct iwl_ucode_capabilities ucode_capa;
|
||||
bool enhance_sensitivity_table;
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -30,6 +31,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -163,7 +165,7 @@ static int iwl_alloc_fw_paging_mem(struct iwl_fw_runtime *fwrt,
|
|||
static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
||||
const struct fw_img *image)
|
||||
{
|
||||
int sec_idx, idx;
|
||||
int sec_idx, idx, ret;
|
||||
u32 offset = 0;
|
||||
|
||||
/*
|
||||
|
@ -190,17 +192,23 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
|||
*/
|
||||
if (sec_idx >= image->num_sec - 1) {
|
||||
IWL_ERR(fwrt, "Paging: Missing CSS and/or paging sections\n");
|
||||
iwl_free_fw_paging(fwrt);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* copy the CSS block to the dram */
|
||||
IWL_DEBUG_FW(fwrt, "Paging: load paging CSS to FW, sec = %d\n",
|
||||
sec_idx);
|
||||
|
||||
if (image->sec[sec_idx].len > fwrt->fw_paging_db[0].fw_paging_size) {
|
||||
IWL_ERR(fwrt, "CSS block is larger than paging size\n");
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
memcpy(page_address(fwrt->fw_paging_db[0].fw_paging_block),
|
||||
image->sec[sec_idx].data,
|
||||
fwrt->fw_paging_db[0].fw_paging_size);
|
||||
image->sec[sec_idx].len);
|
||||
dma_sync_single_for_device(fwrt->trans->dev,
|
||||
fwrt->fw_paging_db[0].fw_paging_phys,
|
||||
fwrt->fw_paging_db[0].fw_paging_size,
|
||||
|
@ -213,17 +221,39 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
|||
sec_idx++;
|
||||
|
||||
/*
|
||||
* copy the paging blocks to the dram
|
||||
* loop index start from 1 since that CSS block already copied to dram
|
||||
* and CSS index is 0.
|
||||
* loop stop at num_of_paging_blk since that last block is not full.
|
||||
* Copy the paging blocks to the dram. The loop index starts
|
||||
* from 1 since the CSS block (index 0) was already copied to
|
||||
* dram. We use num_of_paging_blk + 1 to account for that.
|
||||
*/
|
||||
for (idx = 1; idx < fwrt->num_of_paging_blk; idx++) {
|
||||
for (idx = 1; idx < fwrt->num_of_paging_blk + 1; idx++) {
|
||||
struct iwl_fw_paging *block = &fwrt->fw_paging_db[idx];
|
||||
int remaining = image->sec[sec_idx].len - offset;
|
||||
int len = block->fw_paging_size;
|
||||
|
||||
/*
|
||||
* For the last block, we copy all that is remaining,
|
||||
* for all other blocks, we copy fw_paging_size at a
|
||||
* time. */
|
||||
if (idx == fwrt->num_of_paging_blk) {
|
||||
len = remaining;
|
||||
if (remaining !=
|
||||
fwrt->num_of_pages_in_last_blk * FW_PAGING_SIZE) {
|
||||
IWL_ERR(fwrt,
|
||||
"Paging: last block contains more data than expected %d\n",
|
||||
remaining);
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
} else if (block->fw_paging_size > remaining) {
|
||||
IWL_ERR(fwrt,
|
||||
"Paging: not enough data in other in block %d (%d)\n",
|
||||
idx, remaining);
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
memcpy(page_address(block->fw_paging_block),
|
||||
image->sec[sec_idx].data + offset,
|
||||
block->fw_paging_size);
|
||||
image->sec[sec_idx].data + offset, len);
|
||||
dma_sync_single_for_device(fwrt->trans->dev,
|
||||
block->fw_paging_phys,
|
||||
block->fw_paging_size,
|
||||
|
@ -231,30 +261,16 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
|||
|
||||
IWL_DEBUG_FW(fwrt,
|
||||
"Paging: copied %d paging bytes to block %d\n",
|
||||
fwrt->fw_paging_db[idx].fw_paging_size,
|
||||
idx);
|
||||
len, idx);
|
||||
|
||||
offset += fwrt->fw_paging_db[idx].fw_paging_size;
|
||||
}
|
||||
|
||||
/* copy the last paging block */
|
||||
if (fwrt->num_of_pages_in_last_blk > 0) {
|
||||
struct iwl_fw_paging *block = &fwrt->fw_paging_db[idx];
|
||||
|
||||
memcpy(page_address(block->fw_paging_block),
|
||||
image->sec[sec_idx].data + offset,
|
||||
FW_PAGING_SIZE * fwrt->num_of_pages_in_last_blk);
|
||||
dma_sync_single_for_device(fwrt->trans->dev,
|
||||
block->fw_paging_phys,
|
||||
block->fw_paging_size,
|
||||
DMA_BIDIRECTIONAL);
|
||||
|
||||
IWL_DEBUG_FW(fwrt,
|
||||
"Paging: copied %d pages in the last block %d\n",
|
||||
fwrt->num_of_pages_in_last_blk, idx);
|
||||
offset += block->fw_paging_size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
iwl_free_fw_paging(fwrt);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int iwl_save_fw_paging(struct iwl_fw_runtime *fwrt,
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
*
|
||||
* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -33,6 +34,7 @@
|
|||
*
|
||||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -69,6 +71,7 @@
|
|||
#include <linux/netdevice.h>
|
||||
#include <linux/ieee80211.h>
|
||||
#include <linux/nl80211.h>
|
||||
#include "iwl-csr.h"
|
||||
|
||||
enum iwl_device_family {
|
||||
IWL_DEVICE_FAMILY_UNDEFINED,
|
||||
|
@ -284,6 +287,52 @@ struct iwl_pwr_tx_backoff {
|
|||
u32 backoff;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_csr_params
|
||||
*
|
||||
* @flag_sw_reset: reset the device
|
||||
* @flag_mac_clock_ready:
|
||||
* Indicates MAC (ucode processor, etc.) is powered up and can run.
|
||||
* Internal resources are accessible.
|
||||
* NOTE: This does not indicate that the processor is actually running.
|
||||
* NOTE: This does not indicate that device has completed
|
||||
* init or post-power-down restore of internal SRAM memory.
|
||||
* Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
|
||||
* SRAM is restored and uCode is in normal operation mode.
|
||||
* This note is relevant only for pre 5xxx devices.
|
||||
* NOTE: After device reset, this bit remains "0" until host sets
|
||||
* INIT_DONE
|
||||
* @flag_init_done: Host sets this to put device into fully operational
|
||||
* D0 power mode. Host resets this after SW_RESET to put device into
|
||||
* low power mode.
|
||||
* @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
|
||||
* to allow host access to device-internal resources. Host must wait for
|
||||
* mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
|
||||
* registers.
|
||||
* @flag_val_mac_access_en: mac access is enabled
|
||||
* @flag_master_dis: disable master
|
||||
* @flag_stop_master: stop master
|
||||
* @addr_sw_reset: address for resetting the device
|
||||
* @mac_addr0_otp: first part of MAC address from OTP
|
||||
* @mac_addr1_otp: second part of MAC address from OTP
|
||||
* @mac_addr0_strap: first part of MAC address from strap
|
||||
* @mac_addr1_strap: second part of MAC address from strap
|
||||
*/
|
||||
struct iwl_csr_params {
|
||||
u8 flag_sw_reset;
|
||||
u8 flag_mac_clock_ready;
|
||||
u8 flag_init_done;
|
||||
u8 flag_mac_access_req;
|
||||
u8 flag_val_mac_access_en;
|
||||
u8 flag_master_dis;
|
||||
u8 flag_stop_master;
|
||||
u8 addr_sw_reset;
|
||||
u32 mac_addr0_otp;
|
||||
u32 mac_addr1_otp;
|
||||
u32 mac_addr0_strap;
|
||||
u32 mac_addr1_strap;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_cfg
|
||||
* @name: Official name of the device
|
||||
|
@ -296,8 +345,8 @@ struct iwl_pwr_tx_backoff {
|
|||
* next step. Supported only in integrated solutions.
|
||||
* @ucode_api_max: Highest version of uCode API supported by driver.
|
||||
* @ucode_api_min: Lowest version of uCode API supported by driver.
|
||||
* @max_inst_size: The maximal length of the fw inst section
|
||||
* @max_data_size: The maximal length of the fw data section
|
||||
* @max_inst_size: The maximal length of the fw inst section (only DVM)
|
||||
* @max_data_size: The maximal length of the fw data section (only DVM)
|
||||
* @valid_tx_ant: valid transmit antenna
|
||||
* @valid_rx_ant: valid receive antenna
|
||||
* @non_shared_ant: the antenna that is for WiFi only
|
||||
|
@ -316,6 +365,7 @@ struct iwl_pwr_tx_backoff {
|
|||
* @mac_addr_from_csr: read HW address from CSR registers
|
||||
* @features: hw features, any combination of feature_whitelist
|
||||
* @pwr_tx_backoffs: translation table between power limits and backoffs
|
||||
* @csr: csr flags and addresses that are different across devices
|
||||
* @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
|
||||
* @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
|
||||
* @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
|
||||
|
@ -354,6 +404,7 @@ struct iwl_cfg {
|
|||
const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
|
||||
const char *default_nvm_file_C_step;
|
||||
const struct iwl_tt_params *thermal_params;
|
||||
const struct iwl_csr_params *csr;
|
||||
enum iwl_device_family device_family;
|
||||
enum iwl_led_mode led_mode;
|
||||
enum iwl_nvm_type nvm_type;
|
||||
|
@ -369,7 +420,7 @@ struct iwl_cfg {
|
|||
u32 soc_latency;
|
||||
u16 nvm_ver;
|
||||
u16 nvm_calib_ver;
|
||||
u16 rx_with_siso_diversity:1,
|
||||
u32 rx_with_siso_diversity:1,
|
||||
bt_shared_single_ant:1,
|
||||
internal_wimax_coex:1,
|
||||
host_interrupt_operation_mode:1,
|
||||
|
@ -400,6 +451,36 @@ struct iwl_cfg {
|
|||
u32 extra_phy_cfg_flags;
|
||||
};
|
||||
|
||||
static const struct iwl_csr_params iwl_csr_v1 = {
|
||||
.flag_mac_clock_ready = 0,
|
||||
.flag_val_mac_access_en = 0,
|
||||
.flag_init_done = 2,
|
||||
.flag_mac_access_req = 3,
|
||||
.flag_sw_reset = 7,
|
||||
.flag_master_dis = 8,
|
||||
.flag_stop_master = 9,
|
||||
.addr_sw_reset = (CSR_BASE + 0x020),
|
||||
.mac_addr0_otp = 0x380,
|
||||
.mac_addr1_otp = 0x384,
|
||||
.mac_addr0_strap = 0x388,
|
||||
.mac_addr1_strap = 0x38C
|
||||
};
|
||||
|
||||
static const struct iwl_csr_params iwl_csr_v2 = {
|
||||
.flag_init_done = 6,
|
||||
.flag_mac_clock_ready = 20,
|
||||
.flag_val_mac_access_en = 20,
|
||||
.flag_mac_access_req = 21,
|
||||
.flag_master_dis = 28,
|
||||
.flag_stop_master = 29,
|
||||
.flag_sw_reset = 31,
|
||||
.addr_sw_reset = (CSR_BASE + 0x024),
|
||||
.mac_addr0_otp = 0x30,
|
||||
.mac_addr1_otp = 0x34,
|
||||
.mac_addr0_strap = 0x38,
|
||||
.mac_addr1_strap = 0x3C
|
||||
};
|
||||
|
||||
/*
|
||||
* This list declares the config structures for all devices.
|
||||
*/
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -34,6 +35,7 @@
|
|||
*
|
||||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -257,7 +259,6 @@
|
|||
/* RESET */
|
||||
#define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001)
|
||||
#define CSR_RESET_REG_FLAG_FORCE_NMI (0x00000002)
|
||||
#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080)
|
||||
#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100)
|
||||
#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200)
|
||||
#define CSR_RESET_LINK_PWR_MGMT_DISABLED (0x80000000)
|
||||
|
@ -280,35 +281,10 @@
|
|||
* 4: GOING_TO_SLEEP
|
||||
* Indicates MAC is entering a power-saving sleep power-down.
|
||||
* Not a good time to access device-internal resources.
|
||||
* 3: MAC_ACCESS_REQ
|
||||
* Host sets this to request and maintain MAC wakeup, to allow host
|
||||
* access to device-internal resources. Host must wait for
|
||||
* MAC_CLOCK_READY (and !GOING_TO_SLEEP) before accessing non-CSR
|
||||
* device registers.
|
||||
* 2: INIT_DONE
|
||||
* Host sets this to put device into fully operational D0 power mode.
|
||||
* Host resets this after SW_RESET to put device into low power mode.
|
||||
* 0: MAC_CLOCK_READY
|
||||
* Indicates MAC (ucode processor, etc.) is powered up and can run.
|
||||
* Internal resources are accessible.
|
||||
* NOTE: This does not indicate that the processor is actually running.
|
||||
* NOTE: This does not indicate that device has completed
|
||||
* init or post-power-down restore of internal SRAM memory.
|
||||
* Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
|
||||
* SRAM is restored and uCode is in normal operation mode.
|
||||
* Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
|
||||
* do not need to save/restore it.
|
||||
* NOTE: After device reset, this bit remains "0" until host sets
|
||||
* INIT_DONE
|
||||
*/
|
||||
#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP (0x00000010)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_XTAL_ON (0x00000400)
|
||||
|
||||
#define CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN (0x00000001)
|
||||
|
||||
#define CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE (0x07000000)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN (0x04000000)
|
||||
#define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000)
|
||||
|
|
|
@ -179,6 +179,7 @@ static void iwl_dealloc_ucode(struct iwl_drv *drv)
|
|||
for (i = 0; i < ARRAY_SIZE(drv->fw.dbg_trigger_tlv); i++)
|
||||
kfree(drv->fw.dbg_trigger_tlv[i]);
|
||||
kfree(drv->fw.dbg_mem_tlv);
|
||||
kfree(drv->fw.iml);
|
||||
|
||||
for (i = 0; i < IWL_UCODE_TYPE_MAX; i++)
|
||||
iwl_free_fw_img(drv, drv->fw.img + i);
|
||||
|
@ -1126,6 +1127,13 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,
|
|||
pieces->n_dbg_mem_tlv++;
|
||||
break;
|
||||
}
|
||||
case IWL_UCODE_TLV_IML: {
|
||||
drv->fw.iml_len = tlv_len;
|
||||
drv->fw.iml = kmemdup(tlv_data, tlv_len, GFP_KERNEL);
|
||||
if (!drv->fw.iml)
|
||||
return -ENOMEM;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
IWL_DEBUG_INFO(drv, "unknown TLV: %d\n", tlv_type);
|
||||
break;
|
||||
|
@ -1842,3 +1850,9 @@ MODULE_PARM_DESC(d0i3_timeout, "Timeout to D0i3 entry when idle (ms)");
|
|||
|
||||
module_param_named(disable_11ac, iwlwifi_mod_params.disable_11ac, bool, 0444);
|
||||
MODULE_PARM_DESC(disable_11ac, "Disable VHT capabilities (default: false)");
|
||||
|
||||
module_param_named(remove_when_gone,
|
||||
iwlwifi_mod_params.remove_when_gone, bool,
|
||||
0444);
|
||||
MODULE_PARM_DESC(remove_when_gone,
|
||||
"Remove dev from PCIe bus if it is deemed inaccessible (default: false)");
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -31,6 +32,7 @@
|
|||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -199,12 +201,12 @@ static int iwl_init_otp_access(struct iwl_trans *trans)
|
|||
/* Enable 40MHz radio clock */
|
||||
iwl_write32(trans, CSR_GP_CNTRL,
|
||||
iwl_read32(trans, CSR_GP_CNTRL) |
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/* wait for clock to be ready */
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_ERR(trans, "Time out access OTP\n");
|
||||
|
|
|
@ -122,6 +122,7 @@ enum iwl_uapsd_disable {
|
|||
* @lar_disable: disable LAR (regulatory), default = 0
|
||||
* @fw_monitor: allow to use firmware monitor
|
||||
* @disable_11ac: disable VHT capabilities, default = false.
|
||||
* @remove_when_gone: remove an inaccessible device from the PCIe bus.
|
||||
*/
|
||||
struct iwl_mod_params {
|
||||
int swcrypto;
|
||||
|
@ -143,6 +144,7 @@ struct iwl_mod_params {
|
|||
bool lar_disable;
|
||||
bool fw_monitor;
|
||||
bool disable_11ac;
|
||||
bool remove_when_gone;
|
||||
};
|
||||
|
||||
#endif /* #__iwl_modparams_h__ */
|
||||
|
|
|
@ -579,8 +579,12 @@ static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
|
|||
static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
|
||||
struct iwl_nvm_data *data)
|
||||
{
|
||||
__le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
|
||||
__le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
|
||||
__le32 mac_addr0 =
|
||||
cpu_to_le32(iwl_read32(trans,
|
||||
trans->cfg->csr->mac_addr0_strap));
|
||||
__le32 mac_addr1 =
|
||||
cpu_to_le32(iwl_read32(trans,
|
||||
trans->cfg->csr->mac_addr1_strap));
|
||||
|
||||
iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
|
||||
/*
|
||||
|
@ -590,8 +594,10 @@ static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
|
|||
if (is_valid_ether_addr(data->hw_addr))
|
||||
return;
|
||||
|
||||
mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
|
||||
mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
|
||||
mac_addr0 = cpu_to_le32(iwl_read32(trans,
|
||||
trans->cfg->csr->mac_addr0_otp));
|
||||
mac_addr1 = cpu_to_le32(iwl_read32(trans,
|
||||
trans->cfg->csr->mac_addr1_otp));
|
||||
|
||||
iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
|
||||
}
|
||||
|
|
|
@ -691,6 +691,8 @@ enum iwl_plat_pm_mode {
|
|||
* @wide_cmd_header: true when ucode supports wide command header format
|
||||
* @num_rx_queues: number of RX queues allocated by the transport;
|
||||
* the transport must set this before calling iwl_drv_start()
|
||||
* @iml_len: the length of the image loader
|
||||
* @iml: a pointer to the image loader itself
|
||||
* @dev_cmd_pool: pool for Tx cmd allocation - for internal use only.
|
||||
* The user should use iwl_trans_{alloc,free}_tx_cmd.
|
||||
* @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before
|
||||
|
@ -735,6 +737,9 @@ struct iwl_trans {
|
|||
|
||||
u8 num_rx_queues;
|
||||
|
||||
size_t iml_len;
|
||||
u8 *iml;
|
||||
|
||||
/* The following fields are internal only */
|
||||
struct kmem_cache *dev_cmd_pool;
|
||||
char dev_cmd_pool_name[50];
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -18,11 +19,6 @@
|
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
|
||||
* USA
|
||||
*
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called COPYING.
|
||||
*
|
||||
|
@ -35,6 +31,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -693,6 +690,14 @@ iwl_mvm_get_wowlan_config(struct iwl_mvm *mvm,
|
|||
IWL_WOWLAN_WAKEUP_LINK_CHANGE);
|
||||
}
|
||||
|
||||
if (wowlan->any) {
|
||||
wowlan_config_cmd->wakeup_filter |=
|
||||
cpu_to_le32(IWL_WOWLAN_WAKEUP_BEACON_MISS |
|
||||
IWL_WOWLAN_WAKEUP_LINK_CHANGE |
|
||||
IWL_WOWLAN_WAKEUP_RX_FRAME |
|
||||
IWL_WOWLAN_WAKEUP_BCN_FILTERING);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -739,6 +739,9 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
|||
sizeof(trans->dbg_conf_tlv));
|
||||
trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
|
||||
|
||||
trans->iml = mvm->fw->iml;
|
||||
trans->iml_len = mvm->fw->iml_len;
|
||||
|
||||
/* set up notification wait support */
|
||||
iwl_notification_wait_init(&mvm->notif_wait);
|
||||
|
||||
|
|
|
@ -151,17 +151,9 @@ static void iwl_mvm_create_skb(struct sk_buff *skb, struct ieee80211_hdr *hdr,
|
|||
unsigned int hdrlen = ieee80211_hdrlen(hdr->frame_control);
|
||||
|
||||
if (desc->mac_flags2 & IWL_RX_MPDU_MFLG2_PAD) {
|
||||
len -= 2;
|
||||
pad_len = 2;
|
||||
|
||||
/*
|
||||
* If the device inserted padding it means that (it thought)
|
||||
* the 802.11 header wasn't a multiple of 4 bytes long. In
|
||||
* this case, reserve two bytes at the start of the SKB to
|
||||
* align the payload properly in case we end up copying it.
|
||||
*/
|
||||
skb_reserve(skb, pad_len);
|
||||
}
|
||||
len -= pad_len;
|
||||
|
||||
/* If frame is small enough to fit in skb->head, pull it completely.
|
||||
* If not, only pull ieee80211_hdr (including crypto if present, and
|
||||
|
@ -866,6 +858,16 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
|||
return;
|
||||
}
|
||||
|
||||
if (desc->mac_flags2 & IWL_RX_MPDU_MFLG2_PAD) {
|
||||
/*
|
||||
* If the device inserted padding it means that (it thought)
|
||||
* the 802.11 header wasn't a multiple of 4 bytes long. In
|
||||
* this case, reserve two bytes at the start of the SKB to
|
||||
* align the payload properly in case we end up copying it.
|
||||
*/
|
||||
skb_reserve(skb, 2);
|
||||
}
|
||||
|
||||
rx_status = IEEE80211_SKB_RXCB(skb);
|
||||
|
||||
if (iwl_mvm_rx_crypto(mvm, hdr, rx_status, desc,
|
||||
|
|
|
@ -803,7 +803,6 @@ static int iwl_mvm_tx_tso(struct iwl_mvm *mvm, struct sk_buff *skb,
|
|||
return iwl_mvm_tx_tso_segment(skb, 1, netdev_flags, mpdus_skb);
|
||||
|
||||
if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(mvmsta->vif)) ||
|
||||
tid_to_mac80211_ac[tid] < IEEE80211_AC_BE ||
|
||||
!(mvmsta->amsdu_enabled & BIT(tid)))
|
||||
return iwl_mvm_tx_tso_segment(skb, 1, netdev_flags, mpdus_skb);
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2015 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -35,6 +36,7 @@
|
|||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2015 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -520,15 +522,15 @@ static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
|
|||
|
||||
/* set INIT_DONE flag */
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/* and wait for clock stabilization */
|
||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
||||
udelay(2);
|
||||
|
||||
err = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (err < 0) {
|
||||
IWL_DEBUG_INFO(trans,
|
||||
|
|
|
@ -383,6 +383,8 @@ struct iwl_self_init_dram {
|
|||
* @hw_init_mask: initial unmasked hw causes
|
||||
* @fh_mask: current unmasked fh causes
|
||||
* @hw_mask: current unmasked hw causes
|
||||
* @in_rescan: true if we have triggered a device rescan
|
||||
* @scheduled_for_removal: true if we have scheduled a device removal
|
||||
*/
|
||||
struct iwl_trans_pcie {
|
||||
struct iwl_rxq *rxq;
|
||||
|
@ -464,6 +466,9 @@ struct iwl_trans_pcie {
|
|||
u32 fh_mask;
|
||||
u32 hw_mask;
|
||||
cpumask_t affinity_mask[IWL_MAX_RX_HW_QUEUES];
|
||||
u16 tx_cmd_queue_size;
|
||||
bool in_rescan;
|
||||
bool scheduled_for_removal;
|
||||
};
|
||||
|
||||
static inline struct iwl_trans_pcie *
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
|
@ -201,7 +202,7 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
|
|||
IWL_DEBUG_INFO(trans, "Rx queue requesting wakeup, GP1 = 0x%x\n",
|
||||
reg);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
rxq->need_update = true;
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -19,6 +20,7 @@
|
|||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -92,7 +94,8 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
|
|||
* Set "initialization complete" bit to move adapter from
|
||||
* D0U* --> D0A* (powered-up active) state.
|
||||
*/
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/*
|
||||
* Wait for clock stabilization; once stabilized, access to
|
||||
|
@ -100,8 +103,9 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
|
|||
* and accesses to uCode SRAM.
|
||||
*/
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_DEBUG_INFO(trans, "Failed to init the card\n");
|
||||
return ret;
|
||||
|
@ -143,7 +147,8 @@ static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
|
|||
* Clear "initialization complete" bit to move adapter from
|
||||
* D0A* (powered-up Active) --> D0U* (Uninitialized) state.
|
||||
*/
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
}
|
||||
|
||||
void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
|
||||
|
@ -187,7 +192,7 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
|
|||
|
||||
/* Make sure (redundant) we've released our request to stay awake */
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
|
||||
/* Stop the device, and put it in low power state */
|
||||
iwl_pcie_gen2_apm_stop(trans, false);
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright(c) 2007 - 2015 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
|
@ -35,6 +36,7 @@
|
|||
* Copyright(c) 2005 - 2015 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
@ -73,6 +75,7 @@
|
|||
#include <linux/gfp.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "iwl-drv.h"
|
||||
#include "iwl-trans.h"
|
||||
|
@ -179,7 +182,8 @@ out:
|
|||
static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans)
|
||||
{
|
||||
/* Reset entire device - do controller reset (results in SHRD_HW_RST) */
|
||||
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
|
||||
iwl_set_bit(trans, trans->cfg->csr->addr_sw_reset,
|
||||
BIT(trans->cfg->csr->flag_sw_reset));
|
||||
usleep_range(5000, 6000);
|
||||
}
|
||||
|
||||
|
@ -372,7 +376,8 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
|
|||
* Set "initialization complete" bit to move adapter from
|
||||
* D0U* --> D0A* (powered-up active) state.
|
||||
*/
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/*
|
||||
* Wait for clock stabilization; once stabilized, access to
|
||||
|
@ -380,8 +385,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
|
|||
* and accesses to uCode SRAM.
|
||||
*/
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_ERR(trans, "Failed to init the card\n");
|
||||
return ret;
|
||||
|
@ -459,15 +465,16 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
|
|||
* Set "initialization complete" bit to move adapter from
|
||||
* D0U* --> D0A* (powered-up active) state.
|
||||
*/
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/*
|
||||
* Wait for clock stabilization; once stabilized, access to
|
||||
* device-internal resources is possible.
|
||||
*/
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (WARN_ON(ret < 0)) {
|
||||
IWL_ERR(trans, "Access time out - failed to enable LP XTAL\n");
|
||||
|
@ -519,7 +526,7 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
|
|||
* D0A* (powered-up Active) --> D0U* (Uninitialized) state.
|
||||
*/
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
/* Activates XTAL resources monitor */
|
||||
__iwl_trans_pcie_set_bit(trans, CSR_MONITOR_CFG_REG,
|
||||
|
@ -541,11 +548,12 @@ void iwl_pcie_apm_stop_master(struct iwl_trans *trans)
|
|||
int ret;
|
||||
|
||||
/* stop device's busmaster DMA activity */
|
||||
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
|
||||
iwl_set_bit(trans, trans->cfg->csr->addr_sw_reset,
|
||||
BIT(trans->cfg->csr->flag_stop_master));
|
||||
|
||||
ret = iwl_poll_bit(trans, CSR_RESET,
|
||||
CSR_RESET_REG_FLAG_MASTER_DISABLED,
|
||||
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
|
||||
ret = iwl_poll_bit(trans, trans->cfg->csr->addr_sw_reset,
|
||||
BIT(trans->cfg->csr->flag_master_dis),
|
||||
BIT(trans->cfg->csr->flag_master_dis), 100);
|
||||
if (ret < 0)
|
||||
IWL_WARN(trans, "Master Disable Timed Out, 100 usec\n");
|
||||
|
||||
|
@ -594,7 +602,7 @@ static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
|
|||
* D0A* (powered-up Active) --> D0U* (Uninitialized) state.
|
||||
*/
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
}
|
||||
|
||||
static int iwl_pcie_nic_init(struct iwl_trans *trans)
|
||||
|
@ -1267,7 +1275,7 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
|||
|
||||
/* Make sure (redundant) we've released our request to stay awake */
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
|
||||
/* Stop the device, and put it in low power state */
|
||||
iwl_pcie_apm_stop(trans, false);
|
||||
|
@ -1497,9 +1505,9 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test,
|
|||
iwl_pcie_synchronize_irqs(trans);
|
||||
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
iwl_pcie_enable_rx_wake(trans, false);
|
||||
|
||||
|
@ -1543,15 +1551,17 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
|
|||
iwl_pcie_reset_ict(trans);
|
||||
iwl_enable_interrupts(trans);
|
||||
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
|
||||
if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
|
||||
udelay(2);
|
||||
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_ERR(trans, "Failed to resume the device (mac ready)\n");
|
||||
|
@ -1562,7 +1572,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
|
|||
|
||||
if (!reset) {
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
} else {
|
||||
iwl_trans_pcie_tx_reset(trans);
|
||||
|
||||
|
@ -1926,6 +1936,29 @@ static void iwl_trans_pcie_set_pmi(struct iwl_trans *trans, bool state)
|
|||
clear_bit(STATUS_TPOWER_PMI, &trans->status);
|
||||
}
|
||||
|
||||
struct iwl_trans_pcie_removal {
|
||||
struct pci_dev *pdev;
|
||||
struct work_struct work;
|
||||
};
|
||||
|
||||
static void iwl_trans_pcie_removal_wk(struct work_struct *wk)
|
||||
{
|
||||
struct iwl_trans_pcie_removal *removal =
|
||||
container_of(wk, struct iwl_trans_pcie_removal, work);
|
||||
struct pci_dev *pdev = removal->pdev;
|
||||
char *prop[] = {"EVENT=INACCESSIBLE", NULL};
|
||||
|
||||
dev_err(&pdev->dev, "Device gone - attempting removal\n");
|
||||
kobject_uevent_env(&pdev->dev.kobj, KOBJ_CHANGE, prop);
|
||||
pci_lock_rescan_remove();
|
||||
pci_dev_put(pdev);
|
||||
pci_stop_and_remove_bus_device(pdev);
|
||||
pci_unlock_rescan_remove();
|
||||
|
||||
kfree(removal);
|
||||
module_put(THIS_MODULE);
|
||||
}
|
||||
|
||||
static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
|
||||
unsigned long *flags)
|
||||
{
|
||||
|
@ -1939,7 +1972,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
|
|||
|
||||
/* this bit wakes up the NIC */
|
||||
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
|
||||
udelay(2);
|
||||
|
||||
|
@ -1964,15 +1997,59 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
|
|||
* and do not save/restore SRAM when power cycling.
|
||||
*/
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
|
||||
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
|
||||
BIT(trans->cfg->csr->flag_val_mac_access_en),
|
||||
(BIT(trans->cfg->csr->flag_mac_clock_ready) |
|
||||
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
|
||||
if (unlikely(ret < 0)) {
|
||||
iwl_trans_pcie_dump_regs(trans);
|
||||
iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
|
||||
u32 cntrl = iwl_read32(trans, CSR_GP_CNTRL);
|
||||
|
||||
WARN_ONCE(1,
|
||||
"Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
|
||||
iwl_read32(trans, CSR_GP_CNTRL));
|
||||
cntrl);
|
||||
|
||||
iwl_trans_pcie_dump_regs(trans);
|
||||
|
||||
if (iwlwifi_mod_params.remove_when_gone && cntrl == ~0U) {
|
||||
struct iwl_trans_pcie_removal *removal;
|
||||
|
||||
if (trans_pcie->scheduled_for_removal)
|
||||
goto err;
|
||||
|
||||
IWL_ERR(trans, "Device gone - scheduling removal!\n");
|
||||
|
||||
/*
|
||||
* get a module reference to avoid doing this
|
||||
* while unloading anyway and to avoid
|
||||
* scheduling a work with code that's being
|
||||
* removed.
|
||||
*/
|
||||
if (!try_module_get(THIS_MODULE)) {
|
||||
IWL_ERR(trans,
|
||||
"Module is being unloaded - abort\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
removal = kzalloc(sizeof(*removal), GFP_ATOMIC);
|
||||
if (!removal) {
|
||||
module_put(THIS_MODULE);
|
||||
goto err;
|
||||
}
|
||||
/*
|
||||
* we don't need to clear this flag, because
|
||||
* the trans will be freed and reallocated.
|
||||
*/
|
||||
trans_pcie->scheduled_for_removal = true;
|
||||
|
||||
removal->pdev = to_pci_dev(trans->dev);
|
||||
INIT_WORK(&removal->work, iwl_trans_pcie_removal_wk);
|
||||
pci_dev_get(removal->pdev);
|
||||
schedule_work(&removal->work);
|
||||
} else {
|
||||
iwl_write32(trans, CSR_RESET,
|
||||
CSR_RESET_REG_FLAG_FORCE_NMI);
|
||||
}
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
|
||||
return false;
|
||||
}
|
||||
|
@ -2003,7 +2080,7 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans,
|
|||
goto out;
|
||||
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
/*
|
||||
* Above we read the CSR_GP_CNTRL register, which will flush
|
||||
* any previous writes, but we need the write that clears the
|
||||
|
@ -3232,12 +3309,12 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
|
|||
* id located at the AUX bus MISC address space.
|
||||
*/
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
|
||||
BIT(trans->cfg->csr->flag_init_done));
|
||||
udelay(2);
|
||||
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
BIT(trans->cfg->csr->flag_mac_clock_ready),
|
||||
25000);
|
||||
if (ret < 0) {
|
||||
IWL_DEBUG_INFO(trans, "Failed to wake up the nic\n");
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
|
@ -273,7 +274,7 @@ static void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans,
|
|||
IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
|
||||
txq_id, reg);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
txq->need_update = true;
|
||||
return;
|
||||
}
|
||||
|
@ -611,7 +612,7 @@ static void iwl_pcie_clear_cmd_in_flight(struct iwl_trans *trans)
|
|||
|
||||
trans_pcie->cmd_hold_nic_awake = false;
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(trans->cfg->csr->flag_mac_access_req));
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1171,6 +1172,7 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
|
|||
const struct iwl_host_cmd *cmd)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
const struct iwl_cfg *cfg = trans->cfg;
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&trans_pcie->reg_lock);
|
||||
|
@ -1188,19 +1190,19 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
|
|||
* returned. This needs to be done only on NICs that have
|
||||
* apmg_wake_up_wa set.
|
||||
*/
|
||||
if (trans->cfg->base_params->apmg_wake_up_wa &&
|
||||
if (cfg->base_params->apmg_wake_up_wa &&
|
||||
!trans_pcie->cmd_hold_nic_awake) {
|
||||
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(cfg->csr->flag_mac_access_req));
|
||||
|
||||
ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
|
||||
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
|
||||
BIT(cfg->csr->flag_val_mac_access_en),
|
||||
(BIT(cfg->csr->flag_mac_clock_ready) |
|
||||
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP),
|
||||
15000);
|
||||
if (ret < 0) {
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
BIT(cfg->csr->flag_mac_access_req));
|
||||
IWL_ERR(trans, "Failed to wake NIC for hcmd\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
@ -2395,7 +2397,13 @@ int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
|
|||
goto out_err;
|
||||
iwl_pcie_txq_build_tfd(trans, txq, tb1_phys, tb1_len, false);
|
||||
|
||||
if (amsdu) {
|
||||
/*
|
||||
* If gso_size wasn't set, don't give the frame "amsdu treatment"
|
||||
* (adding subframes, etc.).
|
||||
* This can happen in some testing flows when the amsdu was already
|
||||
* pre-built, and we just need to send the resulting skb.
|
||||
*/
|
||||
if (amsdu && skb_shinfo(skb)->gso_size) {
|
||||
if (unlikely(iwl_fill_data_tbs_amsdu(trans, skb, txq, hdr_len,
|
||||
out_meta, dev_cmd,
|
||||
tb1_len)))
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue