drm/radeon: add support for vce 1.0 clock gating

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2015-05-11 22:01:54 +02:00
parent a918efab63
commit d55a43a3e9
3 changed files with 60 additions and 0 deletions

View file

@ -2455,6 +2455,8 @@ int radeon_asic_init(struct radeon_device *rdev)
/* set num crtcs */
rdev->num_crtc = 4;
rdev->has_uvd = true;
rdev->cg_flags =
RADEON_CG_SUPPORT_VCE_MGCG;
break;
case CHIP_TAHITI:
case CHIP_PITCAIRN: