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pwm: Changes for v5.5-rc1

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Various changes and minor fixes across a couple of drivers.
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Merge tag 'pwm/for-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "Various changes and minor fixes across a couple of drivers"

* tag 'pwm/for-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: stm32: Pass breakinput instead of its values
  pwm: stm32: Remove clutter from ternary operator
  pwm: stm32: Validate breakinput data from DT
  pwm: Update comment on struct pwm_ops::apply
  pwm: sun4i: Fix incorrect calculation of duty_cycle/period
  pwm: stm32: Add power management support
  pwm: stm32: Split breakinput apply routine to ease PM support
  dt-bindings: pwm-stm32: Document pinctrl sleep state
  pwm: sun4i: Drop redundant assignment to variable pval
  dt-bindings: pwm: mediatek: Remove gratuitous compatible string for MT7629
This commit is contained in:
Linus Torvalds 2019-12-05 11:28:14 -08:00
commit d9e48dc2a7
5 changed files with 90 additions and 46 deletions
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12
include/linux/mfd/stm32-timers.h
View file

@ -70,14 +70,11 @@
#define TIM_CCER_CC4E BIT(12) /* Capt/Comp 4 out Ena */
#define TIM_CCER_CC4P BIT(13) /* Capt/Comp 4 Polarity */
#define TIM_CCER_CCXE (BIT(0) | BIT(4) | BIT(8) | BIT(12))
#define TIM_BDTR_BKE BIT(12) /* Break input enable */
#define TIM_BDTR_BKP BIT(13) /* Break input polarity */
#define TIM_BDTR_BKE(x) BIT(12 + (x) * 12) /* Break input enable */
#define TIM_BDTR_BKP(x) BIT(13 + (x) * 12) /* Break input polarity */
#define TIM_BDTR_AOE BIT(14) /* Automatic Output Enable */
#define TIM_BDTR_MOE BIT(15) /* Main Output Enable */
#define TIM_BDTR_BKF (BIT(16) | BIT(17) | BIT(18) | BIT(19))
#define TIM_BDTR_BK2F (BIT(20) | BIT(21) | BIT(22) | BIT(23))
#define TIM_BDTR_BK2E BIT(24) /* Break 2 input enable */
#define TIM_BDTR_BK2P BIT(25) /* Break 2 input polarity */
#define TIM_BDTR_BKF(x) (0xf << (16 + (x) * 4))
#define TIM_DCR_DBA GENMASK(4, 0) /* DMA base addr */
#define TIM_DCR_DBL GENMASK(12, 8) /* DMA burst len */
@ -87,8 +84,7 @@
#define TIM_CR2_MMS2_SHIFT 20
#define TIM_SMCR_TS_SHIFT 4
#define TIM_BDTR_BKF_MASK 0xF
#define TIM_BDTR_BKF_SHIFT 16
#define TIM_BDTR_BK2F_SHIFT 20
#define TIM_BDTR_BKF_SHIFT(x) (16 + (x) * 4)
enum stm32_timers_dmas {
STM32_TIMERS_DMA_CH1,