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Revert "[PATCH] PCI: restore BAR values..."
Revert commit fec59a711e
, which is
breaking sparc64 that doesn't have a working pci_update_resource.
We'll re-do this after 2.6.13 when we'll do it all properly.
This commit is contained in:
parent
138b9dd1fd
commit
dc836b5b6f
4 changed files with 5 additions and 65 deletions
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@ -413,12 +413,6 @@ static int pci_assign_bus_resource(const struct pci_bus *bus,
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return -EBUSY;
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return -EBUSY;
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}
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}
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void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
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{
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/* Not implemented for sparc64... */
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BUG();
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}
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int pci_assign_resource(struct pci_dev *pdev, int resource)
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int pci_assign_resource(struct pci_dev *pdev, int resource)
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{
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{
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struct pcidev_cookie *pcp = pdev->sysdata;
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struct pcidev_cookie *pcp = pdev->sysdata;
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@ -221,37 +221,6 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
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return best;
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return best;
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}
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}
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/**
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* pci_restore_bars - restore a devices BAR values (e.g. after wake-up)
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* @dev: PCI device to have its BARs restored
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*
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* Restore the BAR values for a given device, so as to make it
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* accessible by its driver.
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*/
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void
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pci_restore_bars(struct pci_dev *dev)
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{
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int i, numres;
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switch (dev->hdr_type) {
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case PCI_HEADER_TYPE_NORMAL:
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numres = 6;
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break;
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case PCI_HEADER_TYPE_BRIDGE:
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numres = 2;
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break;
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case PCI_HEADER_TYPE_CARDBUS:
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numres = 1;
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break;
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default:
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/* Should never get here, but just in case... */
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return;
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}
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for (i = 0; i < numres; i ++)
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pci_update_resource(dev, &dev->resource[i], i);
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}
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/**
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/**
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* pci_set_power_state - Set the power state of a PCI device
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* pci_set_power_state - Set the power state of a PCI device
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* @dev: PCI device to be suspended
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* @dev: PCI device to be suspended
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@ -270,7 +239,7 @@ int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
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int
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int
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pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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{
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{
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int pm, need_restore = 0;
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int pm;
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u16 pmcsr, pmc;
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u16 pmcsr, pmc;
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/* bound the state we're entering */
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/* bound the state we're entering */
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@ -309,17 +278,14 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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return -EIO;
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return -EIO;
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}
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}
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pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
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/* If we're in D3, force entire word to 0.
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/* If we're in D3, force entire word to 0.
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* This doesn't affect PME_Status, disables PME_En, and
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* This doesn't affect PME_Status, disables PME_En, and
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* sets PowerState to 0.
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* sets PowerState to 0.
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*/
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*/
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if (dev->current_state >= PCI_D3hot) {
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if (dev->current_state >= PCI_D3hot)
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if (!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
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need_restore = 1;
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pmcsr = 0;
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pmcsr = 0;
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} else {
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else {
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pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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pmcsr |= state;
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pmcsr |= state;
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}
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}
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@ -342,22 +308,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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platform_pci_set_power_state(dev, state);
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platform_pci_set_power_state(dev, state);
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dev->current_state = state;
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dev->current_state = state;
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/* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
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* INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
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* from D3hot to D0 _may_ perform an internal reset, thereby
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* going to "D0 Uninitialized" rather than "D0 Initialized".
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* For example, at least some versions of the 3c905B and the
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* 3c556B exhibit this behaviour.
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*
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* At least some laptop BIOSen (e.g. the Thinkpad T21) leave
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* devices in a D3hot state at boot. Consequently, we need to
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* restore at least the BARs so that the device will be
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* accessible to its driver.
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*/
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if (need_restore)
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pci_restore_bars(dev);
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return 0;
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return 0;
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}
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}
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@ -855,7 +805,6 @@ struct pci_dev *isa_bridge;
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EXPORT_SYMBOL(isa_bridge);
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EXPORT_SYMBOL(isa_bridge);
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#endif
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#endif
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EXPORT_SYMBOL_GPL(pci_restore_bars);
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EXPORT_SYMBOL(pci_enable_device_bars);
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EXPORT_SYMBOL(pci_enable_device_bars);
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EXPORT_SYMBOL(pci_enable_device);
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EXPORT_SYMBOL(pci_enable_device);
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EXPORT_SYMBOL(pci_disable_device);
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EXPORT_SYMBOL(pci_disable_device);
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@ -26,7 +26,7 @@
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#include "pci.h"
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#include "pci.h"
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void
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static void
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pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
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pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
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{
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{
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struct pci_bus_region region;
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struct pci_bus_region region;
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@ -225,7 +225,6 @@
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#define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */
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#define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */
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#define PCI_PM_CTRL 4 /* PM control and status register */
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#define PCI_PM_CTRL 4 /* PM control and status register */
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#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
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#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
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#define PCI_PM_CTRL_NO_SOFT_RESET 0x0004 /* No reset for D3hot->D0 */
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#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
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#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
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#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */
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#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */
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#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */
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#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */
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@ -817,9 +816,7 @@ int pci_set_mwi(struct pci_dev *dev);
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void pci_clear_mwi(struct pci_dev *dev);
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void pci_clear_mwi(struct pci_dev *dev);
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int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
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int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
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int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
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int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
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void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
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int pci_assign_resource(struct pci_dev *dev, int i);
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int pci_assign_resource(struct pci_dev *dev, int i);
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void pci_restore_bars(struct pci_dev *dev);
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/* ROM control related routines */
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/* ROM control related routines */
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void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size);
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void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size);
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