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drm/i915/gen9: Fix PCODE polling during SAGV disabling

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According to the previous patch, it's possible atm that we call
intel_do_sagv_disable() only once during the 1ms period and time out if
that call fails. As opposed to this the spec says that we need to keep
retrying this request for a 1ms duration, so let's do this similarly to
the CDCLK change notification request.

v4-5:
- Rebased on the reply_mask, reply change.
v6:
- Remove w/s change. (Lyude)
- Rebased on the timeout_base argument change.

Cc: Lyude <cpaul@redhat.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Fixes: 656d1b89e5 ("drm/i915/skl: Add support for the SAGV, fix underrun hangs")
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lyude <lyude@redhat.com> (v4)
Link: http://patchwork.freedesktop.org/patch/msgid/1480955258-26311-2-git-send-email-imre.deak@intel.com
(cherry picked from commit b3b8e99984)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Imre Deak 2016-12-05 18:27:38 +02:00 • committed by Jani Nikula
parent 2c7d0602c8
commit dccf82ad17
1 changed files with 9 additions and 25 deletions
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34
drivers/gpu/drm/i915/intel_pm.c
View file

@ -2964,24 +2964,10 @@ intel_enable_sagv(struct drm_i915_private *dev_priv)
return 0; return 0;
} }
static int
intel_do_sagv_disable(struct drm_i915_private *dev_priv)
{
int ret;
uint32_t temp = GEN9_SAGV_DISABLE;
ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL,
&temp);
if (ret)
return ret;
else
return temp & GEN9_SAGV_IS_DISABLED;
}
int int
intel_disable_sagv(struct drm_i915_private *dev_priv) intel_disable_sagv(struct drm_i915_private *dev_priv)
{ {
int ret, result; int ret;
if (!intel_has_sagv(dev_priv)) if (!intel_has_sagv(dev_priv))
return 0; return 0;
@ -2993,25 +2979,23 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
mutex_lock(&dev_priv->rps.hw_lock); mutex_lock(&dev_priv->rps.hw_lock);
/* bspec says to keep retrying for at least 1 ms */ /* bspec says to keep retrying for at least 1 ms */
ret = wait_for(result = intel_do_sagv_disable(dev_priv), 1); ret = skl_pcode_request(dev_priv, GEN9_PCODE_SAGV_CONTROL,
GEN9_SAGV_DISABLE,
GEN9_SAGV_IS_DISABLED, GEN9_SAGV_IS_DISABLED,
1);
mutex_unlock(&dev_priv->rps.hw_lock); mutex_unlock(&dev_priv->rps.hw_lock);
if (ret == -ETIMEDOUT) {
DRM_ERROR("Request to disable SAGV timed out\n");
return -ETIMEDOUT;
}
/* /*
* Some skl systems, pre-release machines in particular, * Some skl systems, pre-release machines in particular,
* don't actually have an SAGV. * don't actually have an SAGV.
*/ */
if (IS_SKYLAKE(dev_priv) && result == -ENXIO) { if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
return 0; return 0;
} else if (result < 0) { } else if (ret < 0) {
DRM_ERROR("Failed to disable the SAGV\n"); DRM_ERROR("Failed to disable the SAGV (%d)\n", ret);
return result; return ret;
} }
dev_priv->sagv_status = I915_SAGV_DISABLED; dev_priv->sagv_status = I915_SAGV_DISABLED;