GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-07-23 15:27:29 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/amdgpu: use BACO reset if platform support (v2)

Browse source 
It will fall back to use mode1 reset if platform does not support BACO
feature.

v2: squash in warning fix (Alex)

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jim Qu 2018-11-07 12:29:39 +08:00 • committed by Alex Deucher
parent 3177b3c52f
commit e2b6d053b1
1 changed files with 58 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

61
drivers/gpu/drm/amd/amdgpu/soc15.c
View file

@ -389,14 +389,13 @@ void soc15_program_register_sequence(struct amdgpu_device *adev,
}
static int soc15_asic_reset(struct amdgpu_device *adev)
static int soc15_asic_mode1_reset(struct amdgpu_device *adev)
{
u32 i;
amdgpu_atombios_scratch_regs_engine_hung(adev, true);
dev_info(adev->dev, "GPU reset\n");
dev_info(adev->dev, "GPU mode1 reset\n");
/* disable BM */
pci_clear_master(adev->pdev);
@ -421,6 +420,62 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
return 0;
}
static int soc15_asic_get_baco_capability(struct amdgpu_device *adev, bool *cap)
{
void *pp_handle = adev->powerplay.pp_handle;
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
if (!pp_funcs || !pp_funcs->get_asic_baco_capability) {
*cap = false;
return -1;
}
return pp_funcs->get_asic_baco_capability(pp_handle, cap);
}
static int soc15_asic_baco_reset(struct amdgpu_device *adev)
{
void *pp_handle = adev->powerplay.pp_handle;
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
if (!pp_funcs ||!pp_funcs->get_asic_baco_state ||!pp_funcs->set_asic_baco_state)
return -1;
/* enter BACO state */
if (pp_funcs->set_asic_baco_state(pp_handle, 1))
return -1;
/* exit BACO state */
if (pp_funcs->set_asic_baco_state(pp_handle, 0))
return -1;
dev_info(adev->dev, "GPU BACO reset\n");
return 0;
}
static int soc15_asic_reset(struct amdgpu_device *adev)
{
int ret;
bool baco_reset;
switch (adev->asic_type) {
case CHIP_VEGA10:
soc15_asic_get_baco_capability(adev, &baco_reset);
break;
default:
baco_reset = false;
break;
}
if (baco_reset)
ret = soc15_asic_baco_reset(adev);
else
ret = soc15_asic_mode1_reset(adev);
return ret;
}
/*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
u32 cntl_reg, u32 status_reg)
{