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perf_counter: Rework the sample ABI
The PERF_EVENT_READ implementation made me realize we don't actually need the sample_type int the output sample, since we already have that in the perf_counter_attr information. Therefore, remove the PERF_EVENT_MISC_OVERFLOW bit and the event->type overloading, and imply put counter overflow samples in a PERF_EVENT_SAMPLE type. This also fixes the issue that event->type was only 32-bit and sample_type had 64 usable bits. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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5 changed files with 49 additions and 48 deletions
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@ -262,7 +262,6 @@ struct perf_counter_mmap_page {
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#define PERF_EVENT_MISC_KERNEL (1 << 0)
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#define PERF_EVENT_MISC_USER (2 << 0)
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#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
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#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
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struct perf_event_header {
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__u32 type;
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@ -348,9 +347,6 @@ enum perf_event_type {
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PERF_EVENT_READ = 8,
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/*
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* When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
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* will be PERF_SAMPLE_*
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*
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* struct {
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* struct perf_event_header header;
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*
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@ -358,8 +354,9 @@ enum perf_event_type {
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* { u32 pid, tid; } && PERF_SAMPLE_TID
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* { u64 time; } && PERF_SAMPLE_TIME
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* { u64 addr; } && PERF_SAMPLE_ADDR
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* { u64 config; } && PERF_SAMPLE_CONFIG
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* { u64 id; } && PERF_SAMPLE_ID
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* { u32 cpu, res; } && PERF_SAMPLE_CPU
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* { u64 period; } && PERF_SAMPLE_PERIOD
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*
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* { u64 nr;
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* { u64 id, val; } cnt[nr]; } && PERF_SAMPLE_GROUP
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@ -368,6 +365,9 @@ enum perf_event_type {
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* u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
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* };
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*/
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PERF_EVENT_SAMPLE = 9,
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PERF_EVENT_MAX, /* non-ABI */
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};
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enum perf_callchain_context {
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