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pci-v4.13-changes
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Merge tag 'pci-v4.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
- add sysfs max_link_speed/width, current_link_speed/width (Wong Vee
Khee)
- make host bridge IRQ mapping much more generic (Matthew Minter,
Lorenzo Pieralisi)
- convert most drivers to pci_scan_root_bus_bridge() (Lorenzo
Pieralisi)
- mutex sriov_configure() (Jakub Kicinski)
- mutex pci_error_handlers callbacks (Christoph Hellwig)
- split ->reset_notify() into ->reset_prepare()/reset_done()
(Christoph Hellwig)
- support multiple PCIe portdrv interrupts for MSI as well as MSI-X
(Gabriele Paoloni)
- allocate MSI/MSI-X vector for Downstream Port Containment (Gabriele
Paoloni)
- fix MSI IRQ affinity pre/post/min_vecs issue (Michael Hernandez)
- test INTx masking during enumeration, not at run-time (Piotr Gregor)
- avoid using device_may_wakeup() for runtime PM (Rafael J. Wysocki)
- restore the status of PCI devices across hibernation (Chen Yu)
- keep parent resources that start at 0x0 (Ard Biesheuvel)
- enable ECRC only if device supports it (Bjorn Helgaas)
- restore PRI and PASID state after Function-Level Reset (CQ Tang)
- skip DPC event if device is not present (Keith Busch)
- check domain when matching SMBIOS info (Sujith Pandel)
- mark Intel XXV710 NIC INTx masking as broken (Alex Williamson)
- avoid AMD SB7xx EHCI USB wakeup defect (Kai-Heng Feng)
- work around long-standing Macbook Pro poweroff issue (Bjorn Helgaas)
- add Switchtec "running" status flag (Logan Gunthorpe)
- fix dra7xx incorrect RW1C IRQ register usage (Arvind Yadav)
- modify xilinx-nwl IRQ chip for legacy interrupts (Bharat Kumar
Gogada)
- move VMD SRCU cleanup after bus, child device removal (Jon Derrick)
- add Faraday clock handling (Linus Walleij)
- configure Rockchip MPS and reorganize (Shawn Lin)
- limit Qualcomm TLP size to 2K (hardware issue) (Srinivas Kandagatla)
- support Tegra MSI 64-bit addressing (Thierry Reding)
- use Rockchip normal (not privileged) register bank (Shawn Lin)
- add HiSilicon Kirin SoC PCIe controller driver (Xiaowei Song)
- add Sigma Designs Tango SMP8759 PCIe controller driver (Marc
Gonzalez)
- add MediaTek PCIe host controller support (Ryder Lee)
- add Qualcomm IPQ4019 support (John Crispin)
- add HyperV vPCI protocol v1.2 support (Jork Loeser)
- add i.MX6 regulator support (Quentin Schulz)
* tag 'pci-v4.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (113 commits)
PCI: tango: Add Sigma Designs Tango SMP8759 PCIe host bridge support
PCI: Add DT binding for Sigma Designs Tango PCIe controller
PCI: rockchip: Use normal register bank for config accessors
dt-bindings: PCI: Add documentation for MediaTek PCIe
PCI: Remove __pci_dev_reset() and pci_dev_reset()
PCI: Split ->reset_notify() method into ->reset_prepare() and ->reset_done()
PCI: xilinx: Make of_device_ids const
PCI: xilinx-nwl: Modify IRQ chip for legacy interrupts
PCI: vmd: Move SRCU cleanup after bus, child device removal
PCI: vmd: Correct comment: VMD domains start at 0x10000, not 0x1000
PCI: versatile: Add local struct device pointers
PCI: tegra: Do not allocate MSI target memory
PCI: tegra: Support MSI 64-bit addressing
PCI: rockchip: Use local struct device pointer consistently
PCI: rockchip: Check for clk_prepare_enable() errors during resume
MAINTAINERS: Remove Wenrui Li as Rockchip PCIe driver maintainer
PCI: rockchip: Configure RC's MPS setting
PCI: rockchip: Reconfigure configuration space header type
PCI: rockchip: Split out rockchip_pcie_cfg_configuration_accesses()
PCI: rockchip: Move configuration accesses into rockchip_pcie_cfg_atu()
...
This commit is contained in:
Linus Torvalds
commit
f263fbb8d6
90 changed files with 3789 additions and 825 deletions
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@ -28,6 +28,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/pci_hotplug.h>
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#include <linux/vmalloc.h>
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#include <linux/pci-ats.h>
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#include <asm/setup.h>
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#include <asm/dma.h>
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#include <linux/aer.h>
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@ -455,7 +456,7 @@ struct resource *pci_find_parent_resource(const struct pci_dev *dev,
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pci_bus_for_each_resource(bus, r, i) {
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if (!r)
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continue;
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if (res->start && resource_contains(r, res)) {
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if (resource_contains(r, res)) {
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/*
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* If the window is prefetchable but the BAR is
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@ -1166,6 +1167,8 @@ void pci_restore_state(struct pci_dev *dev)
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/* PCI Express register must be restored first */
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pci_restore_pcie_state(dev);
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pci_restore_pasid_state(dev);
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pci_restore_pri_state(dev);
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pci_restore_ats_state(dev);
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pci_restore_vc_state(dev);
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@ -1966,12 +1969,13 @@ EXPORT_SYMBOL(pci_wake_from_d3);
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/**
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* pci_target_state - find an appropriate low power state for a given PCI dev
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* @dev: PCI device
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* @wakeup: Whether or not wakeup functionality will be enabled for the device.
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*
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* Use underlying platform code to find a supported low power state for @dev.
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* If the platform can't manage @dev, return the deepest state from which it
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* can generate wake events, based on any available PME info.
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*/
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static pci_power_t pci_target_state(struct pci_dev *dev)
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static pci_power_t pci_target_state(struct pci_dev *dev, bool wakeup)
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{
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pci_power_t target_state = PCI_D3hot;
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@ -2008,7 +2012,7 @@ static pci_power_t pci_target_state(struct pci_dev *dev)
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if (dev->current_state == PCI_D3cold)
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target_state = PCI_D3cold;
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if (device_may_wakeup(&dev->dev)) {
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if (wakeup) {
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/*
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* Find the deepest state from which the device can generate
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* wake-up events, make it the target state and enable device
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@ -2034,13 +2038,14 @@ static pci_power_t pci_target_state(struct pci_dev *dev)
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*/
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int pci_prepare_to_sleep(struct pci_dev *dev)
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{
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pci_power_t target_state = pci_target_state(dev);
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bool wakeup = device_may_wakeup(&dev->dev);
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pci_power_t target_state = pci_target_state(dev, wakeup);
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int error;
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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pci_enable_wake(dev, target_state, device_may_wakeup(&dev->dev));
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pci_enable_wake(dev, target_state, wakeup);
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error = pci_set_power_state(dev, target_state);
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@ -2073,9 +2078,10 @@ EXPORT_SYMBOL(pci_back_from_sleep);
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*/
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int pci_finish_runtime_suspend(struct pci_dev *dev)
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{
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pci_power_t target_state = pci_target_state(dev);
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pci_power_t target_state;
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int error;
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target_state = pci_target_state(dev, device_can_wakeup(&dev->dev));
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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@ -2111,8 +2117,8 @@ bool pci_dev_run_wake(struct pci_dev *dev)
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if (!dev->pme_support)
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return false;
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/* PME-capable in principle, but not from the intended sleep state */
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if (!pci_pme_capable(dev, pci_target_state(dev)))
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/* PME-capable in principle, but not from the target power state */
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if (!pci_pme_capable(dev, pci_target_state(dev, false)))
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return false;
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while (bus->parent) {
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@ -2147,9 +2153,10 @@ EXPORT_SYMBOL_GPL(pci_dev_run_wake);
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bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
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{
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struct device *dev = &pci_dev->dev;
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bool wakeup = device_may_wakeup(dev);
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if (!pm_runtime_suspended(dev)
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|| pci_target_state(pci_dev) != pci_dev->current_state
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|| pci_target_state(pci_dev, wakeup) != pci_dev->current_state
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|| platform_pci_need_resume(pci_dev)
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|| (pci_dev->dev_flags & PCI_DEV_FLAGS_NEEDS_RESUME))
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return false;
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@ -2167,7 +2174,7 @@ bool pci_dev_keep_suspended(struct pci_dev *pci_dev)
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spin_lock_irq(&dev->power.lock);
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if (pm_runtime_suspended(dev) && pci_dev->current_state < PCI_D3cold &&
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!device_may_wakeup(dev))
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!wakeup)
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__pci_pme_active(pci_dev, false);
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spin_unlock_irq(&dev->power.lock);
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@ -3715,46 +3722,6 @@ void pci_intx(struct pci_dev *pdev, int enable)
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}
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EXPORT_SYMBOL_GPL(pci_intx);
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/**
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* pci_intx_mask_supported - probe for INTx masking support
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* @dev: the PCI device to operate on
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*
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* Check if the device dev support INTx masking via the config space
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* command word.
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*/
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bool pci_intx_mask_supported(struct pci_dev *dev)
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{
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bool mask_supported = false;
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u16 orig, new;
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if (dev->broken_intx_masking)
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return false;
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pci_cfg_access_lock(dev);
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pci_read_config_word(dev, PCI_COMMAND, &orig);
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pci_write_config_word(dev, PCI_COMMAND,
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orig ^ PCI_COMMAND_INTX_DISABLE);
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pci_read_config_word(dev, PCI_COMMAND, &new);
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/*
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* There's no way to protect against hardware bugs or detect them
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* reliably, but as long as we know what the value should be, let's
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* go ahead and check it.
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*/
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if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
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dev_err(&dev->dev, "Command register changed from 0x%x to 0x%x: driver or hardware bug?\n",
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orig, new);
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} else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) {
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mask_supported = true;
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pci_write_config_word(dev, PCI_COMMAND, orig);
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}
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pci_cfg_access_unlock(dev);
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return mask_supported;
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}
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EXPORT_SYMBOL_GPL(pci_intx_mask_supported);
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static bool pci_check_and_set_intx_mask(struct pci_dev *dev, bool mask)
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{
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struct pci_bus *bus = dev->bus;
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@ -3805,7 +3772,7 @@ done:
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* @dev: the PCI device to operate on
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*
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* Check if the device dev has its INTx line asserted, mask it and
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* return true in that case. False is returned if not interrupt was
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* return true in that case. False is returned if no interrupt was
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* pending.
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*/
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bool pci_check_and_mask_intx(struct pci_dev *dev)
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@ -4075,40 +4042,6 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe)
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return pci_reset_hotplug_slot(dev->slot->hotplug, probe);
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}
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static int __pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int rc;
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might_sleep();
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rc = pci_dev_specific_reset(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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if (pcie_has_flr(dev)) {
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if (!probe)
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pcie_flr(dev);
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rc = 0;
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goto done;
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}
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rc = pci_af_flr(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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rc = pci_pm_reset(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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rc = pci_dev_reset_slot_function(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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rc = pci_parent_bus_reset(dev, probe);
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done:
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return rc;
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}
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static void pci_dev_lock(struct pci_dev *dev)
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{
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pci_cfg_access_lock(dev);
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@ -4134,26 +4067,18 @@ static void pci_dev_unlock(struct pci_dev *dev)
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pci_cfg_access_unlock(dev);
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}
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/**
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* pci_reset_notify - notify device driver of reset
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* @dev: device to be notified of reset
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* @prepare: 'true' if device is about to be reset; 'false' if reset attempt
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* completed
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*
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* Must be called prior to device access being disabled and after device
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* access is restored.
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*/
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static void pci_reset_notify(struct pci_dev *dev, bool prepare)
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static void pci_dev_save_and_disable(struct pci_dev *dev)
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{
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const struct pci_error_handlers *err_handler =
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dev->driver ? dev->driver->err_handler : NULL;
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if (err_handler && err_handler->reset_notify)
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err_handler->reset_notify(dev, prepare);
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}
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static void pci_dev_save_and_disable(struct pci_dev *dev)
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{
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pci_reset_notify(dev, true);
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/*
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* dev->driver->err_handler->reset_prepare() is protected against
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* races with ->remove() by the device lock, which must be held by
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* the caller.
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*/
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if (err_handler && err_handler->reset_prepare)
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err_handler->reset_prepare(dev);
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/*
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* Wake-up device prior to save. PM registers default to D0 after
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@ -4175,23 +4100,18 @@ static void pci_dev_save_and_disable(struct pci_dev *dev)
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static void pci_dev_restore(struct pci_dev *dev)
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{
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const struct pci_error_handlers *err_handler =
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dev->driver ? dev->driver->err_handler : NULL;
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pci_restore_state(dev);
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pci_reset_notify(dev, false);
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}
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static int pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int rc;
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if (!probe)
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pci_dev_lock(dev);
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rc = __pci_dev_reset(dev, probe);
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if (!probe)
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pci_dev_unlock(dev);
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return rc;
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/*
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* dev->driver->err_handler->reset_done() is protected against
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* races with ->remove() by the device lock, which must be held by
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* the caller.
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*/
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if (err_handler && err_handler->reset_done)
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err_handler->reset_done(dev);
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}
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/**
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|
|
@ -4213,7 +4133,13 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
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*/
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int __pci_reset_function(struct pci_dev *dev)
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{
|
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return pci_dev_reset(dev, 0);
|
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int ret;
|
||||
|
||||
pci_dev_lock(dev);
|
||||
ret = __pci_reset_function_locked(dev);
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pci_dev_unlock(dev);
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|
||||
return ret;
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}
|
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EXPORT_SYMBOL_GPL(__pci_reset_function);
|
||||
|
||||
|
|
@ -4238,7 +4164,27 @@ EXPORT_SYMBOL_GPL(__pci_reset_function);
|
|||
*/
|
||||
int __pci_reset_function_locked(struct pci_dev *dev)
|
||||
{
|
||||
return __pci_dev_reset(dev, 0);
|
||||
int rc;
|
||||
|
||||
might_sleep();
|
||||
|
||||
rc = pci_dev_specific_reset(dev, 0);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
if (pcie_has_flr(dev)) {
|
||||
pcie_flr(dev);
|
||||
return 0;
|
||||
}
|
||||
rc = pci_af_flr(dev, 0);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
rc = pci_pm_reset(dev, 0);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
rc = pci_dev_reset_slot_function(dev, 0);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
return pci_parent_bus_reset(dev, 0);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(__pci_reset_function_locked);
|
||||
|
||||
|
|
@ -4255,7 +4201,26 @@ EXPORT_SYMBOL_GPL(__pci_reset_function_locked);
|
|||
*/
|
||||
int pci_probe_reset_function(struct pci_dev *dev)
|
||||
{
|
||||
return pci_dev_reset(dev, 1);
|
||||
int rc;
|
||||
|
||||
might_sleep();
|
||||
|
||||
rc = pci_dev_specific_reset(dev, 1);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
if (pcie_has_flr(dev))
|
||||
return 0;
|
||||
rc = pci_af_flr(dev, 1);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
rc = pci_pm_reset(dev, 1);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
rc = pci_dev_reset_slot_function(dev, 1);
|
||||
if (rc != -ENOTTY)
|
||||
return rc;
|
||||
|
||||
return pci_parent_bus_reset(dev, 1);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -4278,15 +4243,17 @@ int pci_reset_function(struct pci_dev *dev)
|
|||
{
|
||||
int rc;
|
||||
|
||||
rc = pci_dev_reset(dev, 1);
|
||||
rc = pci_probe_reset_function(dev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
pci_dev_lock(dev);
|
||||
pci_dev_save_and_disable(dev);
|
||||
|
||||
rc = pci_dev_reset(dev, 0);
|
||||
rc = __pci_reset_function_locked(dev);
|
||||
|
||||
pci_dev_restore(dev);
|
||||
pci_dev_unlock(dev);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
|
@ -4302,20 +4269,18 @@ int pci_try_reset_function(struct pci_dev *dev)
|
|||
{
|
||||
int rc;
|
||||
|
||||
rc = pci_dev_reset(dev, 1);
|
||||
rc = pci_probe_reset_function(dev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
pci_dev_save_and_disable(dev);
|
||||
if (!pci_dev_trylock(dev))
|
||||
return -EAGAIN;
|
||||
|
||||
if (pci_dev_trylock(dev)) {
|
||||
rc = __pci_dev_reset(dev, 0);
|
||||
pci_dev_unlock(dev);
|
||||
} else
|
||||
rc = -EAGAIN;
|
||||
pci_dev_save_and_disable(dev);
|
||||
rc = __pci_reset_function_locked(dev);
|
||||
pci_dev_unlock(dev);
|
||||
|
||||
pci_dev_restore(dev);
|
||||
|
||||
return rc;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pci_try_reset_function);
|
||||
|
|
@ -4465,7 +4430,9 @@ static void pci_bus_save_and_disable(struct pci_bus *bus)
|
|||
struct pci_dev *dev;
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
pci_dev_lock(dev);
|
||||
pci_dev_save_and_disable(dev);
|
||||
pci_dev_unlock(dev);
|
||||
if (dev->subordinate)
|
||||
pci_bus_save_and_disable(dev->subordinate);
|
||||
}
|
||||
|
|
@ -4480,7 +4447,9 @@ static void pci_bus_restore(struct pci_bus *bus)
|
|||
struct pci_dev *dev;
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
pci_dev_lock(dev);
|
||||
pci_dev_restore(dev);
|
||||
pci_dev_unlock(dev);
|
||||
if (dev->subordinate)
|
||||
pci_bus_restore(dev->subordinate);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue