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drm/i915: Let's hope future platforms will use the same WM code as SKL

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Given the history, there's some chance we'll keep the same WM code for a
bit (previously, we were able to reuse the same WM code from ILK to BDW,
so that sounds like a fair assumption).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2014-11-13 17:51:52 +00:00 • committed by Daniel Vetter
parent 6e7cc470bc
commit f5ed50cbff
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_pm.c
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@ -7067,7 +7067,7 @@ void intel_init_pm(struct drm_device *dev)
i915_ironlake_get_mem_freq(dev);
/* For FIFO watermark updates */
if (IS_GEN9(dev)) {
if (INTEL_INFO(dev)->gen >= 9) {
skl_setup_wm_latency(dev);
dev_priv->display.init_clock_gating = gen9_init_clock_gating;