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dt-bindings: tpm: document properties for cr50

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Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware.

Cc: Andrey Pronin <apronin@chromium.org>
Cc: Duncan Laurie <dlaurie@chromium.org>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Guenter Roeck <groeck@chromium.org>
Cc: Alexander Steffen <Alexander.Steffen@infineon.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
This commit is contained in:
Andrey Pronin 2019-09-20 11:32:35 -07:00 • committed by Jarkko Sakkinen
parent 5af4f1d5cb
commit fb8d6c8db3
1 changed files with 19 additions and 0 deletions
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19
Documentation/devicetree/bindings/security/tpm/google,cr50.txt Normal file
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* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
H1 Secure Microcontroller running Cr50 firmware provides several
functions, including TPM-like functionality. It communicates over
SPI using the FIFO protocol described in the PTP Spec, section 6.
Required properties:
- compatible: Should be "google,cr50".
- spi-max-frequency: Maximum SPI frequency.
Example:
&spi0 {
tpm@0 {
compatible = "google,cr50";
reg = <0>;
spi-max-frequency = <800000>;
};
};