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ATA changes for 5.17-rc1

Browse source 
A larger than usual set of changes for this cycle. The bulk of the changes are
 part of a rework of libata messages and debugging features from Hannes. In more
 details, the changes are as follows.
 
 * Small code cleanups in the pata_ali driver (unnecessary variable
   initialization and simplified return statement, from Jason and  Colin.
 * Switch to using struct_group() in the sata_fsl driver, from Kees.
 * Convert many sysfs attribute show functions to use sysfs_emit() instead of
   snprintf(), from me.
 * sata_dwc_460ex driver code cleanups, from Andy.
 * Improve DMA setup and remove superfluous error message in libahci_platform,
   from Andy
 * A small code cleanup in libata to use min() instead of open coding test,
   from Changcheng.
 * Rework of libata messages from Hannes. This is especially focused on
   replacing compile time defined debugging messages (DPRINTK() and VPRINTK())
   with regular dynamic debugging messages (pr_debug()) and traceipoint events.
   Both libata-core and many drivers are updated to have a consistent debugging
   level control for all drivers.
 * Extend compile test support to as many drivers as possible in ATA Kconfig to
   improve compile test coverage, from me.
 * Fixes to avoid compile time warnings (W=1) and sparse warnings in sata_fsl
   and ahci_xgene drivers, from me.
 * Fix the interface of the read_id() port operation method to clarify that the
   data buffer passed as an argument is little endian. This avoids sparse
   warnings in the pata_netcell, pata_it821x, ahci_xgene, ahci_cevaxi and
   ahci_brcm drivers. From me.
 * Small code cleanup in the pata_octeon_cf driver, from Minghao.
 * Improved IRQ configuration code in pata_of_platform, from Lad.
 * Simplified implementation of __ata_scsi_queuecmd(), from Wenchao.
 * Debounce delay flag renaming, from Paul.
 * Add support for AMD A85 FCH (Hudson D4) AHCI adapters, from Paul
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Merge tag 'ata-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata

Pull ATA updates from Damien Le Moal:
 "A larger than usual set of changes for this cycle. The bulk of the
  changes are part of a rework of libata messages and debugging features
  from Hannes. In more detail, the changes are as follows.

   - Small code cleanups in the pata_ali driver (unnecessary variable
     initialization and simplified return statement, from Jason and
     Colin.

   - Switch to using struct_group() in the sata_fsl driver, from Kees.

   - Convert many sysfs attribute show functions to use sysfs_emit()
     instead of snprintf(), from me.

   - sata_dwc_460ex driver code cleanups, from Andy.

   - Improve DMA setup and remove superfluous error message in
     libahci_platform, from Andy

   - A small code cleanup in libata to use min() instead of open coding
     test, from Changcheng.

   - Rework of libata messages from Hannes. This is especially focused
     on replacing compile time defined debugging messages (DPRINTK() and
     VPRINTK()) with regular dynamic debugging messages (pr_debug()) and
     traceipoint events. Both libata-core and many drivers are updated
     to have a consistent debugging level control for all drivers.

   - Extend compile test support to as many drivers as possible in ATA
     Kconfig to improve compile test coverage, from me.

   - Fixes to avoid compile time warnings (W=1) and sparse warnings in
     sata_fsl and ahci_xgene drivers, from me.

   - Fix the interface of the read_id() port operation method to clarify
     that the data buffer passed as an argument is little endian. This
     avoids sparse warnings in the pata_netcell, pata_it821x,
     ahci_xgene, ahci_cevaxi and ahci_brcm drivers. From me.

   - Small code cleanup in the pata_octeon_cf driver, from Minghao.

   - Improved IRQ configuration code in pata_of_platform, from Lad.

   - Simplified implementation of __ata_scsi_queuecmd(), from Wenchao.

   - Debounce delay flag renaming, from Paul.

   - Add support for AMD A85 FCH (Hudson D4) AHCI adapters, from Paul"

* tag 'ata-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (106 commits)
  ata: pata_ali: remove redundant return statement
  ata: ahci: Add support for AMD A85 FCH (Hudson D4)
  ata: libata: Rename link flag ATA_LFLAG_NO_DB_DELAY
  ata: libata-scsi: simplify __ata_scsi_queuecmd()
  ata: pata_of_platform: Use platform_get_irq_optional() to get the interrupt
  ata: pata_samsung_cf: add compile test support
  ata: pata_pxa: add compile test support
  ata: pata_imx: add compile test support
  ata: pata_ftide010: add compile test support
  ata: pata_cs5535: add compile test support
  ata: pata_octeon_cf: remove redundant val variable
  ata: fix read_id() ata port operation interface
  ata: ahci_xgene: use correct type for port mmio address
  ata: sata_fsl: fix cmdhdr_tbl_entry and prde struct definitions
  ata: sata_fsl: fix scsi host initialization
  ata: pata_bk3710: add compile test support
  ata: ahci_seattle: add compile test support
  ata: ahci_xgene: add compile test support
  ata: ahci_tegra: add compile test support
  ata: ahci_sunxi: add compile test support
  ...
This commit is contained in:
Linus Torvalds 2022-01-18 10:14:49 +02:00
commit fe81ba137e
59 changed files with 1271 additions and 1438 deletions
Download patch file Download diff file Expand all files Collapse all files

44
drivers/ata/Kconfig
View file

@ -146,7 +146,7 @@ config SATA_AHCI_PLATFORM
config AHCI_BRCM config AHCI_BRCM
tristate "Broadcom AHCI SATA support" tristate "Broadcom AHCI SATA support"
depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_NSP || \ depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_NSP || \
ARCH_BCM_63XX ARCH_BCM_63XX || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the AHCI SATA3 controller found on This option enables support for the AHCI SATA3 controller found on
@ -156,7 +156,7 @@ config AHCI_BRCM
config AHCI_DA850 config AHCI_DA850
tristate "DaVinci DA850 AHCI SATA support" tristate "DaVinci DA850 AHCI SATA support"
depends on ARCH_DAVINCI_DA850 depends on ARCH_DAVINCI_DA850 || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the DaVinci DA850 SoC's This option enables support for the DaVinci DA850 SoC's
@ -166,7 +166,7 @@ config AHCI_DA850
config AHCI_DM816 config AHCI_DM816
tristate "DaVinci DM816 AHCI SATA support" tristate "DaVinci DM816 AHCI SATA support"
depends on ARCH_OMAP2PLUS depends on ARCH_OMAP2PLUS || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the DaVinci DM816 SoC's This option enables support for the DaVinci DM816 SoC's
@ -206,7 +206,7 @@ config AHCI_CEVA
config AHCI_MTK config AHCI_MTK
tristate "MediaTek AHCI SATA support" tristate "MediaTek AHCI SATA support"
depends on ARCH_MEDIATEK depends on ARCH_MEDIATEK || COMPILE_TEST
select MFD_SYSCON select MFD_SYSCON
select SATA_HOST select SATA_HOST
help help
@ -217,7 +217,7 @@ config AHCI_MTK
config AHCI_MVEBU config AHCI_MVEBU
tristate "Marvell EBU AHCI SATA support" tristate "Marvell EBU AHCI SATA support"
depends on ARCH_MVEBU depends on ARCH_MVEBU || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the Marvebu EBU SoC's This option enables support for the Marvebu EBU SoC's
@ -236,7 +236,7 @@ config AHCI_OCTEON
config AHCI_SUNXI config AHCI_SUNXI
tristate "Allwinner sunxi AHCI SATA support" tristate "Allwinner sunxi AHCI SATA support"
depends on ARCH_SUNXI depends on ARCH_SUNXI || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the Allwinner sunxi SoC's This option enables support for the Allwinner sunxi SoC's
@ -246,7 +246,7 @@ config AHCI_SUNXI
config AHCI_TEGRA config AHCI_TEGRA
tristate "NVIDIA Tegra AHCI SATA support" tristate "NVIDIA Tegra AHCI SATA support"
depends on ARCH_TEGRA depends on ARCH_TEGRA || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for the NVIDIA Tegra SoC's This option enables support for the NVIDIA Tegra SoC's
@ -256,7 +256,7 @@ config AHCI_TEGRA
config AHCI_XGENE config AHCI_XGENE
tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support" tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support"
depends on PHY_XGENE depends on PHY_XGENE || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for APM X-Gene SoC SATA host controller. This option enables support for APM X-Gene SoC SATA host controller.
@ -273,7 +273,7 @@ config AHCI_QORIQ
config SATA_FSL config SATA_FSL
tristate "Freescale 3.0Gbps SATA support" tristate "Freescale 3.0Gbps SATA support"
depends on FSL_SOC depends on FSL_SOC || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for Freescale 3.0Gbps SATA controller. This option enables support for Freescale 3.0Gbps SATA controller.
@ -294,7 +294,7 @@ config SATA_GEMINI
config SATA_AHCI_SEATTLE config SATA_AHCI_SEATTLE
tristate "AMD Seattle 6.0Gbps AHCI SATA host controller support" tristate "AMD Seattle 6.0Gbps AHCI SATA host controller support"
depends on ARCH_SEATTLE depends on ARCH_SEATTLE || COMPILE_TEST
select SATA_HOST select SATA_HOST
help help
This option enables support for AMD Seattle SATA host controller. This option enables support for AMD Seattle SATA host controller.
@ -432,18 +432,6 @@ config SATA_DWC_OLD_DMA
This option enables support for old device trees without the This option enables support for old device trees without the
"dmas" property. "dmas" property.
config SATA_DWC_DEBUG
bool "Debugging driver version"
depends on SATA_DWC
help
This option enables debugging output in the driver.
config SATA_DWC_VDEBUG
bool "Verbose debug output"
depends on SATA_DWC_DEBUG
help
This option enables the taskfile dumping and NCQ debugging.
config SATA_HIGHBANK config SATA_HIGHBANK
tristate "Calxeda Highbank SATA support" tristate "Calxeda Highbank SATA support"
depends on ARCH_HIGHBANK || COMPILE_TEST depends on ARCH_HIGHBANK || COMPILE_TEST
@ -611,7 +599,7 @@ config PATA_ATP867X
config PATA_BK3710 config PATA_BK3710
tristate "Palmchip BK3710 PATA support" tristate "Palmchip BK3710 PATA support"
depends on ARCH_DAVINCI depends on ARCH_DAVINCI || COMPILE_TEST
select PATA_TIMINGS select PATA_TIMINGS
help help
This option enables support for the integrated IDE controller on This option enables support for the integrated IDE controller on
@ -649,7 +637,7 @@ config PATA_CS5530
config PATA_CS5535 config PATA_CS5535
tristate "CS5535 PATA support (Experimental)" tristate "CS5535 PATA support (Experimental)"
depends on PCI && X86_32 depends on PCI && (X86_32 || (X86_64 && COMPILE_TEST))
help help
This option enables support for the NatSemi/AMD CS5535 This option enables support for the NatSemi/AMD CS5535
companion chip used with the Geode processor family. companion chip used with the Geode processor family.
@ -697,7 +685,7 @@ config PATA_EP93XX
config PATA_FTIDE010 config PATA_FTIDE010
tristate "Faraday Technology FTIDE010 PATA support" tristate "Faraday Technology FTIDE010 PATA support"
depends on OF depends on OF
depends on ARM depends on ARM || COMPILE_TEST
depends on SATA_GEMINI depends on SATA_GEMINI
help help
This option enables support for the Faraday FTIDE010 This option enables support for the Faraday FTIDE010
@ -760,7 +748,7 @@ config PATA_ICSIDE
config PATA_IMX config PATA_IMX
tristate "PATA support for Freescale iMX" tristate "PATA support for Freescale iMX"
depends on ARCH_MXC depends on ARCH_MXC || COMPILE_TEST
select PATA_TIMINGS select PATA_TIMINGS
help help
This option enables support for the PATA host available on Freescale This option enables support for the PATA host available on Freescale
@ -981,7 +969,7 @@ config PATA_VIA
config PATA_PXA config PATA_PXA
tristate "PXA DMA-capable PATA support" tristate "PXA DMA-capable PATA support"
depends on ARCH_PXA depends on ARCH_PXA || COMPILE_TEST
help help
This option enables support for harddrive attached to PXA CPU's bus. This option enables support for harddrive attached to PXA CPU's bus.
@ -1157,7 +1145,7 @@ config PATA_RZ1000
config PATA_SAMSUNG_CF config PATA_SAMSUNG_CF
tristate "Samsung SoC PATA support" tristate "Samsung SoC PATA support"
depends on SAMSUNG_DEV_IDE depends on SAMSUNG_DEV_IDE || COMPILE_TEST
select PATA_TIMINGS select PATA_TIMINGS
help help
This option enables basic support for Samsung's S3C/S5P board This option enables basic support for Samsung's S3C/S5P board

4
drivers/ata/acard-ahci.c
View file

@ -185,8 +185,6 @@ static unsigned int acard_ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ; struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
unsigned int si, last_si = 0; unsigned int si, last_si = 0;
VPRINTK("ENTER\n");
/* /*
* Next, the S/G list. * Next, the S/G list.
*/ */
@ -362,8 +360,6 @@ static int acard_ahci_init_one(struct pci_dev *pdev, const struct pci_device_id
struct ata_host *host; struct ata_host *host;
int n_ports, i, rc; int n_ports, i, rc;
VPRINTK("ENTER\n");
WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS); WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS);
ata_print_version_once(&pdev->dev, DRV_VERSION); ata_print_version_once(&pdev->dev, DRV_VERSION);

24
drivers/ata/ahci.c
View file

@ -51,6 +51,7 @@ enum board_ids {
board_ahci, board_ahci,
board_ahci_ign_iferr, board_ahci_ign_iferr,
board_ahci_mobile, board_ahci_mobile,
board_ahci_no_debounce_delay,
board_ahci_nomsi, board_ahci_nomsi,
board_ahci_noncq, board_ahci_noncq,
board_ahci_nosntf, board_ahci_nosntf,
@ -141,6 +142,13 @@ static const struct ata_port_info ahci_port_info[] = {
.udma_mask = ATA_UDMA6, .udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops, .port_ops = &ahci_ops,
}, },
[board_ahci_no_debounce_delay] = {
.flags = AHCI_FLAG_COMMON,
.link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY,
.pio_mask = ATA_PIO4,
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
},
[board_ahci_nomsi] = { [board_ahci_nomsi] = {
AHCI_HFLAGS (AHCI_HFLAG_NO_MSI), AHCI_HFLAGS (AHCI_HFLAG_NO_MSI),
.flags = AHCI_FLAG_COMMON, .flags = AHCI_FLAG_COMMON,
@ -437,6 +445,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
board_ahci_al }, board_ahci_al },
/* AMD */ /* AMD */
{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
{ PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
{ PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */ { PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */
/* AMD is using RAID class only for ahci controllers */ /* AMD is using RAID class only for ahci controllers */
@ -684,7 +693,7 @@ static void ahci_pci_init_controller(struct ata_host *host)
/* clear port IRQ */ /* clear port IRQ */
tmp = readl(port_mmio + PORT_IRQ_STAT); tmp = readl(port_mmio + PORT_IRQ_STAT);
VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); dev_dbg(&pdev->dev, "PORT_IRQ_STAT 0x%x\n", tmp);
if (tmp) if (tmp)
writel(tmp, port_mmio + PORT_IRQ_STAT); writel(tmp, port_mmio + PORT_IRQ_STAT);
} }
@ -700,8 +709,6 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
bool online; bool online;
int rc; int rc;
DPRINTK("ENTER\n");
hpriv->stop_engine(ap); hpriv->stop_engine(ap);
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
@ -709,8 +716,6 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
hpriv->start_engine(ap); hpriv->start_engine(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
/* vt8251 doesn't clear BSY on signature FIS reception, /* vt8251 doesn't clear BSY on signature FIS reception,
* request follow-up softreset. * request follow-up softreset.
*/ */
@ -790,8 +795,6 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class,
bool online; bool online;
int rc, i; int rc, i;
DPRINTK("ENTER\n");
hpriv->stop_engine(ap); hpriv->stop_engine(ap);
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
@ -829,7 +832,6 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class,
if (online) if (online)
*class = ahci_dev_classify(ap); *class = ahci_dev_classify(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc; return rc;
} }
@ -1476,7 +1478,6 @@ static irqreturn_t ahci_thunderx_irq_handler(int irq, void *dev_instance)
u32 irq_stat, irq_masked; u32 irq_stat, irq_masked;
unsigned int handled = 1; unsigned int handled = 1;
VPRINTK("ENTER\n");
hpriv = host->private_data; hpriv = host->private_data;
mmio = hpriv->mmio; mmio = hpriv->mmio;
irq_stat = readl(mmio + HOST_IRQ_STAT); irq_stat = readl(mmio + HOST_IRQ_STAT);
@ -1493,7 +1494,6 @@ static irqreturn_t ahci_thunderx_irq_handler(int irq, void *dev_instance)
irq_stat = readl(mmio + HOST_IRQ_STAT); irq_stat = readl(mmio + HOST_IRQ_STAT);
spin_unlock(&host->lock); spin_unlock(&host->lock);
} while (irq_stat); } while (irq_stat);
VPRINTK("EXIT\n");
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
@ -1657,7 +1657,7 @@ static ssize_t remapped_nvme_show(struct device *dev,
struct ata_host *host = dev_get_drvdata(dev); struct ata_host *host = dev_get_drvdata(dev);
struct ahci_host_priv *hpriv = host->private_data; struct ahci_host_priv *hpriv = host->private_data;
return sprintf(buf, "%u\n", hpriv->remapped_nvme); return sysfs_emit(buf, "%u\n", hpriv->remapped_nvme);
} }
static DEVICE_ATTR_RO(remapped_nvme); static DEVICE_ATTR_RO(remapped_nvme);
@ -1673,8 +1673,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
int n_ports, i, rc; int n_ports, i, rc;
int ahci_pci_bar = AHCI_PCI_BAR_STANDARD; int ahci_pci_bar = AHCI_PCI_BAR_STANDARD;
VPRINTK("ENTER\n");
WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS); WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS);
ata_print_version_once(&pdev->dev, DRV_VERSION); ata_print_version_once(&pdev->dev, DRV_VERSION);

4
drivers/ata/ahci_brcm.c
View file

@ -246,7 +246,7 @@ static void brcm_sata_init(struct brcm_ahci_priv *priv)
} }
static unsigned int brcm_ahci_read_id(struct ata_device *dev, static unsigned int brcm_ahci_read_id(struct ata_device *dev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
struct ata_port *ap = dev->link->ap; struct ata_port *ap = dev->link->ap;
struct ata_host *host = ap->host; struct ata_host *host = ap->host;
@ -333,7 +333,7 @@ static struct ata_port_operations ahci_brcm_platform_ops = {
static const struct ata_port_info ahci_brcm_port_info = { static const struct ata_port_info ahci_brcm_port_info = {
.flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM, .flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM,
.link_flags = ATA_LFLAG_NO_DB_DELAY, .link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY,
.pio_mask = ATA_PIO4, .pio_mask = ATA_PIO4,
.udma_mask = ATA_UDMA6, .udma_mask = ATA_UDMA6,
.port_ops = &ahci_brcm_platform_ops, .port_ops = &ahci_brcm_platform_ops,

5
drivers/ata/ahci_ceva.c
View file

@ -92,9 +92,8 @@ struct ceva_ahci_priv {
}; };
static unsigned int ceva_ahci_read_id(struct ata_device *dev, static unsigned int ceva_ahci_read_id(struct ata_device *dev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
__le16 *__id = (__le16 *)id;
u32 err_mask; u32 err_mask;
err_mask = ata_do_dev_read_id(dev, tf, id); err_mask = ata_do_dev_read_id(dev, tf, id);
@ -104,7 +103,7 @@ static unsigned int ceva_ahci_read_id(struct ata_device *dev,
* Since CEVA controller does not support device sleep feature, we * Since CEVA controller does not support device sleep feature, we
* need to clear DEVSLP (bit 8) in word78 of the IDENTIFY DEVICE data. * need to clear DEVSLP (bit 8) in word78 of the IDENTIFY DEVICE data.
*/ */
__id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8)); id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8));
return 0; return 0;
} }

4
drivers/ata/ahci_qoriq.c
View file

@ -103,8 +103,6 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
int rc; int rc;
bool ls1021a_workaround = (qoriq_priv->type == AHCI_LS1021A); bool ls1021a_workaround = (qoriq_priv->type == AHCI_LS1021A);
DPRINTK("ENTER\n");
hpriv->stop_engine(ap); hpriv->stop_engine(ap);
/* /*
@ -146,8 +144,6 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
if (online) if (online)
*class = ahci_dev_classify(ap); *class = ahci_dev_classify(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc; return rc;
} }

12
drivers/ata/ahci_xgene.c
View file

@ -193,7 +193,7 @@ static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
struct xgene_ahci_context *ctx = hpriv->plat_data; struct xgene_ahci_context *ctx = hpriv->plat_data;
int rc = 0; int rc = 0;
u32 port_fbs; u32 port_fbs;
void *port_mmio = ahci_port_base(ap); void __iomem *port_mmio = ahci_port_base(ap);
/* /*
* Write the pmp value to PxFBS.DEV * Write the pmp value to PxFBS.DEV
@ -237,7 +237,7 @@ static bool xgene_ahci_is_memram_inited(struct xgene_ahci_context *ctx)
* does not support DEVSLP. * does not support DEVSLP.
*/ */
static unsigned int xgene_ahci_read_id(struct ata_device *dev, static unsigned int xgene_ahci_read_id(struct ata_device *dev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
u32 err_mask; u32 err_mask;
@ -454,7 +454,7 @@ static int xgene_ahci_pmp_softreset(struct ata_link *link, unsigned int *class,
int pmp = sata_srst_pmp(link); int pmp = sata_srst_pmp(link);
struct ata_port *ap = link->ap; struct ata_port *ap = link->ap;
u32 rc; u32 rc;
void *port_mmio = ahci_port_base(ap); void __iomem *port_mmio = ahci_port_base(ap);
u32 port_fbs; u32 port_fbs;
/* /*
@ -499,7 +499,7 @@ static int xgene_ahci_softreset(struct ata_link *link, unsigned int *class,
struct ata_port *ap = link->ap; struct ata_port *ap = link->ap;
struct ahci_host_priv *hpriv = ap->host->private_data; struct ahci_host_priv *hpriv = ap->host->private_data;
struct xgene_ahci_context *ctx = hpriv->plat_data; struct xgene_ahci_context *ctx = hpriv->plat_data;
void *port_mmio = ahci_port_base(ap); void __iomem *port_mmio = ahci_port_base(ap);
u32 port_fbs; u32 port_fbs;
u32 port_fbs_save; u32 port_fbs_save;
u32 retry = 1; u32 retry = 1;
@ -588,8 +588,6 @@ static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
void __iomem *mmio; void __iomem *mmio;
u32 irq_stat, irq_masked; u32 irq_stat, irq_masked;
VPRINTK("ENTER\n");
hpriv = host->private_data; hpriv = host->private_data;
mmio = hpriv->mmio; mmio = hpriv->mmio;
@ -612,8 +610,6 @@ static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
spin_unlock(&host->lock); spin_unlock(&host->lock);
VPRINTK("EXIT\n");
return IRQ_RETVAL(rc); return IRQ_RETVAL(rc);
} }

11
drivers/ata/ata_piix.c
View file

@ -77,6 +77,7 @@
#include <scsi/scsi_host.h> #include <scsi/scsi_host.h>
#include <linux/libata.h> #include <linux/libata.h>
#include <linux/dmi.h> #include <linux/dmi.h>
#include <trace/events/libata.h>
#define DRV_NAME "ata_piix" #define DRV_NAME "ata_piix"
#define DRV_VERSION "2.13" #define DRV_VERSION "2.13"
@ -816,10 +817,15 @@ static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
static bool piix_irq_check(struct ata_port *ap) static bool piix_irq_check(struct ata_port *ap)
{ {
unsigned char host_stat;
if (unlikely(!ap->ioaddr.bmdma_addr)) if (unlikely(!ap->ioaddr.bmdma_addr))
return false; return false;
return ap->ops->bmdma_status(ap) & ATA_DMA_INTR; host_stat = ap->ops->bmdma_status(ap);
trace_ata_bmdma_status(ap, host_stat);
return host_stat & ATA_DMA_INTR;
} }
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
@ -1345,7 +1351,6 @@ static void piix_init_pcs(struct ata_host *host,
new_pcs = pcs | map_db->port_enable; new_pcs = pcs | map_db->port_enable;
if (new_pcs != pcs) { if (new_pcs != pcs) {
DPRINTK("updating PCS from 0x%x to 0x%x\n", pcs, new_pcs);
pci_write_config_word(pdev, ICH5_PCS, new_pcs); pci_write_config_word(pdev, ICH5_PCS, new_pcs);
msleep(150); msleep(150);
} }
@ -1769,14 +1774,12 @@ static int __init piix_init(void)
{ {
int rc; int rc;
DPRINTK("pci_register_driver\n");
rc = pci_register_driver(&piix_pci_driver); rc = pci_register_driver(&piix_pci_driver);
if (rc) if (rc)
return rc; return rc;
in_module_init = 0; in_module_init = 0;
DPRINTK("done\n");
return 0; return 0;
} }

33
drivers/ata/libahci.c
View file

@ -1234,12 +1234,12 @@ static void ahci_port_init(struct device *dev, struct ata_port *ap,
/* clear SError */ /* clear SError */
tmp = readl(port_mmio + PORT_SCR_ERR); tmp = readl(port_mmio + PORT_SCR_ERR);
VPRINTK("PORT_SCR_ERR 0x%x\n", tmp); dev_dbg(dev, "PORT_SCR_ERR 0x%x\n", tmp);
writel(tmp, port_mmio + PORT_SCR_ERR); writel(tmp, port_mmio + PORT_SCR_ERR);
/* clear port IRQ */ /* clear port IRQ */
tmp = readl(port_mmio + PORT_IRQ_STAT); tmp = readl(port_mmio + PORT_IRQ_STAT);
VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); dev_dbg(dev, "PORT_IRQ_STAT 0x%x\n", tmp);
if (tmp) if (tmp)
writel(tmp, port_mmio + PORT_IRQ_STAT); writel(tmp, port_mmio + PORT_IRQ_STAT);
@ -1270,10 +1270,10 @@ void ahci_init_controller(struct ata_host *host)
} }
tmp = readl(mmio + HOST_CTL); tmp = readl(mmio + HOST_CTL);
VPRINTK("HOST_CTL 0x%x\n", tmp); dev_dbg(host->dev, "HOST_CTL 0x%x\n", tmp);
writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL); writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
tmp = readl(mmio + HOST_CTL); tmp = readl(mmio + HOST_CTL);
VPRINTK("HOST_CTL 0x%x\n", tmp); dev_dbg(host->dev, "HOST_CTL 0x%x\n", tmp);
} }
EXPORT_SYMBOL_GPL(ahci_init_controller); EXPORT_SYMBOL_GPL(ahci_init_controller);
@ -1300,7 +1300,7 @@ unsigned int ahci_dev_classify(struct ata_port *ap)
tf.lbal = (tmp >> 8) & 0xff; tf.lbal = (tmp >> 8) & 0xff;
tf.nsect = (tmp) & 0xff; tf.nsect = (tmp) & 0xff;
return ata_dev_classify(&tf); return ata_port_classify(ap, &tf);
} }
EXPORT_SYMBOL_GPL(ahci_dev_classify); EXPORT_SYMBOL_GPL(ahci_dev_classify);
@ -1415,8 +1415,6 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
bool fbs_disabled = false; bool fbs_disabled = false;
int rc; int rc;
DPRINTK("ENTER\n");
/* prepare for SRST (AHCI-1.1 10.4.1) */ /* prepare for SRST (AHCI-1.1 10.4.1) */
rc = ahci_kick_engine(ap); rc = ahci_kick_engine(ap);
if (rc && rc != -EOPNOTSUPP) if (rc && rc != -EOPNOTSUPP)
@ -1476,7 +1474,6 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
if (fbs_disabled) if (fbs_disabled)
ahci_enable_fbs(ap); ahci_enable_fbs(ap);
DPRINTK("EXIT, class=%u\n", *class);
return 0; return 0;
fail: fail:
@ -1498,8 +1495,6 @@ static int ahci_softreset(struct ata_link *link, unsigned int *class,
{ {
int pmp = sata_srst_pmp(link); int pmp = sata_srst_pmp(link);
DPRINTK("ENTER\n");
return ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); return ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
} }
EXPORT_SYMBOL_GPL(ahci_do_softreset); EXPORT_SYMBOL_GPL(ahci_do_softreset);
@ -1529,8 +1524,6 @@ static int ahci_pmp_retry_softreset(struct ata_link *link, unsigned int *class,
int rc; int rc;
u32 irq_sts; u32 irq_sts;
DPRINTK("ENTER\n");
rc = ahci_do_softreset(link, class, pmp, deadline, rc = ahci_do_softreset(link, class, pmp, deadline,
ahci_bad_pmp_check_ready); ahci_bad_pmp_check_ready);
@ -1564,8 +1557,6 @@ int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
struct ata_taskfile tf; struct ata_taskfile tf;
int rc; int rc;
DPRINTK("ENTER\n");
hpriv->stop_engine(ap); hpriv->stop_engine(ap);
/* clear D2H reception area to properly wait for D2H FIS */ /* clear D2H reception area to properly wait for D2H FIS */
@ -1581,7 +1572,6 @@ int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
if (*online) if (*online)
*class = ahci_dev_classify(ap); *class = ahci_dev_classify(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc; return rc;
} }
EXPORT_SYMBOL_GPL(ahci_do_hardreset); EXPORT_SYMBOL_GPL(ahci_do_hardreset);
@ -1620,8 +1610,6 @@ static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ; struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
unsigned int si; unsigned int si;
VPRINTK("ENTER\n");
/* /*
* Next, the S/G list. * Next, the S/G list.
*/ */
@ -1695,7 +1683,6 @@ static void ahci_fbs_dec_intr(struct ata_port *ap)
u32 fbs = readl(port_mmio + PORT_FBS); u32 fbs = readl(port_mmio + PORT_FBS);
int retries = 3; int retries = 3;
DPRINTK("ENTER\n");
BUG_ON(!pp->fbs_enabled); BUG_ON(!pp->fbs_enabled);
/* time to wait for DEC is not specified by AHCI spec, /* time to wait for DEC is not specified by AHCI spec,
@ -1924,8 +1911,6 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
void __iomem *port_mmio = ahci_port_base(ap); void __iomem *port_mmio = ahci_port_base(ap);
u32 status; u32 status;
VPRINTK("ENTER\n");
status = readl(port_mmio + PORT_IRQ_STAT); status = readl(port_mmio + PORT_IRQ_STAT);
writel(status, port_mmio + PORT_IRQ_STAT); writel(status, port_mmio + PORT_IRQ_STAT);
@ -1933,8 +1918,6 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
ahci_handle_port_interrupt(ap, port_mmio, status); ahci_handle_port_interrupt(ap, port_mmio, status);
spin_unlock(ap->lock); spin_unlock(ap->lock);
VPRINTK("EXIT\n");
return IRQ_HANDLED; return IRQ_HANDLED;
} }
@ -1951,9 +1934,7 @@ u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
ap = host->ports[i]; ap = host->ports[i];
if (ap) { if (ap) {
ahci_port_intr(ap); ahci_port_intr(ap);
VPRINTK("port %u\n", i);
} else { } else {
VPRINTK("port %u (no irq)\n", i);
if (ata_ratelimit()) if (ata_ratelimit())
dev_warn(host->dev, dev_warn(host->dev,
"interrupt on disabled port %u\n", i); "interrupt on disabled port %u\n", i);
@ -1974,8 +1955,6 @@ static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
void __iomem *mmio; void __iomem *mmio;
u32 irq_stat, irq_masked; u32 irq_stat, irq_masked;
VPRINTK("ENTER\n");
hpriv = host->private_data; hpriv = host->private_data;
mmio = hpriv->mmio; mmio = hpriv->mmio;
@ -2003,8 +1982,6 @@ static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
spin_unlock(&host->lock); spin_unlock(&host->lock);
VPRINTK("EXIT\n");
return IRQ_RETVAL(rc); return IRQ_RETVAL(rc);
} }

14
drivers/ata/libahci_platform.c
View file

@ -579,11 +579,8 @@ int ahci_platform_init_host(struct platform_device *pdev,
int i, irq, n_ports, rc; int i, irq, n_ports, rc;
irq = platform_get_irq(pdev, 0); irq = platform_get_irq(pdev, 0);
if (irq < 0) { if (irq < 0)
if (irq != -EPROBE_DEFER)
dev_err(dev, "no irq\n");
return irq; return irq;
}
if (!irq) if (!irq)
return -EINVAL; return -EINVAL;
@ -642,13 +639,8 @@ int ahci_platform_init_host(struct platform_device *pdev,
if (hpriv->cap & HOST_CAP_64) { if (hpriv->cap & HOST_CAP_64) {
rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
if (rc) { if (rc) {
rc = dma_coerce_mask_and_coherent(dev, dev_err(dev, "Failed to enable 64-bit DMA.\n");
DMA_BIT_MASK(32)); return rc;
if (rc) {
dev_err(dev, "Failed to enable 64-bit DMA.\n");
return rc;
}
dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
} }
} }

69
drivers/ata/libata-acpi.c
View file

@ -402,7 +402,6 @@ EXPORT_SYMBOL_GPL(ata_acpi_stm);
*/ */
static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf) static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
{ {
struct ata_port *ap = dev->link->ap;
acpi_status status; acpi_status status;
struct acpi_buffer output; struct acpi_buffer output;
union acpi_object *out_obj; union acpi_object *out_obj;
@ -418,10 +417,6 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
output.length = ACPI_ALLOCATE_BUFFER; output.length = ACPI_ALLOCATE_BUFFER;
output.pointer = NULL; /* ACPI-CA sets this; save/free it later */ output.pointer = NULL; /* ACPI-CA sets this; save/free it later */
if (ata_msg_probe(ap))
ata_dev_dbg(dev, "%s: ENTER: port#: %d\n",
__func__, ap->port_no);
/* _GTF has no input parameters */ /* _GTF has no input parameters */
status = acpi_evaluate_object(ata_dev_acpi_handle(dev), "_GTF", NULL, status = acpi_evaluate_object(ata_dev_acpi_handle(dev), "_GTF", NULL,
&output); &output);
@ -437,11 +432,9 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
} }
if (!output.length || !output.pointer) { if (!output.length || !output.pointer) {
if (ata_msg_probe(ap)) ata_dev_dbg(dev, "Run _GTF: length or ptr is NULL (0x%llx, 0x%p)\n",
ata_dev_dbg(dev, "%s: Run _GTF: length or ptr is NULL (0x%llx, 0x%p)\n", (unsigned long long)output.length,
__func__, output.pointer);
(unsigned long long)output.length,
output.pointer);
rc = -EINVAL; rc = -EINVAL;
goto out_free; goto out_free;
} }
@ -464,9 +457,8 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
rc = out_obj->buffer.length / REGS_PER_GTF; rc = out_obj->buffer.length / REGS_PER_GTF;
if (gtf) { if (gtf) {
*gtf = (void *)out_obj->buffer.pointer; *gtf = (void *)out_obj->buffer.pointer;
if (ata_msg_probe(ap)) ata_dev_dbg(dev, "returning gtf=%p, gtf_count=%d\n",
ata_dev_dbg(dev, "%s: returning gtf=%p, gtf_count=%d\n", *gtf, rc);
__func__, *gtf, rc);
} }
return rc; return rc;
@ -650,9 +642,7 @@ static int ata_acpi_run_tf(struct ata_device *dev,
struct ata_taskfile *pptf = NULL; struct ata_taskfile *pptf = NULL;
struct ata_taskfile tf, ptf, rtf; struct ata_taskfile tf, ptf, rtf;
unsigned int err_mask; unsigned int err_mask;
const char *level;
const char *descr; const char *descr;
char msg[60];
int rc; int rc;
if ((gtf->tf[0] == 0) && (gtf->tf[1] == 0) && (gtf->tf[2] == 0) if ((gtf->tf[0] == 0) && (gtf->tf[1] == 0) && (gtf->tf[2] == 0)
@ -666,6 +656,8 @@ static int ata_acpi_run_tf(struct ata_device *dev,
pptf = &ptf; pptf = &ptf;
} }
descr = ata_get_cmd_name(tf.command);
if (!ata_acpi_filter_tf(dev, &tf, pptf)) { if (!ata_acpi_filter_tf(dev, &tf, pptf)) {
rtf = tf; rtf = tf;
err_mask = ata_exec_internal(dev, &rtf, NULL, err_mask = ata_exec_internal(dev, &rtf, NULL,
@ -673,40 +665,42 @@ static int ata_acpi_run_tf(struct ata_device *dev,
switch (err_mask) { switch (err_mask) {
case 0: case 0:
level = KERN_DEBUG; ata_dev_dbg(dev,
snprintf(msg, sizeof(msg), "succeeded"); "ACPI cmd %02x/%02x:%02x:%02x:%02x:%02x:%02x"
"(%s) succeeded\n",
tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr);
rc = 1; rc = 1;
break; break;
case AC_ERR_DEV: case AC_ERR_DEV:
level = KERN_INFO; ata_dev_info(dev,
snprintf(msg, sizeof(msg), "ACPI cmd %02x/%02x:%02x:%02x:%02x:%02x:%02x"
"rejected by device (Stat=0x%02x Err=0x%02x)", "(%s) rejected by device (Stat=0x%02x Err=0x%02x)",
rtf.command, rtf.feature); tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr,
rtf.command, rtf.feature);
rc = 0; rc = 0;
break; break;
default: default:
level = KERN_ERR; ata_dev_err(dev,
snprintf(msg, sizeof(msg), "ACPI cmd %02x/%02x:%02x:%02x:%02x:%02x:%02x"
"failed (Emask=0x%x Stat=0x%02x Err=0x%02x)", "(%s) failed (Emask=0x%x Stat=0x%02x Err=0x%02x)",
err_mask, rtf.command, rtf.feature); tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr,
err_mask, rtf.command, rtf.feature);
rc = -EIO; rc = -EIO;
break; break;
} }
} else { } else {
level = KERN_INFO; ata_dev_info(dev,
snprintf(msg, sizeof(msg), "filtered out"); "ACPI cmd %02x/%02x:%02x:%02x:%02x:%02x:%02x"
"(%s) filtered out\n",
tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr);
rc = 0; rc = 0;
} }
descr = ata_get_cmd_descript(tf.command);
ata_dev_printk(dev, level,
"ACPI cmd %02x/%02x:%02x:%02x:%02x:%02x:%02x (%s) %s\n",
tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device,
(descr ? descr : "unknown"), msg);
return rc; return rc;
} }
@ -776,9 +770,8 @@ static int ata_acpi_push_id(struct ata_device *dev)
struct acpi_object_list input; struct acpi_object_list input;
union acpi_object in_params[1]; union acpi_object in_params[1];
if (ata_msg_probe(ap)) ata_dev_dbg(dev, "%s: ix = %d, port#: %d\n",
ata_dev_dbg(dev, "%s: ix = %d, port#: %d\n", __func__, dev->devno, ap->port_no);
__func__, dev->devno, ap->port_no);
/* Give the drive Identify data to the drive via the _SDD method */ /* Give the drive Identify data to the drive via the _SDD method */
/* _SDD: set up input parameters */ /* _SDD: set up input parameters */

229
drivers/ata/libata-core.c
View file

@ -764,9 +764,6 @@ int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
head = track % dev->heads; head = track % dev->heads;
sect = (u32)block % dev->sectors + 1; sect = (u32)block % dev->sectors + 1;
DPRINTK("block %u track %u cyl %u head %u sect %u\n",
(u32)block, track, cyl, head, sect);
/* Check whether the converted CHS can fit. /* Check whether the converted CHS can fit.
Cylinder: 0-65535 Cylinder: 0-65535
Head: 0-15 Head: 0-15
@ -1010,32 +1007,21 @@ unsigned int ata_dev_classify(const struct ata_taskfile *tf)
* SEMB signature. This is worked around in * SEMB signature. This is worked around in
* ata_dev_read_id(). * ata_dev_read_id().
*/ */
if ((tf->lbam == 0) && (tf->lbah == 0)) { if (tf->lbam == 0 && tf->lbah == 0)
DPRINTK("found ATA device by sig\n");
return ATA_DEV_ATA; return ATA_DEV_ATA;
}
if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { if (tf->lbam == 0x14 && tf->lbah == 0xeb)
DPRINTK("found ATAPI device by sig\n");
return ATA_DEV_ATAPI; return ATA_DEV_ATAPI;
}
if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { if (tf->lbam == 0x69 && tf->lbah == 0x96)
DPRINTK("found PMP device by sig\n");
return ATA_DEV_PMP; return ATA_DEV_PMP;
}
if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { if (tf->lbam == 0x3c && tf->lbah == 0xc3)
DPRINTK("found SEMB device by sig (could be ATA device)\n");
return ATA_DEV_SEMB; return ATA_DEV_SEMB;
}
if ((tf->lbam == 0xcd) && (tf->lbah == 0xab)) { if (tf->lbam == 0xcd && tf->lbah == 0xab)
DPRINTK("found ZAC device by sig\n");
return ATA_DEV_ZAC; return ATA_DEV_ZAC;
}
DPRINTK("unknown device\n");
return ATA_DEV_UNKNOWN; return ATA_DEV_UNKNOWN;
} }
EXPORT_SYMBOL_GPL(ata_dev_classify); EXPORT_SYMBOL_GPL(ata_dev_classify);
@ -1355,6 +1341,7 @@ static int ata_hpa_resize(struct ata_device *dev)
/** /**
* ata_dump_id - IDENTIFY DEVICE info debugging output * ata_dump_id - IDENTIFY DEVICE info debugging output
* @dev: device from which the information is fetched
* @id: IDENTIFY DEVICE page to dump * @id: IDENTIFY DEVICE page to dump
* *
* Dump selected 16-bit words from the given IDENTIFY DEVICE * Dump selected 16-bit words from the given IDENTIFY DEVICE
@ -1364,32 +1351,14 @@ static int ata_hpa_resize(struct ata_device *dev)
* caller. * caller.
*/ */
static inline void ata_dump_id(const u16 *id) static inline void ata_dump_id(struct ata_device *dev, const u16 *id)
{ {
DPRINTK("49==0x%04x " ata_dev_dbg(dev,
"53==0x%04x " "49==0x%04x 53==0x%04x 63==0x%04x 64==0x%04x 75==0x%04x\n"
"63==0x%04x " "80==0x%04x 81==0x%04x 82==0x%04x 83==0x%04x 84==0x%04x\n"
"64==0x%04x " "88==0x%04x 93==0x%04x\n",
"75==0x%04x \n", id[49], id[53], id[63], id[64], id[75], id[80],
id[49], id[81], id[82], id[83], id[84], id[88], id[93]);
id[53],
id[63],
id[64],
id[75]);
DPRINTK("80==0x%04x "
"81==0x%04x "
"82==0x%04x "
"83==0x%04x "
"84==0x%04x \n",
id[80],
id[81],
id[82],
id[83],
id[84]);
DPRINTK("88==0x%04x "
"93==0x%04x\n",
id[88],
id[93]);
} }
/** /**
@ -1602,9 +1571,8 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
else else
ata_qc_complete(qc); ata_qc_complete(qc);
if (ata_msg_warn(ap)) ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n", command);
command);
} }
spin_unlock_irqrestore(ap->lock, flags); spin_unlock_irqrestore(ap->lock, flags);
@ -1754,7 +1722,7 @@ static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
* this function is wrapped or replaced by the driver * this function is wrapped or replaced by the driver
*/ */
unsigned int ata_do_dev_read_id(struct ata_device *dev, unsigned int ata_do_dev_read_id(struct ata_device *dev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE, return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
id, sizeof(id[0]) * ATA_ID_WORDS, 0); id, sizeof(id[0]) * ATA_ID_WORDS, 0);
@ -1794,9 +1762,6 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
int may_fallback = 1, tried_spinup = 0; int may_fallback = 1, tried_spinup = 0;
int rc; int rc;
if (ata_msg_ctl(ap))
ata_dev_dbg(dev, "%s: ENTER\n", __func__);
retry: retry:
ata_tf_init(dev, &tf); ata_tf_init(dev, &tf);
@ -1830,9 +1795,9 @@ retry:
tf.flags |= ATA_TFLAG_POLLING; tf.flags |= ATA_TFLAG_POLLING;
if (ap->ops->read_id) if (ap->ops->read_id)
err_mask = ap->ops->read_id(dev, &tf, id); err_mask = ap->ops->read_id(dev, &tf, (__le16 *)id);
else else
err_mask = ata_do_dev_read_id(dev, &tf, id); err_mask = ata_do_dev_read_id(dev, &tf, (__le16 *)id);
if (err_mask) { if (err_mask) {
if (err_mask & AC_ERR_NODEV_HINT) { if (err_mask & AC_ERR_NODEV_HINT) {
@ -1879,10 +1844,10 @@ retry:
} }
if (dev->horkage & ATA_HORKAGE_DUMP_ID) { if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
ata_dev_dbg(dev, "dumping IDENTIFY data, " ata_dev_info(dev, "dumping IDENTIFY data, "
"class=%d may_fallback=%d tried_spinup=%d\n", "class=%d may_fallback=%d tried_spinup=%d\n",
class, may_fallback, tried_spinup); class, may_fallback, tried_spinup);
print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET,
16, 2, id, ATA_ID_WORDS * sizeof(*id), true); 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
} }
@ -1966,9 +1931,8 @@ retry:
return 0; return 0;
err_out: err_out:
if (ata_msg_warn(ap)) ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n", reason, err_mask);
reason, err_mask);
return rc; return rc;
} }
@ -1996,7 +1960,7 @@ unsigned int ata_read_log_page(struct ata_device *dev, u8 log,
unsigned int err_mask; unsigned int err_mask;
bool dma = false; bool dma = false;
DPRINTK("read log page - log 0x%x, page 0x%x\n", log, page); ata_dev_dbg(dev, "read log page - log 0x%x, page 0x%x\n", log, page);
/* /*
* Return error without actually issuing the command on controllers * Return error without actually issuing the command on controllers
@ -2390,7 +2354,6 @@ static void ata_dev_config_trusted(struct ata_device *dev)
static int ata_dev_config_lba(struct ata_device *dev) static int ata_dev_config_lba(struct ata_device *dev)
{ {
struct ata_port *ap = dev->link->ap;
const u16 *id = dev->id; const u16 *id = dev->id;
const char *lba_desc; const char *lba_desc;
char ncq_desc[24]; char ncq_desc[24];
@ -2412,7 +2375,7 @@ static int ata_dev_config_lba(struct ata_device *dev)
ret = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); ret = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
/* print device info to dmesg */ /* print device info to dmesg */
if (ata_msg_drv(ap) && ata_dev_print_info(dev)) if (ata_dev_print_info(dev))
ata_dev_info(dev, ata_dev_info(dev,
"%llu sectors, multi %u: %s %s\n", "%llu sectors, multi %u: %s %s\n",
(unsigned long long)dev->n_sectors, (unsigned long long)dev->n_sectors,
@ -2423,7 +2386,6 @@ static int ata_dev_config_lba(struct ata_device *dev)
static void ata_dev_config_chs(struct ata_device *dev) static void ata_dev_config_chs(struct ata_device *dev)
{ {
struct ata_port *ap = dev->link->ap;
const u16 *id = dev->id; const u16 *id = dev->id;
if (ata_id_current_chs_valid(id)) { if (ata_id_current_chs_valid(id)) {
@ -2439,7 +2401,7 @@ static void ata_dev_config_chs(struct ata_device *dev)
} }
/* print device info to dmesg */ /* print device info to dmesg */
if (ata_msg_drv(ap) && ata_dev_print_info(dev)) if (ata_dev_print_info(dev))
ata_dev_info(dev, ata_dev_info(dev,
"%llu sectors, multi %u, CHS %u/%u/%u\n", "%llu sectors, multi %u, CHS %u/%u/%u\n",
(unsigned long long)dev->n_sectors, (unsigned long long)dev->n_sectors,
@ -2566,14 +2528,11 @@ int ata_dev_configure(struct ata_device *dev)
char modelbuf[ATA_ID_PROD_LEN+1]; char modelbuf[ATA_ID_PROD_LEN+1];
int rc; int rc;
if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { if (!ata_dev_enabled(dev)) {
ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__); ata_dev_dbg(dev, "no device\n");
return 0; return 0;
} }
if (ata_msg_probe(ap))
ata_dev_dbg(dev, "%s: ENTER\n", __func__);
/* set horkage */ /* set horkage */
dev->horkage |= ata_dev_blacklisted(dev); dev->horkage |= ata_dev_blacklisted(dev);
ata_force_horkage(dev); ata_force_horkage(dev);
@ -2621,13 +2580,12 @@ int ata_dev_configure(struct ata_device *dev)
return rc; return rc;
/* print device capabilities */ /* print device capabilities */
if (ata_msg_probe(ap)) ata_dev_dbg(dev,
ata_dev_dbg(dev, "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
"%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " "85:%04x 86:%04x 87:%04x 88:%04x\n",
"85:%04x 86:%04x 87:%04x 88:%04x\n", __func__,
__func__, id[49], id[82], id[83], id[84],
id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
id[85], id[86], id[87], id[88]);
/* initialize to-be-configured parameters */ /* initialize to-be-configured parameters */
dev->flags &= ~ATA_DFLAG_CFG_MASK; dev->flags &= ~ATA_DFLAG_CFG_MASK;
@ -2646,8 +2604,7 @@ int ata_dev_configure(struct ata_device *dev)
/* find max transfer mode; for printk only */ /* find max transfer mode; for printk only */
xfer_mask = ata_id_xfermask(id); xfer_mask = ata_id_xfermask(id);
if (ata_msg_probe(ap)) ata_dump_id(dev, id);
ata_dump_id(id);
/* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
@ -2685,7 +2642,7 @@ int ata_dev_configure(struct ata_device *dev)
} }
/* print device info to dmesg */ /* print device info to dmesg */
if (ata_msg_drv(ap) && print_info) if (print_info)
ata_dev_info(dev, "%s: %s, %s, max %s\n", ata_dev_info(dev, "%s: %s, %s, max %s\n",
revbuf, modelbuf, fwrevbuf, revbuf, modelbuf, fwrevbuf,
ata_mode_string(xfer_mask)); ata_mode_string(xfer_mask));
@ -2705,7 +2662,7 @@ int ata_dev_configure(struct ata_device *dev)
ata_dev_config_cpr(dev); ata_dev_config_cpr(dev);
dev->cdb_len = 32; dev->cdb_len = 32;
if (ata_msg_drv(ap) && print_info) if (print_info)
ata_dev_print_features(dev); ata_dev_print_features(dev);
} }
@ -2718,8 +2675,7 @@ int ata_dev_configure(struct ata_device *dev)
rc = atapi_cdb_len(id); rc = atapi_cdb_len(id);
if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
if (ata_msg_warn(ap)) ata_dev_warn(dev, "unsupported CDB len %d\n", rc);
ata_dev_warn(dev, "unsupported CDB len\n");
rc = -EINVAL; rc = -EINVAL;
goto err_out_nosup; goto err_out_nosup;
} }
@ -2763,7 +2719,7 @@ int ata_dev_configure(struct ata_device *dev)
} }
/* print device info to dmesg */ /* print device info to dmesg */
if (ata_msg_drv(ap) && print_info) if (print_info)
ata_dev_info(dev, ata_dev_info(dev,
"ATAPI: %s, %s, max %s%s%s%s\n", "ATAPI: %s, %s, max %s%s%s%s\n",
modelbuf, fwrevbuf, modelbuf, fwrevbuf,
@ -2780,7 +2736,7 @@ int ata_dev_configure(struct ata_device *dev)
/* Limit PATA drive on SATA cable bridge transfers to udma5, /* Limit PATA drive on SATA cable bridge transfers to udma5,
200 sectors */ 200 sectors */
if (ata_dev_knobble(dev)) { if (ata_dev_knobble(dev)) {
if (ata_msg_drv(ap) && print_info) if (print_info)
ata_dev_info(dev, "applying bridge limits\n"); ata_dev_info(dev, "applying bridge limits\n");
dev->udma_mask &= ATA_UDMA5; dev->udma_mask &= ATA_UDMA5;
dev->max_sectors = ATA_MAX_SECTORS; dev->max_sectors = ATA_MAX_SECTORS;
@ -2829,8 +2785,6 @@ int ata_dev_configure(struct ata_device *dev)
return 0; return 0;
err_out_nosup: err_out_nosup:
if (ata_msg_probe(ap))
ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
return rc; return rc;
} }
@ -3373,8 +3327,8 @@ static int ata_dev_set_mode(struct ata_device *dev)
dev_err_whine = " (device error ignored)"; dev_err_whine = " (device error ignored)";
} }
DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", ata_dev_dbg(dev, "xfer_shift=%u, xfer_mode=0x%x\n",
dev->xfer_shift, (int)dev->xfer_mode); dev->xfer_shift, (int)dev->xfer_mode);
if (!(ehc->i.flags & ATA_EHI_QUIET) || if (!(ehc->i.flags & ATA_EHI_QUIET) ||
ehc->i.flags & ATA_EHI_DID_HARDRESET) ehc->i.flags & ATA_EHI_DID_HARDRESET)
@ -3688,16 +3642,12 @@ void ata_std_postreset(struct ata_link *link, unsigned int *classes)
{ {
u32 serror; u32 serror;
DPRINTK("ENTER\n");
/* reset complete, clear SError */ /* reset complete, clear SError */
if (!sata_scr_read(link, SCR_ERROR, &serror)) if (!sata_scr_read(link, SCR_ERROR, &serror))
sata_scr_write(link, SCR_ERROR, serror); sata_scr_write(link, SCR_ERROR, serror);
/* print link status */ /* print link status */
sata_print_link_status(link); sata_print_link_status(link);
DPRINTK("EXIT\n");
} }
EXPORT_SYMBOL_GPL(ata_std_postreset); EXPORT_SYMBOL_GPL(ata_std_postreset);
@ -4324,7 +4274,7 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
unsigned int err_mask; unsigned int err_mask;
/* set up set-features taskfile */ /* set up set-features taskfile */
DPRINTK("set features - xfer mode\n"); ata_dev_dbg(dev, "set features - xfer mode\n");
/* Some controllers and ATAPI devices show flaky interrupt /* Some controllers and ATAPI devices show flaky interrupt
* behavior after setting xfer mode. Use polling instead. * behavior after setting xfer mode. Use polling instead.
@ -4346,7 +4296,6 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
/* On some disks, this command causes spin-up, so we need longer timeout */ /* On some disks, this command causes spin-up, so we need longer timeout */
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 15000); err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 15000);
DPRINTK("EXIT, err_mask=%x\n", err_mask);
return err_mask; return err_mask;
} }
@ -4372,7 +4321,7 @@ unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
unsigned long timeout = 0; unsigned long timeout = 0;
/* set up set-features taskfile */ /* set up set-features taskfile */
DPRINTK("set features - SATA features\n"); ata_dev_dbg(dev, "set features - SATA features\n");
ata_tf_init(dev, &tf); ata_tf_init(dev, &tf);
tf.command = ATA_CMD_SET_FEATURES; tf.command = ATA_CMD_SET_FEATURES;
@ -4386,7 +4335,6 @@ unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
ata_probe_timeout * 1000 : SETFEATURES_SPINUP_TIMEOUT; ata_probe_timeout * 1000 : SETFEATURES_SPINUP_TIMEOUT;
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, timeout); err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, timeout);
DPRINTK("EXIT, err_mask=%x\n", err_mask);
return err_mask; return err_mask;
} }
EXPORT_SYMBOL_GPL(ata_dev_set_feature); EXPORT_SYMBOL_GPL(ata_dev_set_feature);
@ -4414,7 +4362,7 @@ static unsigned int ata_dev_init_params(struct ata_device *dev,
return AC_ERR_INVALID; return AC_ERR_INVALID;
/* set up init dev params taskfile */ /* set up init dev params taskfile */
DPRINTK("init dev params \n"); ata_dev_dbg(dev, "init dev params \n");
ata_tf_init(dev, &tf); ata_tf_init(dev, &tf);
tf.command = ATA_CMD_INIT_DEV_PARAMS; tf.command = ATA_CMD_INIT_DEV_PARAMS;
@ -4430,7 +4378,6 @@ static unsigned int ata_dev_init_params(struct ata_device *dev,
if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
err_mask = 0; err_mask = 0;
DPRINTK("EXIT, err_mask=%x\n", err_mask);
return err_mask; return err_mask;
} }
@ -4542,8 +4489,6 @@ static void ata_sg_clean(struct ata_queued_cmd *qc)
WARN_ON_ONCE(sg == NULL); WARN_ON_ONCE(sg == NULL);
VPRINTK("unmapping %u sg elements\n", qc->n_elem);
if (qc->n_elem) if (qc->n_elem)
dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir); dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
@ -4569,13 +4514,10 @@ static int ata_sg_setup(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
unsigned int n_elem; unsigned int n_elem;
VPRINTK("ENTER, ata%u\n", ap->print_id);
n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir); n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
if (n_elem < 1) if (n_elem < 1)
return -1; return -1;
VPRINTK("%d sg elements mapped\n", n_elem);
qc->orig_n_elem = qc->n_elem; qc->orig_n_elem = qc->n_elem;
qc->n_elem = n_elem; qc->n_elem = n_elem;
qc->flags |= ATA_QCFLAG_DMAMAP; qc->flags |= ATA_QCFLAG_DMAMAP;
@ -4930,6 +4872,7 @@ void ata_qc_issue(struct ata_queued_cmd *qc)
return; return;
} }
trace_ata_qc_prep(qc);
qc->err_mask |= ap->ops->qc_prep(qc); qc->err_mask |= ap->ops->qc_prep(qc);
if (unlikely(qc->err_mask)) if (unlikely(qc->err_mask))
goto err; goto err;
@ -5375,8 +5318,6 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
{ {
struct ata_port *ap; struct ata_port *ap;
DPRINTK("ENTER\n");
ap = kzalloc(sizeof(*ap), GFP_KERNEL); ap = kzalloc(sizeof(*ap), GFP_KERNEL);
if (!ap) if (!ap)
return NULL; return NULL;
@ -5388,15 +5329,6 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
ap->host = host; ap->host = host;
ap->dev = host->dev; ap->dev = host->dev;
#if defined(ATA_VERBOSE_DEBUG)
/* turn on all debugging levels */
ap->msg_enable = 0x00FF;
#elif defined(ATA_DEBUG)
ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
#else
ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
#endif
mutex_init(&ap->scsi_scan_mutex); mutex_init(&ap->scsi_scan_mutex);
INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
@ -5493,8 +5425,6 @@ struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
int i; int i;
void *dr; void *dr;
DPRINTK("ENTER\n");
/* alloc a container for our list of ATA ports (buses) */ /* alloc a container for our list of ATA ports (buses) */
sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
host = kzalloc(sz, GFP_KERNEL); host = kzalloc(sz, GFP_KERNEL);
@ -5784,9 +5714,7 @@ int ata_port_probe(struct ata_port *ap)
__ata_port_probe(ap); __ata_port_probe(ap);
ata_port_wait_eh(ap); ata_port_wait_eh(ap);
} else { } else {
DPRINTK("ata%u: bus probe begin\n", ap->print_id);
rc = ata_bus_probe(ap); rc = ata_bus_probe(ap);
DPRINTK("ata%u: bus probe end\n", ap->print_id);
} }
return rc; return rc;
} }
@ -6553,69 +6481,14 @@ const struct ata_port_info ata_dummy_port_info = {
}; };
EXPORT_SYMBOL_GPL(ata_dummy_port_info); EXPORT_SYMBOL_GPL(ata_dummy_port_info);
/*
* Utility print functions
*/
void ata_port_printk(const struct ata_port *ap, const char *level,
const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
vaf.fmt = fmt;
vaf.va = &args;
printk("%sata%u: %pV", level, ap->print_id, &vaf);
va_end(args);
}
EXPORT_SYMBOL(ata_port_printk);
void ata_link_printk(const struct ata_link *link, const char *level,
const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
vaf.fmt = fmt;
vaf.va = &args;
if (sata_pmp_attached(link->ap) || link->ap->slave_link)
printk("%sata%u.%02u: %pV",
level, link->ap->print_id, link->pmp, &vaf);
else
printk("%sata%u: %pV",
level, link->ap->print_id, &vaf);
va_end(args);
}
EXPORT_SYMBOL(ata_link_printk);
void ata_dev_printk(const struct ata_device *dev, const char *level,
const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
vaf.fmt = fmt;
vaf.va = &args;
printk("%sata%u.%02u: %pV",
level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
&vaf);
va_end(args);
}
EXPORT_SYMBOL(ata_dev_printk);
void ata_print_version(const struct device *dev, const char *version) void ata_print_version(const struct device *dev, const char *version)
{ {
dev_printk(KERN_DEBUG, dev, "version %s\n", version); dev_printk(KERN_DEBUG, dev, "version %s\n", version);
} }
EXPORT_SYMBOL(ata_print_version); EXPORT_SYMBOL(ata_print_version);
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_tf_load);
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_exec_command);
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_bmdma_setup);
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_bmdma_start);
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_bmdma_status);

72
drivers/ata/libata-eh.c
View file

@ -533,8 +533,6 @@ void ata_scsi_error(struct Scsi_Host *host)
unsigned long flags; unsigned long flags;
LIST_HEAD(eh_work_q); LIST_HEAD(eh_work_q);
DPRINTK("ENTER\n");
spin_lock_irqsave(host->host_lock, flags); spin_lock_irqsave(host->host_lock, flags);
list_splice_init(&host->eh_cmd_q, &eh_work_q); list_splice_init(&host->eh_cmd_q, &eh_work_q);
spin_unlock_irqrestore(host->host_lock, flags); spin_unlock_irqrestore(host->host_lock, flags);
@ -548,7 +546,6 @@ void ata_scsi_error(struct Scsi_Host *host)
/* finish or retry handled scmd's and clean up */ /* finish or retry handled scmd's and clean up */
WARN_ON(!list_empty(&eh_work_q)); WARN_ON(!list_empty(&eh_work_q));
DPRINTK("EXIT\n");
} }
/** /**
@ -940,7 +937,7 @@ void ata_std_sched_eh(struct ata_port *ap)
ata_eh_set_pending(ap, 1); ata_eh_set_pending(ap, 1);
scsi_schedule_eh(ap->scsi_host); scsi_schedule_eh(ap->scsi_host);
DPRINTK("port EH scheduled\n"); trace_ata_std_sched_eh(ap);
} }
EXPORT_SYMBOL_GPL(ata_std_sched_eh); EXPORT_SYMBOL_GPL(ata_std_sched_eh);
@ -1070,7 +1067,7 @@ static void __ata_port_freeze(struct ata_port *ap)
ap->pflags |= ATA_PFLAG_FROZEN; ap->pflags |= ATA_PFLAG_FROZEN;
DPRINTK("ata%u port frozen\n", ap->print_id); trace_ata_port_freeze(ap);
} }
/** /**
@ -1147,7 +1144,7 @@ void ata_eh_thaw_port(struct ata_port *ap)
spin_unlock_irqrestore(ap->lock, flags); spin_unlock_irqrestore(ap->lock, flags);
DPRINTK("ata%u port thawed\n", ap->print_id); trace_ata_port_thaw(ap);
} }
static void ata_eh_scsidone(struct scsi_cmnd *scmd) static void ata_eh_scsidone(struct scsi_cmnd *scmd)
@ -1217,8 +1214,7 @@ void ata_dev_disable(struct ata_device *dev)
if (!ata_dev_enabled(dev)) if (!ata_dev_enabled(dev))
return; return;
if (ata_msg_drv(dev->link->ap)) ata_dev_warn(dev, "disable device\n");
ata_dev_warn(dev, "disabled\n");
ata_acpi_on_disable(dev); ata_acpi_on_disable(dev);
ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | ATA_DNXFER_QUIET); ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | ATA_DNXFER_QUIET);
dev->class++; dev->class++;
@ -1287,6 +1283,8 @@ void ata_eh_about_to_do(struct ata_link *link, struct ata_device *dev,
struct ata_eh_context *ehc = &link->eh_context; struct ata_eh_context *ehc = &link->eh_context;
unsigned long flags; unsigned long flags;
trace_ata_eh_about_to_do(link, dev ? dev->devno : 0, action);
spin_lock_irqsave(ap->lock, flags); spin_lock_irqsave(ap->lock, flags);
ata_eh_clear_action(link, dev, ehi, action); ata_eh_clear_action(link, dev, ehi, action);
@ -1317,6 +1315,8 @@ void ata_eh_done(struct ata_link *link, struct ata_device *dev,
{ {
struct ata_eh_context *ehc = &link->eh_context; struct ata_eh_context *ehc = &link->eh_context;
trace_ata_eh_done(link, dev ? dev->devno : 0, action);
ata_eh_clear_action(link, dev, &ehc->i, action); ata_eh_clear_action(link, dev, &ehc->i, action);
} }
@ -1421,8 +1421,6 @@ static void ata_eh_request_sense(struct ata_queued_cmd *qc,
return; return;
} }
DPRINTK("ATA request sense\n");
ata_tf_init(dev, &tf); ata_tf_init(dev, &tf);
tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
@ -1463,8 +1461,6 @@ unsigned int atapi_eh_request_sense(struct ata_device *dev,
struct ata_port *ap = dev->link->ap; struct ata_port *ap = dev->link->ap;
struct ata_taskfile tf; struct ata_taskfile tf;
DPRINTK("ATAPI request sense\n");
memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
/* initialize sense_buf with the error register, /* initialize sense_buf with the error register,
@ -1928,8 +1924,6 @@ static void ata_eh_link_autopsy(struct ata_link *link)
u32 serror; u32 serror;
int rc; int rc;
DPRINTK("ENTER\n");
if (ehc->i.flags & ATA_EHI_NO_AUTOPSY) if (ehc->i.flags & ATA_EHI_NO_AUTOPSY)
return; return;
@ -2036,7 +2030,6 @@ static void ata_eh_link_autopsy(struct ata_link *link)
ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask); ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask);
trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask); trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask);
} }
DPRINTK("EXIT\n");
} }
/** /**
@ -2086,16 +2079,15 @@ void ata_eh_autopsy(struct ata_port *ap)
} }
/** /**
* ata_get_cmd_descript - get description for ATA command * ata_get_cmd_name - get name for ATA command
* @command: ATA command code to get description for * @command: ATA command code to get name for
* *
* Return a textual description of the given command, or NULL if the * Return a textual name of the given command or "unknown"
* command is not known.
* *
* LOCKING: * LOCKING:
* None * None
*/ */
const char *ata_get_cmd_descript(u8 command) const char *ata_get_cmd_name(u8 command)
{ {
#ifdef CONFIG_ATA_VERBOSE_ERROR #ifdef CONFIG_ATA_VERBOSE_ERROR
static const struct static const struct
@ -2203,9 +2195,9 @@ const char *ata_get_cmd_descript(u8 command)
return cmd_descr[i].text; return cmd_descr[i].text;
#endif #endif
return NULL; return "unknown";
} }
EXPORT_SYMBOL_GPL(ata_get_cmd_descript); EXPORT_SYMBOL_GPL(ata_get_cmd_name);
/** /**
* ata_eh_link_report - report error handling to user * ata_eh_link_report - report error handling to user
@ -2354,12 +2346,9 @@ static void ata_eh_link_report(struct ata_link *link)
} }
__scsi_format_command(cdb_buf, sizeof(cdb_buf), __scsi_format_command(cdb_buf, sizeof(cdb_buf),
cdb, cdb_len); cdb, cdb_len);
} else { } else
const char *descr = ata_get_cmd_descript(cmd->command); ata_dev_err(qc->dev, "failed command: %s\n",
if (descr) ata_get_cmd_name(cmd->command));
ata_dev_err(qc->dev, "failed command: %s\n",
descr);
}
ata_dev_err(qc->dev, ata_dev_err(qc->dev,
"cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " "cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "
@ -2596,12 +2585,19 @@ int ata_eh_reset(struct ata_link *link, int classify,
/* mark that this EH session started with reset */ /* mark that this EH session started with reset */
ehc->last_reset = jiffies; ehc->last_reset = jiffies;
if (reset == hardreset) if (reset == hardreset) {
ehc->i.flags |= ATA_EHI_DID_HARDRESET; ehc->i.flags |= ATA_EHI_DID_HARDRESET;
else trace_ata_link_hardreset_begin(link, classes, deadline);
} else {
ehc->i.flags |= ATA_EHI_DID_SOFTRESET; ehc->i.flags |= ATA_EHI_DID_SOFTRESET;
trace_ata_link_softreset_begin(link, classes, deadline);
}
rc = ata_do_reset(link, reset, classes, deadline, true); rc = ata_do_reset(link, reset, classes, deadline, true);
if (reset == hardreset)
trace_ata_link_hardreset_end(link, classes, rc);
else
trace_ata_link_softreset_end(link, classes, rc);
if (rc && rc != -EAGAIN) { if (rc && rc != -EAGAIN) {
failed_link = link; failed_link = link;
goto fail; goto fail;
@ -2615,8 +2611,11 @@ int ata_eh_reset(struct ata_link *link, int classify,
ata_link_info(slave, "hard resetting link\n"); ata_link_info(slave, "hard resetting link\n");
ata_eh_about_to_do(slave, NULL, ATA_EH_RESET); ata_eh_about_to_do(slave, NULL, ATA_EH_RESET);
trace_ata_slave_hardreset_begin(slave, classes,
deadline);
tmp = ata_do_reset(slave, reset, classes, deadline, tmp = ata_do_reset(slave, reset, classes, deadline,
false); false);
trace_ata_slave_hardreset_end(slave, classes, tmp);
switch (tmp) { switch (tmp) {
case -EAGAIN: case -EAGAIN:
rc = -EAGAIN; rc = -EAGAIN;
@ -2644,7 +2643,9 @@ int ata_eh_reset(struct ata_link *link, int classify,
} }
ata_eh_about_to_do(link, NULL, ATA_EH_RESET); ata_eh_about_to_do(link, NULL, ATA_EH_RESET);
trace_ata_link_softreset_begin(link, classes, deadline);
rc = ata_do_reset(link, reset, classes, deadline, true); rc = ata_do_reset(link, reset, classes, deadline, true);
trace_ata_link_softreset_end(link, classes, rc);
if (rc) { if (rc) {
failed_link = link; failed_link = link;
goto fail; goto fail;
@ -2698,8 +2699,11 @@ int ata_eh_reset(struct ata_link *link, int classify,
*/ */
if (postreset) { if (postreset) {
postreset(link, classes); postreset(link, classes);
if (slave) trace_ata_link_postreset(link, classes, rc);
if (slave) {
postreset(slave, classes); postreset(slave, classes);
trace_ata_slave_postreset(slave, classes, rc);
}
} }
/* /*
@ -2921,8 +2925,6 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
unsigned long flags; unsigned long flags;
int rc = 0; int rc = 0;
DPRINTK("ENTER\n");
/* For PATA drive side cable detection to work, IDENTIFY must /* For PATA drive side cable detection to work, IDENTIFY must
* be done backwards such that PDIAG- is released by the slave * be done backwards such that PDIAG- is released by the slave
* device before the master device is identified. * device before the master device is identified.
@ -3036,7 +3038,6 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
err: err:
*r_failed_dev = dev; *r_failed_dev = dev;
DPRINTK("EXIT rc=%d\n", rc);
return rc; return rc;
} }
@ -3551,8 +3552,6 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
int rc, nr_fails; int rc, nr_fails;
unsigned long flags, deadline; unsigned long flags, deadline;
DPRINTK("ENTER\n");
/* prep for recovery */ /* prep for recovery */
ata_for_each_link(link, ap, EDGE) { ata_for_each_link(link, ap, EDGE) {
struct ata_eh_context *ehc = &link->eh_context; struct ata_eh_context *ehc = &link->eh_context;
@ -3760,7 +3759,6 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
if (rc && r_failed_link) if (rc && r_failed_link)
*r_failed_link = link; *r_failed_link = link;
DPRINTK("EXIT, rc=%d\n", rc);
return rc; return rc;
} }

8
drivers/ata/libata-pmp.c
View file

@ -652,8 +652,6 @@ static int sata_pmp_revalidate(struct ata_device *dev, unsigned int new_class)
u32 *gscr = (void *)ap->sector_buf; u32 *gscr = (void *)ap->sector_buf;
int rc; int rc;
DPRINTK("ENTER\n");
ata_eh_about_to_do(link, NULL, ATA_EH_REVALIDATE); ata_eh_about_to_do(link, NULL, ATA_EH_REVALIDATE);
if (!ata_dev_enabled(dev)) { if (!ata_dev_enabled(dev)) {
@ -686,12 +684,10 @@ static int sata_pmp_revalidate(struct ata_device *dev, unsigned int new_class)
ata_eh_done(link, NULL, ATA_EH_REVALIDATE); ata_eh_done(link, NULL, ATA_EH_REVALIDATE);
DPRINTK("EXIT, rc=0\n");
return 0; return 0;
fail: fail:
ata_dev_err(dev, "PMP revalidation failed (errno=%d)\n", rc); ata_dev_err(dev, "PMP revalidation failed (errno=%d)\n", rc);
DPRINTK("EXIT, rc=%d\n", rc);
return rc; return rc;
} }
@ -759,8 +755,6 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
int detach = 0, rc = 0; int detach = 0, rc = 0;
int reval_failed = 0; int reval_failed = 0;
DPRINTK("ENTER\n");
if (dev->flags & ATA_DFLAG_DETACH) { if (dev->flags & ATA_DFLAG_DETACH) {
detach = 1; detach = 1;
rc = -ENODEV; rc = -ENODEV;
@ -828,7 +822,6 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
/* okay, PMP resurrected */ /* okay, PMP resurrected */
ehc->i.flags = 0; ehc->i.flags = 0;
DPRINTK("EXIT, rc=0\n");
return 0; return 0;
fail: fail:
@ -838,7 +831,6 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
else else
ata_dev_disable(dev); ata_dev_disable(dev);
DPRINTK("EXIT, rc=%d\n", rc);
return rc; return rc;
} }

11
drivers/ata/libata-sata.c
View file

@ -317,7 +317,7 @@ int sata_link_resume(struct ata_link *link, const unsigned long *params,
* immediately after resuming. Delay 200ms before * immediately after resuming. Delay 200ms before
* debouncing. * debouncing.
*/ */
if (!(link->flags & ATA_LFLAG_NO_DB_DELAY)) if (!(link->flags & ATA_LFLAG_NO_DEBOUNCE_DELAY))
ata_msleep(link->ap, 200); ata_msleep(link->ap, 200);
/* is SControl restored correctly? */ /* is SControl restored correctly? */
@ -533,8 +533,6 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
u32 scontrol; u32 scontrol;
int rc; int rc;
DPRINTK("ENTER\n");
if (online) if (online)
*online = false; *online = false;
@ -610,7 +608,6 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
*online = false; *online = false;
ata_link_err(link, "COMRESET failed (errno=%d)\n", rc); ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
} }
DPRINTK("EXIT, rc=%d\n", rc);
return rc; return rc;
} }
EXPORT_SYMBOL_GPL(sata_link_hardreset); EXPORT_SYMBOL_GPL(sata_link_hardreset);
@ -876,7 +873,7 @@ static ssize_t ata_ncq_prio_enable_show(struct device *device,
ncq_prio_enable = dev->flags & ATA_DFLAG_NCQ_PRIO_ENABLE; ncq_prio_enable = dev->flags & ATA_DFLAG_NCQ_PRIO_ENABLE;
spin_unlock_irq(ap->lock); spin_unlock_irq(ap->lock);
return rc ? rc : snprintf(buf, 20, "%u\n", ncq_prio_enable); return rc ? rc : sysfs_emit(buf, "%u\n", ncq_prio_enable);
} }
static ssize_t ata_ncq_prio_enable_store(struct device *device, static ssize_t ata_ncq_prio_enable_store(struct device *device,
@ -972,7 +969,7 @@ ata_scsi_em_message_type_show(struct device *dev, struct device_attribute *attr,
struct Scsi_Host *shost = class_to_shost(dev); struct Scsi_Host *shost = class_to_shost(dev);
struct ata_port *ap = ata_shost_to_port(shost); struct ata_port *ap = ata_shost_to_port(shost);
return snprintf(buf, 23, "%d\n", ap->em_message_type); return sysfs_emit(buf, "%d\n", ap->em_message_type);
} }
DEVICE_ATTR(em_message_type, S_IRUGO, DEVICE_ATTR(em_message_type, S_IRUGO,
ata_scsi_em_message_type_show, NULL); ata_scsi_em_message_type_show, NULL);
@ -1261,8 +1258,6 @@ int ata_sas_queuecmd(struct scsi_cmnd *cmd, struct ata_port *ap)
{ {
int rc = 0; int rc = 0;
ata_scsi_dump_cdb(ap, cmd);
if (likely(ata_dev_enabled(ap->link.device))) if (likely(ata_dev_enabled(ap->link.device)))
rc = __ata_scsi_queuecmd(cmd, ap->link.device); rc = __ata_scsi_queuecmd(cmd, ap->link.device);
else { else {

170
drivers/ata/libata-scsi.c
View file

@ -121,7 +121,7 @@ static ssize_t ata_scsi_park_show(struct device *device,
unlock: unlock:
spin_unlock_irq(ap->lock); spin_unlock_irq(ap->lock);
return rc ? rc : snprintf(buf, 20, "%u\n", msecs); return rc ? rc : sysfs_emit(buf, "%u\n", msecs);
} }
static ssize_t ata_scsi_park_store(struct device *device, static ssize_t ata_scsi_park_store(struct device *device,
@ -668,7 +668,7 @@ static void ata_qc_set_pc_nbytes(struct ata_queued_cmd *qc)
/** /**
* ata_dump_status - user friendly display of error info * ata_dump_status - user friendly display of error info
* @id: id of the port in question * @ap: the port in question
* @tf: ptr to filled out taskfile * @tf: ptr to filled out taskfile
* *
* Decode and dump the ATA error/status registers for the user so * Decode and dump the ATA error/status registers for the user so
@ -678,37 +678,32 @@ static void ata_qc_set_pc_nbytes(struct ata_queued_cmd *qc)
* LOCKING: * LOCKING:
* inherited from caller * inherited from caller
*/ */
static void ata_dump_status(unsigned id, struct ata_taskfile *tf) static void ata_dump_status(struct ata_port *ap, struct ata_taskfile *tf)
{ {
u8 stat = tf->command, err = tf->feature; u8 stat = tf->command, err = tf->feature;
pr_warn("ata%u: status=0x%02x { ", id, stat);
if (stat & ATA_BUSY) { if (stat & ATA_BUSY) {
pr_cont("Busy }\n"); /* Data is not valid in this case */ ata_port_warn(ap, "status=0x%02x {Busy} ", stat);
} else { } else {
if (stat & ATA_DRDY) pr_cont("DriveReady "); ata_port_warn(ap, "status=0x%02x { %s%s%s%s%s%s%s} ", stat,
if (stat & ATA_DF) pr_cont("DeviceFault "); stat & ATA_DRDY ? "DriveReady " : "",
if (stat & ATA_DSC) pr_cont("SeekComplete "); stat & ATA_DF ? "DeviceFault " : "",
if (stat & ATA_DRQ) pr_cont("DataRequest "); stat & ATA_DSC ? "SeekComplete " : "",
if (stat & ATA_CORR) pr_cont("CorrectedError "); stat & ATA_DRQ ? "DataRequest " : "",
if (stat & ATA_SENSE) pr_cont("Sense "); stat & ATA_CORR ? "CorrectedError " : "",
if (stat & ATA_ERR) pr_cont("Error "); stat & ATA_SENSE ? "Sense " : "",
pr_cont("}\n"); stat & ATA_ERR ? "Error " : "");
if (err)
if (err) { ata_port_warn(ap, "error=0x%02x {%s%s%s%s%s%s", err,
pr_warn("ata%u: error=0x%02x { ", id, err); err & ATA_ABORTED ?
if (err & ATA_ABORTED) pr_cont("DriveStatusError "); "DriveStatusError " : "",
if (err & ATA_ICRC) { err & ATA_ICRC ?
if (err & ATA_ABORTED) (err & ATA_ABORTED ?
pr_cont("BadCRC "); "BadCRC " : "Sector ") : "",
else pr_cont("Sector "); err & ATA_UNC ? "UncorrectableError " : "",
} err & ATA_IDNF ? "SectorIdNotFound " : "",
if (err & ATA_UNC) pr_cont("UncorrectableError "); err & ATA_TRK0NF ? "TrackZeroNotFound " : "",
if (err & ATA_IDNF) pr_cont("SectorIdNotFound "); err & ATA_AMNF ? "AddrMarkNotFound " : "");
if (err & ATA_TRK0NF) pr_cont("TrackZeroNotFound ");
if (err & ATA_AMNF) pr_cont("AddrMarkNotFound ");
pr_cont("}\n");
}
} }
} }
@ -1299,8 +1294,6 @@ static void scsi_6_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
u64 lba = 0; u64 lba = 0;
u32 len; u32 len;
VPRINTK("six-byte command\n");
lba |= ((u64)(cdb[1] & 0x1f)) << 16; lba |= ((u64)(cdb[1] & 0x1f)) << 16;
lba |= ((u64)cdb[2]) << 8; lba |= ((u64)cdb[2]) << 8;
lba |= ((u64)cdb[3]); lba |= ((u64)cdb[3]);
@ -1326,8 +1319,6 @@ static void scsi_10_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
u64 lba = 0; u64 lba = 0;
u32 len = 0; u32 len = 0;
VPRINTK("ten-byte command\n");
lba |= ((u64)cdb[2]) << 24; lba |= ((u64)cdb[2]) << 24;
lba |= ((u64)cdb[3]) << 16; lba |= ((u64)cdb[3]) << 16;
lba |= ((u64)cdb[4]) << 8; lba |= ((u64)cdb[4]) << 8;
@ -1355,8 +1346,6 @@ static void scsi_16_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
u64 lba = 0; u64 lba = 0;
u32 len = 0; u32 len = 0;
VPRINTK("sixteen-byte command\n");
lba |= ((u64)cdb[2]) << 56; lba |= ((u64)cdb[2]) << 56;
lba |= ((u64)cdb[3]) << 48; lba |= ((u64)cdb[3]) << 48;
lba |= ((u64)cdb[4]) << 40; lba |= ((u64)cdb[4]) << 40;
@ -1469,9 +1458,6 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc)
head = track % dev->heads; head = track % dev->heads;
sect = (u32)block % dev->sectors + 1; sect = (u32)block % dev->sectors + 1;
DPRINTK("block %u track %u cyl %u head %u sect %u\n",
(u32)block, track, cyl, head, sect);
/* Check whether the converted CHS can fit. /* Check whether the converted CHS can fit.
Cylinder: 0-65535 Cylinder: 0-65535
Head: 0-15 Head: 0-15
@ -1594,7 +1580,6 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
goto invalid_fld; goto invalid_fld;
break; break;
default: default:
DPRINTK("no-byte command\n");
fp = 0; fp = 0;
goto invalid_fld; goto invalid_fld;
} }
@ -1672,7 +1657,7 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
cmd->result = SAM_STAT_GOOD; cmd->result = SAM_STAT_GOOD;
if (need_sense && !ap->ops->error_handler) if (need_sense && !ap->ops->error_handler)
ata_dump_status(ap->print_id, &qc->result_tf); ata_dump_status(ap, &qc->result_tf);
ata_qc_done(qc); ata_qc_done(qc);
} }
@ -1710,8 +1695,6 @@ static int ata_scsi_translate(struct ata_device *dev, struct scsi_cmnd *cmd,
struct ata_queued_cmd *qc; struct ata_queued_cmd *qc;
int rc; int rc;
VPRINTK("ENTER\n");
qc = ata_scsi_qc_new(dev, cmd); qc = ata_scsi_qc_new(dev, cmd);
if (!qc) if (!qc)
goto err_mem; goto err_mem;
@ -1742,13 +1725,11 @@ static int ata_scsi_translate(struct ata_device *dev, struct scsi_cmnd *cmd,
/* select device, send command to hardware */ /* select device, send command to hardware */
ata_qc_issue(qc); ata_qc_issue(qc);
VPRINTK("EXIT\n");
return 0; return 0;
early_finish: early_finish:
ata_qc_free(qc); ata_qc_free(qc);
scsi_done(cmd); scsi_done(cmd);
DPRINTK("EXIT - early finish (good or error)\n");
return 0; return 0;
err_did: err_did:
@ -1756,12 +1737,10 @@ err_did:
cmd->result = (DID_ERROR << 16); cmd->result = (DID_ERROR << 16);
scsi_done(cmd); scsi_done(cmd);
err_mem: err_mem:
DPRINTK("EXIT - internal\n");
return 0; return 0;
defer: defer:
ata_qc_free(qc); ata_qc_free(qc);
DPRINTK("EXIT - defer\n");
if (rc == ATA_DEFER_LINK) if (rc == ATA_DEFER_LINK)
return SCSI_MLQUEUE_DEVICE_BUSY; return SCSI_MLQUEUE_DEVICE_BUSY;
else else
@ -1858,8 +1837,6 @@ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf)
2 2
}; };
VPRINTK("ENTER\n");
/* set scsi removable (RMB) bit per ata bit, or if the /* set scsi removable (RMB) bit per ata bit, or if the
* AHCI port says it's external (Hotplug-capable, eSATA). * AHCI port says it's external (Hotplug-capable, eSATA).
*/ */
@ -2294,8 +2271,6 @@ static unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf)
u8 dpofua, bp = 0xff; u8 dpofua, bp = 0xff;
u16 fp; u16 fp;
VPRINTK("ENTER\n");
six_byte = (scsicmd[0] == MODE_SENSE); six_byte = (scsicmd[0] == MODE_SENSE);
ebd = !(scsicmd[1] & 0x8); /* dbd bit inverted == edb */ ebd = !(scsicmd[1] & 0x8); /* dbd bit inverted == edb */
/* /*
@ -2413,8 +2388,6 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
log2_per_phys = ata_id_log2_per_physical_sector(dev->id); log2_per_phys = ata_id_log2_per_physical_sector(dev->id);
lowest_aligned = ata_id_logical_sector_offset(dev->id, log2_per_phys); lowest_aligned = ata_id_logical_sector_offset(dev->id, log2_per_phys);
VPRINTK("ENTER\n");
if (args->cmd->cmnd[0] == READ_CAPACITY) { if (args->cmd->cmnd[0] == READ_CAPACITY) {
if (last_lba >= 0xffffffffULL) if (last_lba >= 0xffffffffULL)
last_lba = 0xffffffff; last_lba = 0xffffffff;
@ -2481,7 +2454,6 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
*/ */
static unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf) static unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf)
{ {
VPRINTK("ENTER\n");
rbuf[3] = 8; /* just one lun, LUN 0, size 8 bytes */ rbuf[3] = 8; /* just one lun, LUN 0, size 8 bytes */
return 0; return 0;
@ -2512,8 +2484,6 @@ static void atapi_request_sense(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
struct scsi_cmnd *cmd = qc->scsicmd; struct scsi_cmnd *cmd = qc->scsicmd;
DPRINTK("ATAPI request sense\n");
memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
#ifdef CONFIG_ATA_SFF #ifdef CONFIG_ATA_SFF
@ -2552,8 +2522,6 @@ static void atapi_request_sense(struct ata_queued_cmd *qc)
qc->complete_fn = atapi_sense_complete; qc->complete_fn = atapi_sense_complete;
ata_qc_issue(qc); ata_qc_issue(qc);
DPRINTK("EXIT\n");
} }
/* /*
@ -2581,8 +2549,6 @@ static void atapi_qc_complete(struct ata_queued_cmd *qc)
struct scsi_cmnd *cmd = qc->scsicmd; struct scsi_cmnd *cmd = qc->scsicmd;
unsigned int err_mask = qc->err_mask; unsigned int err_mask = qc->err_mask;
VPRINTK("ENTER, err_mask 0x%X\n", err_mask);
/* handle completion from new EH */ /* handle completion from new EH */
if (unlikely(qc->ap->ops->error_handler && if (unlikely(qc->ap->ops->error_handler &&
(err_mask || qc->flags & ATA_QCFLAG_SENSE_VALID))) { (err_mask || qc->flags & ATA_QCFLAG_SENSE_VALID))) {
@ -2663,7 +2629,6 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
if (scmd->sc_data_direction == DMA_TO_DEVICE) { if (scmd->sc_data_direction == DMA_TO_DEVICE) {
qc->tf.flags |= ATA_TFLAG_WRITE; qc->tf.flags |= ATA_TFLAG_WRITE;
DPRINTK("direction: write\n");
} }
qc->tf.command = ATA_CMD_PACKET; qc->tf.command = ATA_CMD_PACKET;
@ -3591,10 +3556,7 @@ static int ata_mselect_caching(struct ata_queued_cmd *qc,
*/ */
if (len != CACHE_MPAGE_LEN - 2) { if (len != CACHE_MPAGE_LEN - 2) {
if (len < CACHE_MPAGE_LEN - 2) *fp = min(len, CACHE_MPAGE_LEN - 2);
*fp = len;
else
*fp = CACHE_MPAGE_LEN - 2;
return -EINVAL; return -EINVAL;
} }
@ -3647,10 +3609,7 @@ static int ata_mselect_control(struct ata_queued_cmd *qc,
*/ */
if (len != CONTROL_MPAGE_LEN - 2) { if (len != CONTROL_MPAGE_LEN - 2) {
if (len < CONTROL_MPAGE_LEN - 2) *fp = min(len, CONTROL_MPAGE_LEN - 2);
*fp = len;
else
*fp = CONTROL_MPAGE_LEN - 2;
return -EINVAL; return -EINVAL;
} }
@ -3698,8 +3657,6 @@ static unsigned int ata_scsi_mode_select_xlat(struct ata_queued_cmd *qc)
u8 buffer[64]; u8 buffer[64];
const u8 *p = buffer; const u8 *p = buffer;
VPRINTK("ENTER\n");
six_byte = (cdb[0] == MODE_SELECT); six_byte = (cdb[0] == MODE_SELECT);
if (six_byte) { if (six_byte) {
if (scmd->cmd_len < 5) { if (scmd->cmd_len < 5) {
@ -3997,70 +3954,45 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
return NULL; return NULL;
} }
/**
* ata_scsi_dump_cdb - dump SCSI command contents to dmesg
* @ap: ATA port to which the command was being sent
* @cmd: SCSI command to dump
*
* Prints the contents of a SCSI command via printk().
*/
void ata_scsi_dump_cdb(struct ata_port *ap, struct scsi_cmnd *cmd)
{
#ifdef ATA_VERBOSE_DEBUG
struct scsi_device *scsidev = cmd->device;
VPRINTK("CDB (%u:%d,%d,%lld) %9ph\n",
ap->print_id,
scsidev->channel, scsidev->id, scsidev->lun,
cmd->cmnd);
#endif
}
int __ata_scsi_queuecmd(struct scsi_cmnd *scmd, struct ata_device *dev) int __ata_scsi_queuecmd(struct scsi_cmnd *scmd, struct ata_device *dev)
{ {
u8 scsi_op = scmd->cmnd[0]; u8 scsi_op = scmd->cmnd[0];
ata_xlat_func_t xlat_func; ata_xlat_func_t xlat_func;
int rc = 0;
if (unlikely(!scmd->cmd_len))
goto bad_cdb_len;
if (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ZAC) { if (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ZAC) {
if (unlikely(!scmd->cmd_len || scmd->cmd_len > dev->cdb_len)) if (unlikely(scmd->cmd_len > dev->cdb_len))
goto bad_cdb_len; goto bad_cdb_len;
xlat_func = ata_get_xlat_func(dev, scsi_op); xlat_func = ata_get_xlat_func(dev, scsi_op);
} else { } else if (likely((scsi_op != ATA_16) || !atapi_passthru16)) {
if (unlikely(!scmd->cmd_len)) /* relay SCSI command to ATAPI device */
int len = COMMAND_SIZE(scsi_op);
if (unlikely(len > scmd->cmd_len ||
len > dev->cdb_len ||
scmd->cmd_len > ATAPI_CDB_LEN))
goto bad_cdb_len; goto bad_cdb_len;
xlat_func = NULL; xlat_func = atapi_xlat;
if (likely((scsi_op != ATA_16) || !atapi_passthru16)) { } else {
/* relay SCSI command to ATAPI device */ /* ATA_16 passthru, treat as an ATA command */
int len = COMMAND_SIZE(scsi_op); if (unlikely(scmd->cmd_len > 16))
if (unlikely(len > scmd->cmd_len || goto bad_cdb_len;
len > dev->cdb_len ||
scmd->cmd_len > ATAPI_CDB_LEN))
goto bad_cdb_len;
xlat_func = atapi_xlat; xlat_func = ata_get_xlat_func(dev, scsi_op);
} else {
/* ATA_16 passthru, treat as an ATA command */
if (unlikely(scmd->cmd_len > 16))
goto bad_cdb_len;
xlat_func = ata_get_xlat_func(dev, scsi_op);
}
} }
if (xlat_func) if (xlat_func)
rc = ata_scsi_translate(dev, scmd, xlat_func); return ata_scsi_translate(dev, scmd, xlat_func);
else
ata_scsi_simulate(dev, scmd);
return rc; ata_scsi_simulate(dev, scmd);
return 0;
bad_cdb_len: bad_cdb_len:
DPRINTK("bad CDB len=%u, scsi_op=0x%02x, max=%u\n",
scmd->cmd_len, scsi_op, dev->cdb_len);
scmd->result = DID_ERROR << 16; scmd->result = DID_ERROR << 16;
scsi_done(scmd); scsi_done(scmd);
return 0; return 0;
@ -4097,8 +4029,6 @@ int ata_scsi_queuecmd(struct Scsi_Host *shost, struct scsi_cmnd *cmd)
spin_lock_irqsave(ap->lock, irq_flags); spin_lock_irqsave(ap->lock, irq_flags);
ata_scsi_dump_cdb(ap, cmd);
dev = ata_scsi_find_dev(ap, scsidev); dev = ata_scsi_find_dev(ap, scsidev);
if (likely(dev)) if (likely(dev))
rc = __ata_scsi_queuecmd(cmd, dev); rc = __ata_scsi_queuecmd(cmd, dev);
@ -4531,12 +4461,9 @@ void ata_scsi_hotplug(struct work_struct *work)
container_of(work, struct ata_port, hotplug_task.work); container_of(work, struct ata_port, hotplug_task.work);
int i; int i;
if (ap->pflags & ATA_PFLAG_UNLOADING) { if (ap->pflags & ATA_PFLAG_UNLOADING)
DPRINTK("ENTER/EXIT - unloading\n");
return; return;
}
DPRINTK("ENTER\n");
mutex_lock(&ap->scsi_scan_mutex); mutex_lock(&ap->scsi_scan_mutex);
/* Unplug detached devices. We cannot use link iterator here /* Unplug detached devices. We cannot use link iterator here
@ -4552,7 +4479,6 @@ void ata_scsi_hotplug(struct work_struct *work)
ata_scsi_scan_host(ap, 0); ata_scsi_scan_host(ap, 0);
mutex_unlock(&ap->scsi_scan_mutex); mutex_unlock(&ap->scsi_scan_mutex);
DPRINTK("EXIT\n");
} }
/** /**

88
drivers/ata/libata-sff.c
View file

@ -18,7 +18,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/libata.h> #include <linux/libata.h>
#include <linux/highmem.h> #include <linux/highmem.h>
#include <trace/events/libata.h>
#include "libata.h" #include "libata.h"
static struct workqueue_struct *ata_sff_wq; static struct workqueue_struct *ata_sff_wq;
@ -330,10 +330,6 @@ EXPORT_SYMBOL_GPL(ata_sff_dev_select);
static void ata_dev_select(struct ata_port *ap, unsigned int device, static void ata_dev_select(struct ata_port *ap, unsigned int device,
unsigned int wait, unsigned int can_sleep) unsigned int wait, unsigned int can_sleep)
{ {
if (ata_msg_probe(ap))
ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
device, wait);
if (wait) if (wait)
ata_wait_idle(ap); ata_wait_idle(ap);
@ -409,12 +405,6 @@ void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
iowrite8(tf->hob_lbal, ioaddr->lbal_addr); iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
iowrite8(tf->hob_lbam, ioaddr->lbam_addr); iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
iowrite8(tf->hob_lbah, ioaddr->lbah_addr); iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->hob_feature,
tf->hob_nsect,
tf->hob_lbal,
tf->hob_lbam,
tf->hob_lbah);
} }
if (is_addr) { if (is_addr) {
@ -423,18 +413,10 @@ void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
iowrite8(tf->lbal, ioaddr->lbal_addr); iowrite8(tf->lbal, ioaddr->lbal_addr);
iowrite8(tf->lbam, ioaddr->lbam_addr); iowrite8(tf->lbam, ioaddr->lbam_addr);
iowrite8(tf->lbah, ioaddr->lbah_addr); iowrite8(tf->lbah, ioaddr->lbah_addr);
VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
tf->feature,
tf->nsect,
tf->lbal,
tf->lbam,
tf->lbah);
} }
if (tf->flags & ATA_TFLAG_DEVICE) { if (tf->flags & ATA_TFLAG_DEVICE)
iowrite8(tf->device, ioaddr->device_addr); iowrite8(tf->device, ioaddr->device_addr);
VPRINTK("device 0x%X\n", tf->device);
}
ata_wait_idle(ap); ata_wait_idle(ap);
} }
@ -494,8 +476,6 @@ EXPORT_SYMBOL_GPL(ata_sff_tf_read);
*/ */
void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
{ {
DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
iowrite8(tf->command, ap->ioaddr.command_addr); iowrite8(tf->command, ap->ioaddr.command_addr);
ata_sff_pause(ap); ata_sff_pause(ap);
} }
@ -505,6 +485,7 @@ EXPORT_SYMBOL_GPL(ata_sff_exec_command);
* ata_tf_to_host - issue ATA taskfile to host controller * ata_tf_to_host - issue ATA taskfile to host controller
* @ap: port to which command is being issued * @ap: port to which command is being issued
* @tf: ATA taskfile register set * @tf: ATA taskfile register set
* @tag: tag of the associated command
* *
* Issues ATA taskfile register set to ATA host controller, * Issues ATA taskfile register set to ATA host controller,
* with proper synchronization with interrupt handler and * with proper synchronization with interrupt handler and
@ -514,9 +495,12 @@ EXPORT_SYMBOL_GPL(ata_sff_exec_command);
* spin_lock_irqsave(host lock) * spin_lock_irqsave(host lock)
*/ */
static inline void ata_tf_to_host(struct ata_port *ap, static inline void ata_tf_to_host(struct ata_port *ap,
const struct ata_taskfile *tf) const struct ata_taskfile *tf,
unsigned int tag)
{ {
trace_ata_tf_load(ap, tf);
ap->ops->sff_tf_load(ap, tf); ap->ops->sff_tf_load(ap, tf);
trace_ata_exec_command(ap, tf, tag);
ap->ops->sff_exec_command(ap, tf); ap->ops->sff_exec_command(ap, tf);
} }
@ -680,7 +664,7 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
page = nth_page(page, (offset >> PAGE_SHIFT)); page = nth_page(page, (offset >> PAGE_SHIFT));
offset %= PAGE_SIZE; offset %= PAGE_SIZE;
DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); trace_ata_sff_pio_transfer_data(qc, offset, qc->sect_size);
/* /*
* Split the transfer when it splits a page boundary. Note that the * Split the transfer when it splits a page boundary. Note that the
@ -750,7 +734,7 @@ static void ata_pio_sectors(struct ata_queued_cmd *qc)
static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
{ {
/* send SCSI cdb */ /* send SCSI cdb */
DPRINTK("send cdb\n"); trace_atapi_send_cdb(qc, 0, qc->dev->cdb_len);
WARN_ON_ONCE(qc->dev->cdb_len < 12); WARN_ON_ONCE(qc->dev->cdb_len < 12);
ap->ops->sff_data_xfer(qc, qc->cdb, qc->dev->cdb_len, 1); ap->ops->sff_data_xfer(qc, qc->cdb, qc->dev->cdb_len, 1);
@ -768,6 +752,7 @@ static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
case ATAPI_PROT_DMA: case ATAPI_PROT_DMA:
ap->hsm_task_state = HSM_ST_LAST; ap->hsm_task_state = HSM_ST_LAST;
/* initiate bmdma */ /* initiate bmdma */
trace_ata_bmdma_start(ap, &qc->tf, qc->tag);
ap->ops->bmdma_start(qc); ap->ops->bmdma_start(qc);
break; break;
#endif /* CONFIG_ATA_BMDMA */ #endif /* CONFIG_ATA_BMDMA */
@ -820,7 +805,7 @@ next_sg:
/* don't cross page boundaries */ /* don't cross page boundaries */
count = min(count, (unsigned int)PAGE_SIZE - offset); count = min(count, (unsigned int)PAGE_SIZE - offset);
DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); trace_atapi_pio_transfer_data(qc, offset, count);
/* do the actual data transfer */ /* do the actual data transfer */
buf = kmap_atomic(page); buf = kmap_atomic(page);
@ -888,8 +873,6 @@ static void atapi_pio_bytes(struct ata_queued_cmd *qc)
if (unlikely(!bytes)) if (unlikely(!bytes))
goto atapi_check; goto atapi_check;
VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
if (unlikely(__atapi_pio_bytes(qc, bytes))) if (unlikely(__atapi_pio_bytes(qc, bytes)))
goto err_out; goto err_out;
ata_sff_sync(ap); /* flush */ ata_sff_sync(ap); /* flush */
@ -1002,8 +985,7 @@ int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc)); WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
fsm_start: fsm_start:
DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", trace_ata_sff_hsm_state(qc, status);
ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
switch (ap->hsm_task_state) { switch (ap->hsm_task_state) {
case HSM_ST_FIRST: case HSM_ST_FIRST:
@ -1204,8 +1186,7 @@ fsm_start:
} }
/* no more data to transfer */ /* no more data to transfer */
DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", trace_ata_sff_hsm_command_complete(qc, status);
ap->print_id, qc->dev->devno, status);
WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM)); WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
@ -1262,7 +1243,7 @@ EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
void ata_sff_flush_pio_task(struct ata_port *ap) void ata_sff_flush_pio_task(struct ata_port *ap)
{ {
DPRINTK("ENTER\n"); trace_ata_sff_flush_pio_task(ap);
cancel_delayed_work_sync(&ap->sff_pio_task); cancel_delayed_work_sync(&ap->sff_pio_task);
@ -1279,9 +1260,6 @@ void ata_sff_flush_pio_task(struct ata_port *ap)
spin_unlock_irq(ap->lock); spin_unlock_irq(ap->lock);
ap->sff_pio_task_link = NULL; ap->sff_pio_task_link = NULL;
if (ata_msg_ctl(ap))
ata_port_dbg(ap, "%s: EXIT\n", __func__);
} }
static void ata_sff_pio_task(struct work_struct *work) static void ata_sff_pio_task(struct work_struct *work)
@ -1376,7 +1354,7 @@ unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
if (qc->tf.flags & ATA_TFLAG_POLLING) if (qc->tf.flags & ATA_TFLAG_POLLING)
ata_qc_set_polling(qc); ata_qc_set_polling(qc);
ata_tf_to_host(ap, &qc->tf); ata_tf_to_host(ap, &qc->tf, qc->tag);
ap->hsm_task_state = HSM_ST_LAST; ap->hsm_task_state = HSM_ST_LAST;
if (qc->tf.flags & ATA_TFLAG_POLLING) if (qc->tf.flags & ATA_TFLAG_POLLING)
@ -1388,7 +1366,7 @@ unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
if (qc->tf.flags & ATA_TFLAG_POLLING) if (qc->tf.flags & ATA_TFLAG_POLLING)
ata_qc_set_polling(qc); ata_qc_set_polling(qc);
ata_tf_to_host(ap, &qc->tf); ata_tf_to_host(ap, &qc->tf, qc->tag);
if (qc->tf.flags & ATA_TFLAG_WRITE) { if (qc->tf.flags & ATA_TFLAG_WRITE) {
/* PIO data out protocol */ /* PIO data out protocol */
@ -1418,7 +1396,7 @@ unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
if (qc->tf.flags & ATA_TFLAG_POLLING) if (qc->tf.flags & ATA_TFLAG_POLLING)
ata_qc_set_polling(qc); ata_qc_set_polling(qc);
ata_tf_to_host(ap, &qc->tf); ata_tf_to_host(ap, &qc->tf, qc->tag);
ap->hsm_task_state = HSM_ST_FIRST; ap->hsm_task_state = HSM_ST_FIRST;
@ -1478,8 +1456,7 @@ static unsigned int __ata_sff_port_intr(struct ata_port *ap,
{ {
u8 status; u8 status;
VPRINTK("ata%u: protocol %d task_state %d\n", trace_ata_sff_port_intr(qc, hsmv_on_idle);
ap->print_id, qc->tf.protocol, ap->hsm_task_state);
/* Check whether we are expecting interrupt in this state */ /* Check whether we are expecting interrupt in this state */
switch (ap->hsm_task_state) { switch (ap->hsm_task_state) {
@ -1853,7 +1830,7 @@ unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
return ATA_DEV_NONE; return ATA_DEV_NONE;
/* determine if device is ATA or ATAPI */ /* determine if device is ATA or ATAPI */
class = ata_dev_classify(&tf); class = ata_port_classify(ap, &tf);
if (class == ATA_DEV_UNKNOWN) { if (class == ATA_DEV_UNKNOWN) {
/* If the device failed diagnostic, it's likely to /* If the device failed diagnostic, it's likely to
@ -1956,8 +1933,6 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
{ {
struct ata_ioports *ioaddr = &ap->ioaddr; struct ata_ioports *ioaddr = &ap->ioaddr;
DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
if (ap->ioaddr.ctl_addr) { if (ap->ioaddr.ctl_addr) {
/* software reset. causes dev0 to be selected */ /* software reset. causes dev0 to be selected */
iowrite8(ap->ctl, ioaddr->ctl_addr); iowrite8(ap->ctl, ioaddr->ctl_addr);
@ -1995,8 +1970,6 @@ int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
int rc; int rc;
u8 err; u8 err;
DPRINTK("ENTER\n");
/* determine if device 0/1 are present */ /* determine if device 0/1 are present */
if (ata_devchk(ap, 0)) if (ata_devchk(ap, 0))
devmask |= (1 << 0); devmask |= (1 << 0);
@ -2007,7 +1980,6 @@ int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
ap->ops->sff_dev_select(ap, 0); ap->ops->sff_dev_select(ap, 0);
/* issue bus reset */ /* issue bus reset */
DPRINTK("about to softreset, devmask=%x\n", devmask);
rc = ata_bus_softreset(ap, devmask, deadline); rc = ata_bus_softreset(ap, devmask, deadline);
/* if link is occupied, -ENODEV too is an error */ /* if link is occupied, -ENODEV too is an error */
if (rc && (rc != -ENODEV || sata_scr_valid(link))) { if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
@ -2022,7 +1994,6 @@ int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
classes[1] = ata_sff_dev_classify(&link->device[1], classes[1] = ata_sff_dev_classify(&link->device[1],
devmask & (1 << 1), &err); devmask & (1 << 1), &err);
DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(ata_sff_softreset); EXPORT_SYMBOL_GPL(ata_sff_softreset);
@ -2055,7 +2026,6 @@ int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
if (online) if (online)
*class = ata_sff_dev_classify(link->device, 1, NULL); *class = ata_sff_dev_classify(link->device, 1, NULL);
DPRINTK("EXIT, class=%u\n", *class);
return rc; return rc;
} }
EXPORT_SYMBOL_GPL(sata_sff_hardreset); EXPORT_SYMBOL_GPL(sata_sff_hardreset);
@ -2085,10 +2055,8 @@ void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
ap->ops->sff_dev_select(ap, 0); ap->ops->sff_dev_select(ap, 0);
/* bail out if no device is present */ /* bail out if no device is present */
if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE)
DPRINTK("EXIT, no device\n");
return; return;
}
/* set up device control */ /* set up device control */
if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) { if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
@ -2123,7 +2091,6 @@ void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
&& count < 65536; count += 2) && count < 65536; count += 2)
ioread16(ap->ioaddr.data_addr); ioread16(ap->ioaddr.data_addr);
/* Can become DEBUG later */
if (count) if (count)
ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count); ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
@ -2467,8 +2434,6 @@ static int ata_pci_init_one(struct pci_dev *pdev,
struct ata_host *host = NULL; struct ata_host *host = NULL;
int rc; int rc;
DPRINTK("ENTER\n");
pi = ata_sff_find_valid_pi(ppi); pi = ata_sff_find_valid_pi(ppi);
if (!pi) { if (!pi) {
dev_err(&pdev->dev, "no valid port_info specified\n"); dev_err(&pdev->dev, "no valid port_info specified\n");
@ -2614,7 +2579,6 @@ static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
prd[pi].addr = cpu_to_le32(addr); prd[pi].addr = cpu_to_le32(addr);
prd[pi].flags_len = cpu_to_le32(len & 0xffff); prd[pi].flags_len = cpu_to_le32(len & 0xffff);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
pi++; pi++;
sg_len -= len; sg_len -= len;
@ -2674,7 +2638,6 @@ static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
prd[++pi].addr = cpu_to_le32(addr + 0x8000); prd[++pi].addr = cpu_to_le32(addr + 0x8000);
} }
prd[pi].flags_len = cpu_to_le32(blen); prd[pi].flags_len = cpu_to_le32(blen);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
pi++; pi++;
sg_len -= len; sg_len -= len;
@ -2756,8 +2719,11 @@ unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
case ATA_PROT_DMA: case ATA_PROT_DMA:
WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING); WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
trace_ata_tf_load(ap, &qc->tf);
ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
trace_ata_bmdma_setup(ap, &qc->tf, qc->tag);
ap->ops->bmdma_setup(qc); /* set up bmdma */ ap->ops->bmdma_setup(qc); /* set up bmdma */
trace_ata_bmdma_start(ap, &qc->tf, qc->tag);
ap->ops->bmdma_start(qc); /* initiate bmdma */ ap->ops->bmdma_start(qc); /* initiate bmdma */
ap->hsm_task_state = HSM_ST_LAST; ap->hsm_task_state = HSM_ST_LAST;
break; break;
@ -2765,7 +2731,9 @@ unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
case ATAPI_PROT_DMA: case ATAPI_PROT_DMA:
WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING); WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
trace_ata_tf_load(ap, &qc->tf);
ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
trace_ata_bmdma_setup(ap, &qc->tf, qc->tag);
ap->ops->bmdma_setup(qc); /* set up bmdma */ ap->ops->bmdma_setup(qc); /* set up bmdma */
ap->hsm_task_state = HSM_ST_FIRST; ap->hsm_task_state = HSM_ST_FIRST;
@ -2806,13 +2774,14 @@ unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) { if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
/* check status of DMA engine */ /* check status of DMA engine */
host_stat = ap->ops->bmdma_status(ap); host_stat = ap->ops->bmdma_status(ap);
VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat); trace_ata_bmdma_status(ap, host_stat);
/* if it's not our irq... */ /* if it's not our irq... */
if (!(host_stat & ATA_DMA_INTR)) if (!(host_stat & ATA_DMA_INTR))
return ata_sff_idle_irq(ap); return ata_sff_idle_irq(ap);
/* before we do anything else, clear DMA-Start bit */ /* before we do anything else, clear DMA-Start bit */
trace_ata_bmdma_stop(ap, &qc->tf, qc->tag);
ap->ops->bmdma_stop(qc); ap->ops->bmdma_stop(qc);
bmdma_stopped = true; bmdma_stopped = true;
@ -2881,6 +2850,7 @@ void ata_bmdma_error_handler(struct ata_port *ap)
u8 host_stat; u8 host_stat;
host_stat = ap->ops->bmdma_status(ap); host_stat = ap->ops->bmdma_status(ap);
trace_ata_bmdma_status(ap, host_stat);
/* BMDMA controllers indicate host bus error by /* BMDMA controllers indicate host bus error by
* setting DMA_ERR bit and timing out. As it wasn't * setting DMA_ERR bit and timing out. As it wasn't
@ -2892,6 +2862,7 @@ void ata_bmdma_error_handler(struct ata_port *ap)
thaw = true; thaw = true;
} }
trace_ata_bmdma_stop(ap, &qc->tf, qc->tag);
ap->ops->bmdma_stop(qc); ap->ops->bmdma_stop(qc);
/* if we're gonna thaw, make sure IRQ is clear */ /* if we're gonna thaw, make sure IRQ is clear */
@ -2925,6 +2896,7 @@ void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
if (ata_is_dma(qc->tf.protocol)) { if (ata_is_dma(qc->tf.protocol)) {
spin_lock_irqsave(ap->lock, flags); spin_lock_irqsave(ap->lock, flags);
trace_ata_bmdma_stop(ap, &qc->tf, qc->tag);
ap->ops->bmdma_stop(qc); ap->ops->bmdma_stop(qc);
spin_unlock_irqrestore(ap->lock, flags); spin_unlock_irqrestore(ap->lock, flags);
} }

47
drivers/ata/libata-trace.c
View file

@ -38,6 +38,24 @@ libata_trace_parse_status(struct trace_seq *p, unsigned char status)
return ret; return ret;
} }
const char *
libata_trace_parse_host_stat(struct trace_seq *p, unsigned char host_stat)
{
const char *ret = trace_seq_buffer_ptr(p);
trace_seq_printf(p, "{ ");
if (host_stat & ATA_DMA_INTR)
trace_seq_printf(p, "INTR ");
if (host_stat & ATA_DMA_ERR)
trace_seq_printf(p, "ERR ");
if (host_stat & ATA_DMA_ACTIVE)
trace_seq_printf(p, "ACTIVE ");
trace_seq_putc(p, '}');
trace_seq_putc(p, 0);
return ret;
}
const char * const char *
libata_trace_parse_eh_action(struct trace_seq *p, unsigned int eh_action) libata_trace_parse_eh_action(struct trace_seq *p, unsigned int eh_action)
{ {
@ -137,6 +155,35 @@ libata_trace_parse_qc_flags(struct trace_seq *p, unsigned int qc_flags)
return ret; return ret;
} }
const char *
libata_trace_parse_tf_flags(struct trace_seq *p, unsigned int tf_flags)
{
const char *ret = trace_seq_buffer_ptr(p);
trace_seq_printf(p, "%x", tf_flags);
if (tf_flags) {
trace_seq_printf(p, "{ ");
if (tf_flags & ATA_TFLAG_LBA48)
trace_seq_printf(p, "LBA48 ");
if (tf_flags & ATA_TFLAG_ISADDR)
trace_seq_printf(p, "ISADDR ");
if (tf_flags & ATA_TFLAG_DEVICE)
trace_seq_printf(p, "DEV ");
if (tf_flags & ATA_TFLAG_WRITE)
trace_seq_printf(p, "WRITE ");
if (tf_flags & ATA_TFLAG_LBA)
trace_seq_printf(p, "LBA ");
if (tf_flags & ATA_TFLAG_FUA)
trace_seq_printf(p, "FUA ");
if (tf_flags & ATA_TFLAG_POLLING)
trace_seq_printf(p, "POLL ");
trace_seq_putc(p, '}');
}
trace_seq_putc(p, 0);
return ret;
}
const char * const char *
libata_trace_parse_subcmd(struct trace_seq *p, unsigned char cmd, libata_trace_parse_subcmd(struct trace_seq *p, unsigned char cmd,
unsigned char feature, unsigned char hob_nsect) unsigned char feature, unsigned char hob_nsect)

48
drivers/ata/libata-transport.c
View file

@ -163,7 +163,7 @@ static struct {
{ AC_ERR_INVALID, "InvalidArg" }, { AC_ERR_INVALID, "InvalidArg" },
{ AC_ERR_OTHER, "Unknown" }, { AC_ERR_OTHER, "Unknown" },
{ AC_ERR_NODEV_HINT, "NoDeviceHint" }, { AC_ERR_NODEV_HINT, "NoDeviceHint" },
{ AC_ERR_NCQ, "NCQError" } { AC_ERR_NCQ, "NCQError" }
}; };
ata_bitfield_name_match(err, ata_err_names) ata_bitfield_name_match(err, ata_err_names)
@ -321,13 +321,43 @@ int ata_tport_add(struct device *parent,
return error; return error;
} }
/**
* ata_port_classify - determine device type based on ATA-spec signature
* @ap: ATA port device on which the classification should be run
* @tf: ATA taskfile register set for device to be identified
*
* A wrapper around ata_dev_classify() to provide additional logging
*
* RETURNS:
* Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP,
* %ATA_DEV_ZAC, or %ATA_DEV_UNKNOWN the event of failure.
*/
unsigned int ata_port_classify(struct ata_port *ap,
const struct ata_taskfile *tf)
{
int i;
unsigned int class = ata_dev_classify(tf);
/* Start with index '1' to skip the 'unknown' entry */
for (i = 1; i < ARRAY_SIZE(ata_class_names); i++) {
if (ata_class_names[i].value == class) {
ata_port_dbg(ap, "found %s device by sig\n",
ata_class_names[i].name);
return class;
}
}
ata_port_info(ap, "found unknown device (class %u)\n", class);
return class;
}
EXPORT_SYMBOL_GPL(ata_port_classify);
/* /*
* ATA link attributes * ATA link attributes
*/ */
static int noop(int x) { return x; } static int noop(int x) { return x; }
#define ata_link_show_linkspeed(field, format) \ #define ata_link_show_linkspeed(field, format) \
static ssize_t \ static ssize_t \
show_ata_link_##field(struct device *dev, \ show_ata_link_##field(struct device *dev, \
struct device_attribute *attr, char *buf) \ struct device_attribute *attr, char *buf) \
@ -416,7 +446,7 @@ int ata_tlink_add(struct ata_link *link)
dev->release = ata_tlink_release; dev->release = ata_tlink_release;
if (ata_is_host_link(link)) if (ata_is_host_link(link))
dev_set_name(dev, "link%d", ap->print_id); dev_set_name(dev, "link%d", ap->print_id);
else else
dev_set_name(dev, "link%d.%d", ap->print_id, link->pmp); dev_set_name(dev, "link%d.%d", ap->print_id, link->pmp);
transport_setup_device(dev); transport_setup_device(dev);
@ -472,7 +502,7 @@ ata_dev_attr(xfer, dma_mode);
ata_dev_attr(xfer, xfer_mode); ata_dev_attr(xfer, xfer_mode);
#define ata_dev_show_simple(field, format_string, cast) \ #define ata_dev_show_simple(field, format_string, cast) \
static ssize_t \ static ssize_t \
show_ata_dev_##field(struct device *dev, \ show_ata_dev_##field(struct device *dev, \
struct device_attribute *attr, char *buf) \ struct device_attribute *attr, char *buf) \
@ -482,9 +512,9 @@ show_ata_dev_##field(struct device *dev, \
return scnprintf(buf, 20, format_string, cast ata_dev->field); \ return scnprintf(buf, 20, format_string, cast ata_dev->field); \
} }
#define ata_dev_simple_attr(field, format_string, type) \ #define ata_dev_simple_attr(field, format_string, type) \
ata_dev_show_simple(field, format_string, (type)) \ ata_dev_show_simple(field, format_string, (type)) \
static DEVICE_ATTR(field, S_IRUGO, \ static DEVICE_ATTR(field, S_IRUGO, \
show_ata_dev_##field, NULL) show_ata_dev_##field, NULL)
ata_dev_simple_attr(spdn_cnt, "%d\n", int); ata_dev_simple_attr(spdn_cnt, "%d\n", int);
@ -502,7 +532,7 @@ static int ata_show_ering(struct ata_ering_entry *ent, void *void_arg)
seconds = div_u64_rem(ent->timestamp, HZ, &rem); seconds = div_u64_rem(ent->timestamp, HZ, &rem);
arg->written += sprintf(arg->buf + arg->written, arg->written += sprintf(arg->buf + arg->written,
"[%5llu.%09lu]", seconds, "[%5llu.%09lu]", seconds,
rem * NSEC_PER_SEC / HZ); rem * NSEC_PER_SEC / HZ);
arg->written += get_ata_err_names(ent->err_mask, arg->written += get_ata_err_names(ent->err_mask,
arg->buf + arg->written); arg->buf + arg->written);
@ -667,7 +697,7 @@ static int ata_tdev_add(struct ata_device *ata_dev)
dev->release = ata_tdev_release; dev->release = ata_tdev_release;
if (ata_is_host_link(link)) if (ata_is_host_link(link))
dev_set_name(dev, "dev%d.%d", ap->print_id,ata_dev->devno); dev_set_name(dev, "dev%d.%d", ap->print_id,ata_dev->devno);
else else
dev_set_name(dev, "dev%d.%d.0", ap->print_id, link->pmp); dev_set_name(dev, "dev%d.%d.0", ap->print_id, link->pmp);
transport_setup_device(dev); transport_setup_device(dev);
@ -689,7 +719,7 @@ static int ata_tdev_add(struct ata_device *ata_dev)
*/ */
#define SETUP_TEMPLATE(attrb, field, perm, test) \ #define SETUP_TEMPLATE(attrb, field, perm, test) \
i->private_##attrb[count] = dev_attr_##field; \ i->private_##attrb[count] = dev_attr_##field; \
i->private_##attrb[count].attr.mode = perm; \ i->private_##attrb[count].attr.mode = perm; \
i->attrb[count] = &i->private_##attrb[count]; \ i->attrb[count] = &i->private_##attrb[count]; \
if (test) \ if (test) \

5
drivers/ata/libata.h
View file

@ -148,7 +148,6 @@ extern int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel,
unsigned int id, u64 lun); unsigned int id, u64 lun);
void ata_scsi_sdev_config(struct scsi_device *sdev); void ata_scsi_sdev_config(struct scsi_device *sdev);
int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev); int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev);
void ata_scsi_dump_cdb(struct ata_port *ap, struct scsi_cmnd *cmd);
int __ata_scsi_queuecmd(struct scsi_cmnd *scmd, struct ata_device *dev); int __ata_scsi_queuecmd(struct scsi_cmnd *scmd, struct ata_device *dev);
/* libata-eh.c */ /* libata-eh.c */
@ -166,7 +165,7 @@ extern void ata_eh_about_to_do(struct ata_link *link, struct ata_device *dev,
extern void ata_eh_done(struct ata_link *link, struct ata_device *dev, extern void ata_eh_done(struct ata_link *link, struct ata_device *dev,
unsigned int action); unsigned int action);
extern void ata_eh_autopsy(struct ata_port *ap); extern void ata_eh_autopsy(struct ata_port *ap);
const char *ata_get_cmd_descript(u8 command); const char *ata_get_cmd_name(u8 command);
extern void ata_eh_report(struct ata_port *ap); extern void ata_eh_report(struct ata_port *ap);
extern int ata_eh_reset(struct ata_link *link, int classify, extern int ata_eh_reset(struct ata_link *link, int classify,
ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_prereset_fn_t prereset, ata_reset_fn_t softreset,
@ -179,7 +178,7 @@ extern int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
extern void ata_eh_finish(struct ata_port *ap); extern void ata_eh_finish(struct ata_port *ap);
extern int ata_ering_map(struct ata_ering *ering, extern int ata_ering_map(struct ata_ering *ering,
int (*map_fn)(struct ata_ering_entry *, void *), int (*map_fn)(struct ata_ering_entry *, void *),
void *arg); void *arg);
extern unsigned int atapi_eh_tur(struct ata_device *dev, u8 *r_sense_key); extern unsigned int atapi_eh_tur(struct ata_device *dev, u8 *r_sense_key);
extern unsigned int atapi_eh_request_sense(struct ata_device *dev, extern unsigned int atapi_eh_request_sense(struct ata_device *dev,
u8 *sense_buf, u8 dfl_sense_key); u8 *sense_buf, u8 dfl_sense_key);

4
drivers/ata/pata_ali.c
View file

@ -37,7 +37,7 @@
#define DRV_NAME "pata_ali" #define DRV_NAME "pata_ali"
#define DRV_VERSION "0.7.8" #define DRV_VERSION "0.7.8"
static int ali_atapi_dma = 0; static int ali_atapi_dma;
module_param_named(atapi_dma, ali_atapi_dma, int, 0644); module_param_named(atapi_dma, ali_atapi_dma, int, 0644);
MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)");
@ -123,7 +123,7 @@ static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
if (strstr(model_num, "WDC")) if (strstr(model_num, "WDC"))
return mask &= ~ATA_MASK_UDMA; mask &= ~ATA_MASK_UDMA;
return mask; return mask;
} }

3
drivers/ata/pata_arasan_cf.c
View file

@ -39,6 +39,7 @@
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/workqueue.h> #include <linux/workqueue.h>
#include <trace/events/libata.h>
#define DRIVER_NAME "arasan_cf" #define DRIVER_NAME "arasan_cf"
#define TIMEOUT msecs_to_jiffies(3000) #define TIMEOUT msecs_to_jiffies(3000)
@ -703,9 +704,11 @@ static unsigned int arasan_cf_qc_issue(struct ata_queued_cmd *qc)
case ATA_PROT_DMA: case ATA_PROT_DMA:
WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING); WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
trace_ata_tf_load(ap, &qc->tf);
ap->ops->sff_tf_load(ap, &qc->tf); ap->ops->sff_tf_load(ap, &qc->tf);
acdev->dma_status = 0; acdev->dma_status = 0;
acdev->qc = qc; acdev->qc = qc;
trace_ata_bmdma_start(ap, &qc->tf, qc->tag);
arasan_cf_dma_start(acdev); arasan_cf_dma_start(acdev);
ap->hsm_task_state = HSM_ST_LAST; ap->hsm_task_state = HSM_ST_LAST;
break; break;

105
drivers/ata/pata_atp867x.c
View file

@ -155,7 +155,7 @@ static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
case 1 ... 6: case 1 ... 6:
break; break;
default: default:
printk(KERN_WARNING "ATP867X: active %dclk is invalid. " ata_port_warn(ap, "ATP867X: active %dclk is invalid. "
"Using 12clk.\n", clk); "Using 12clk.\n", clk);
fallthrough; fallthrough;
case 9 ... 12: case 9 ... 12:
@ -171,7 +171,8 @@ active_clock_shift_done:
return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT; return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
} }
static int atp867x_get_recover_clocks_shifted(unsigned int clk) static int atp867x_get_recover_clocks_shifted(struct ata_port *ap,
unsigned int clk)
{ {
unsigned char clocks = clk; unsigned char clocks = clk;
@ -188,7 +189,7 @@ static int atp867x_get_recover_clocks_shifted(unsigned int clk)
case 15: case 15:
break; break;
default: default:
printk(KERN_WARNING "ATP867X: recover %dclk is invalid. " ata_port_warn(ap, "ATP867X: recover %dclk is invalid. "
"Using default 12clk.\n", clk); "Using default 12clk.\n", clk);
fallthrough; fallthrough;
case 12: /* default 12 clk */ case 12: /* default 12 clk */
@ -225,7 +226,7 @@ static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
iowrite8(b, dp->dma_mode); iowrite8(b, dp->dma_mode);
b = atp867x_get_active_clocks_shifted(ap, t.active) | b = atp867x_get_active_clocks_shifted(ap, t.active) |
atp867x_get_recover_clocks_shifted(t.recover); atp867x_get_recover_clocks_shifted(ap, t.recover);
if (adev->devno & 1) if (adev->devno & 1)
iowrite8(b, dp->slave_piospd); iowrite8(b, dp->slave_piospd);
@ -233,7 +234,7 @@ static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
iowrite8(b, dp->mstr_piospd); iowrite8(b, dp->mstr_piospd);
b = atp867x_get_active_clocks_shifted(ap, t.act8b) | b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
atp867x_get_recover_clocks_shifted(t.rec8b); atp867x_get_recover_clocks_shifted(ap, t.rec8b);
iowrite8(b, dp->eightb_piospd); iowrite8(b, dp->eightb_piospd);
} }
@ -270,7 +271,6 @@ static struct ata_port_operations atp867x_ops = {
}; };
#ifdef ATP867X_DEBUG
static void atp867x_check_res(struct pci_dev *pdev) static void atp867x_check_res(struct pci_dev *pdev)
{ {
int i; int i;
@ -280,7 +280,7 @@ static void atp867x_check_res(struct pci_dev *pdev)
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
start = pci_resource_start(pdev, i); start = pci_resource_start(pdev, i);
len = pci_resource_len(pdev, i); len = pci_resource_len(pdev, i);
printk(KERN_DEBUG "ATP867X: resource start:len=%lx:%lx\n", dev_dbg(&pdev->dev, "ATP867X: resource start:len=%lx:%lx\n",
start, len); start, len);
} }
} }
@ -290,49 +290,48 @@ static void atp867x_check_ports(struct ata_port *ap, int port)
struct ata_ioports *ioaddr = &ap->ioaddr; struct ata_ioports *ioaddr = &ap->ioaddr;
struct atp867x_priv *dp = ap->private_data; struct atp867x_priv *dp = ap->private_data;
printk(KERN_DEBUG "ATP867X: port[%d] addresses\n" ata_port_dbg(ap, "ATP867X: port[%d] addresses\n"
" cmd_addr =0x%llx, 0x%llx\n" " cmd_addr =0x%lx, 0x%lx\n"
" ctl_addr =0x%llx, 0x%llx\n" " ctl_addr =0x%lx, 0x%lx\n"
" bmdma_addr =0x%llx, 0x%llx\n" " bmdma_addr =0x%lx, 0x%lx\n"
" data_addr =0x%llx\n" " data_addr =0x%lx\n"
" error_addr =0x%llx\n" " error_addr =0x%lx\n"
" feature_addr =0x%llx\n" " feature_addr =0x%lx\n"
" nsect_addr =0x%llx\n" " nsect_addr =0x%lx\n"
" lbal_addr =0x%llx\n" " lbal_addr =0x%lx\n"
" lbam_addr =0x%llx\n" " lbam_addr =0x%lx\n"
" lbah_addr =0x%llx\n" " lbah_addr =0x%lx\n"
" device_addr =0x%llx\n" " device_addr =0x%lx\n"
" status_addr =0x%llx\n" " status_addr =0x%lx\n"
" command_addr =0x%llx\n" " command_addr =0x%lx\n"
" dp->dma_mode =0x%llx\n" " dp->dma_mode =0x%lx\n"
" dp->mstr_piospd =0x%llx\n" " dp->mstr_piospd =0x%lx\n"
" dp->slave_piospd =0x%llx\n" " dp->slave_piospd =0x%lx\n"
" dp->eightb_piospd =0x%llx\n" " dp->eightb_piospd =0x%lx\n"
" dp->pci66mhz =0x%lx\n", " dp->pci66mhz =0x%lx\n",
port, port,
(unsigned long long)ioaddr->cmd_addr, (unsigned long)ioaddr->cmd_addr,
(unsigned long long)ATP867X_IO_PORTBASE(ap, port), (unsigned long)ATP867X_IO_PORTBASE(ap, port),
(unsigned long long)ioaddr->ctl_addr, (unsigned long)ioaddr->ctl_addr,
(unsigned long long)ATP867X_IO_ALTSTATUS(ap, port), (unsigned long)ATP867X_IO_ALTSTATUS(ap, port),
(unsigned long long)ioaddr->bmdma_addr, (unsigned long)ioaddr->bmdma_addr,
(unsigned long long)ATP867X_IO_DMABASE(ap, port), (unsigned long)ATP867X_IO_DMABASE(ap, port),
(unsigned long long)ioaddr->data_addr, (unsigned long)ioaddr->data_addr,
(unsigned long long)ioaddr->error_addr, (unsigned long)ioaddr->error_addr,
(unsigned long long)ioaddr->feature_addr, (unsigned long)ioaddr->feature_addr,
(unsigned long long)ioaddr->nsect_addr, (unsigned long)ioaddr->nsect_addr,
(unsigned long long)ioaddr->lbal_addr, (unsigned long)ioaddr->lbal_addr,
(unsigned long long)ioaddr->lbam_addr, (unsigned long)ioaddr->lbam_addr,
(unsigned long long)ioaddr->lbah_addr, (unsigned long)ioaddr->lbah_addr,
(unsigned long long)ioaddr->device_addr, (unsigned long)ioaddr->device_addr,
(unsigned long long)ioaddr->status_addr, (unsigned long)ioaddr->status_addr,
(unsigned long long)ioaddr->command_addr, (unsigned long)ioaddr->command_addr,
(unsigned long long)dp->dma_mode, (unsigned long)dp->dma_mode,
(unsigned long long)dp->mstr_piospd, (unsigned long)dp->mstr_piospd,
(unsigned long long)dp->slave_piospd, (unsigned long)dp->slave_piospd,
(unsigned long long)dp->eightb_piospd, (unsigned long)dp->eightb_piospd,
(unsigned long)dp->pci66mhz); (unsigned long)dp->pci66mhz);
} }
#endif
static int atp867x_set_priv(struct ata_port *ap) static int atp867x_set_priv(struct ata_port *ap)
{ {
@ -370,8 +369,7 @@ static void atp867x_fixup(struct ata_host *host)
if (v < 0x80) { if (v < 0x80) {
v = 0x80; v = 0x80;
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v); pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
printk(KERN_DEBUG "ATP867X: set latency timer of device %s" dev_dbg(&pdev->dev, "ATP867X: set latency timer to %d\n", v);
" to %d\n", pci_name(pdev), v);
} }
/* /*
@ -419,13 +417,11 @@ static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
return rc; return rc;
host->iomap = pcim_iomap_table(pdev); host->iomap = pcim_iomap_table(pdev);
#ifdef ATP867X_DEBUG
atp867x_check_res(pdev); atp867x_check_res(pdev);
for (i = 0; i < PCI_STD_NUM_BARS; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i, dev_dbg(gdev, "ATP867X: iomap[%d]=0x%p\n", i,
(unsigned long long)(host->iomap[i])); host->iomap[i]);
#endif
/* /*
* request, iomap BARs and init port addresses accordingly * request, iomap BARs and init port addresses accordingly
@ -444,9 +440,8 @@ static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
if (rc) if (rc)
return rc; return rc;
#ifdef ATP867X_DEBUG
atp867x_check_ports(ap, i); atp867x_check_ports(ap, i);
#endif
ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
(unsigned long)ioaddr->cmd_addr, (unsigned long)ioaddr->cmd_addr,
(unsigned long)ioaddr->ctl_addr); (unsigned long)ioaddr->ctl_addr);
@ -486,7 +481,7 @@ static int atp867x_init_one(struct pci_dev *pdev,
if (rc) if (rc)
return rc; return rc;
printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)", dev_info(&pdev->dev, "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
pdev->device); pdev->device);
host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS); host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);

2
drivers/ata/pata_cmd640.c
View file

@ -61,7 +61,7 @@ static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
struct ata_device *pair = ata_dev_pair(adev); struct ata_device *pair = ata_dev_pair(adev);
if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) { if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
printk(KERN_ERR DRV_NAME ": mode computation failed.\n"); ata_dev_err(adev, DRV_NAME ": mode computation failed.\n");
return; return;
} }

4
drivers/ata/pata_cmd64x.c
View file

@ -116,7 +116,7 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
/* ata_timing_compute is smart and will produce timings for MWDMA /* ata_timing_compute is smart and will produce timings for MWDMA
that don't violate the drives PIO capabilities. */ that don't violate the drives PIO capabilities. */
if (ata_timing_compute(adev, mode, &t, T, 0) < 0) { if (ata_timing_compute(adev, mode, &t, T, 0) < 0) {
printk(KERN_ERR DRV_NAME ": mode computation failed.\n"); ata_dev_err(adev, DRV_NAME ": mode computation failed.\n");
return; return;
} }
if (ap->port_no) { if (ap->port_no) {
@ -130,7 +130,7 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
} }
} }
printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n", ata_dev_dbg(adev, DRV_NAME ": active %d recovery %d setup %d.\n",
t.active, t.recover, t.setup); t.active, t.recover, t.setup);
if (t.recover > 16) { if (t.recover > 16) {
t.active += t.recover - 16; t.active += t.recover - 16;

4
drivers/ata/pata_cs5520.c
View file

@ -153,12 +153,12 @@ static int cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
/* Perform set up for DMA */ /* Perform set up for DMA */
if (pci_enable_device_io(pdev)) { if (pci_enable_device_io(pdev)) {
printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n"); dev_err(&pdev->dev, "unable to configure BAR2.\n");
return -ENODEV; return -ENODEV;
} }
if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) { if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) {
printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n"); dev_err(&pdev->dev, "unable to configure DMA mask.\n");
return -ENODEV; return -ENODEV;
} }

4
drivers/ata/pata_cs5536.c
View file

@ -263,12 +263,12 @@ static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
ppi[1] = &ata_dummy_port_info; ppi[1] = &ata_dummy_port_info;
if (use_msr) if (use_msr)
printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n"); dev_err(&dev->dev, DRV_NAME ": Using MSR regs instead of PCI\n");
cs5536_read(dev, CFG, &cfg); cs5536_read(dev, CFG, &cfg);
if ((cfg & IDE_CFG_CHANEN) == 0) { if ((cfg & IDE_CFG_CHANEN) == 0) {
printk(KERN_ERR DRV_NAME ": disabled by BIOS\n"); dev_err(&dev->dev, DRV_NAME ": disabled by BIOS\n");
return -ENODEV; return -ENODEV;
} }

2
drivers/ata/pata_cypress.c
View file

@ -62,7 +62,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
u32 addr; u32 addr;
if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); ata_dev_err(adev, DRV_NAME ": mome computation failed.\n");
return; return;
} }

1
drivers/ata/pata_ep93xx.c
View file

@ -855,7 +855,6 @@ static void ep93xx_pata_drain_fifo(struct ata_queued_cmd *qc)
&& count < 65536; count += 2) && count < 65536; count += 2)
ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DATA); ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DATA);
/* Can become DEBUG later */
if (count) if (count)
ata_port_dbg(ap, "drained %d bytes to clear DRQ.\n", count); ata_port_dbg(ap, "drained %d bytes to clear DRQ.\n", count);

5
drivers/ata/pata_hpt366.c
View file

@ -14,9 +14,6 @@
* TODO * TODO
* Look into engine reset on timeout errors. Should not be required. * Look into engine reset on timeout errors. Should not be required.
*/ */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h> #include <linux/pci.h>
@ -183,7 +180,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr,
i = match_string(list, -1, model_num); i = match_string(list, -1, model_num);
if (i >= 0) { if (i >= 0) {
pr_warn("%s is not supported for %s\n", modestr, list[i]); ata_dev_warn(dev, "%s is not supported for %s\n", modestr, list[i]);
return 1; return 1;
} }
return 0; return 0;

20
drivers/ata/pata_hpt37x.c
View file

@ -14,9 +14,6 @@
* TODO * TODO
* Look into engine reset on timeout errors. Should not be required. * Look into engine reset on timeout errors. Should not be required.
*/ */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h> #include <linux/pci.h>
@ -231,7 +228,8 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr,
i = match_string(list, -1, model_num); i = match_string(list, -1, model_num);
if (i >= 0) { if (i >= 0) {
pr_warn("%s is not supported for %s\n", modestr, list[i]); ata_dev_warn(dev, "%s is not supported for %s\n",
modestr, list[i]);
return 1; return 1;
} }
return 0; return 0;
@ -864,7 +862,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
chip_table = &hpt372; chip_table = &hpt372;
break; break;
default: default:
pr_err("Unknown HPT366 subtype, please report (%d)\n", dev_err(&dev->dev,
"Unknown HPT366 subtype, please report (%d)\n",
rev); rev);
return -ENODEV; return -ENODEV;
} }
@ -905,7 +904,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
*ppi = &info_hpt374_fn1; *ppi = &info_hpt374_fn1;
break; break;
default: default:
pr_err("PCI table is bogus, please report (%d)\n", dev->device); dev_err(&dev->dev, "PCI table is bogus, please report (%d)\n",
dev->device);
return -ENODEV; return -ENODEV;
} }
/* Ok so this is a chip we support */ /* Ok so this is a chip we support */
@ -953,7 +953,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
u8 sr; u8 sr;
u32 total = 0; u32 total = 0;
pr_warn("BIOS has not set timing clocks\n"); dev_warn(&dev->dev, "BIOS has not set timing clocks\n");
/* This is the process the HPT371 BIOS is reported to use */ /* This is the process the HPT371 BIOS is reported to use */
for (i = 0; i < 128; i++) { for (i = 0; i < 128; i++) {
@ -1009,7 +1009,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
(f_high << 16) | f_low | 0x100); (f_high << 16) | f_low | 0x100);
} }
if (adjust == 8) { if (adjust == 8) {
pr_err("DPLL did not stabilize!\n"); dev_err(&dev->dev, "DPLL did not stabilize!\n");
return -ENODEV; return -ENODEV;
} }
if (dpll == 3) if (dpll == 3)
@ -1017,7 +1017,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
else else
private_data = (void *)hpt37x_timings_50; private_data = (void *)hpt37x_timings_50;
pr_info("bus clock %dMHz, using %dMHz DPLL\n", dev_info(&dev->dev, "bus clock %dMHz, using %dMHz DPLL\n",
MHz[clock_slot], MHz[dpll]); MHz[clock_slot], MHz[dpll]);
} else { } else {
private_data = (void *)chip_table->clocks[clock_slot]; private_data = (void *)chip_table->clocks[clock_slot];
@ -1032,7 +1032,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
if (clock_slot < 2 && ppi[0] == &info_hpt370a) if (clock_slot < 2 && ppi[0] == &info_hpt370a)
ppi[0] = &info_hpt370a_33; ppi[0] = &info_hpt370a_33;
pr_info("%s using %dMHz bus clock\n", dev_info(&dev->dev, "%s using %dMHz bus clock\n",
chip_table->name, MHz[clock_slot]); chip_table->name, MHz[clock_slot]);
} }

12
drivers/ata/pata_hpt3x2n.c
View file

@ -15,9 +15,6 @@
* TODO * TODO
* Work out best PLL policy * Work out best PLL policy
*/ */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h> #include <linux/pci.h>
@ -420,7 +417,7 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev)
u16 sr; u16 sr;
u32 total = 0; u32 total = 0;
pr_warn("BIOS clock data not set\n"); dev_warn(&pdev->dev, "BIOS clock data not set\n");
/* This is the process the HPT371 BIOS is reported to use */ /* This is the process the HPT371 BIOS is reported to use */
for (i = 0; i < 128; i++) { for (i = 0; i < 128; i++) {
@ -530,7 +527,8 @@ hpt372n:
ppi[0] = &info_hpt372n; ppi[0] = &info_hpt372n;
break; break;
default: default:
pr_err("PCI table is bogus, please report (%d)\n", dev->device); dev_err(&dev->dev,"PCI table is bogus, please report (%d)\n",
dev->device);
return -ENODEV; return -ENODEV;
} }
@ -579,11 +577,11 @@ hpt372n:
pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
} }
if (adjust == 8) { if (adjust == 8) {
pr_err("DPLL did not stabilize!\n"); dev_err(&dev->dev, "DPLL did not stabilize!\n");
return -ENODEV; return -ENODEV;
} }
pr_info("bus clock %dMHz, using 66MHz DPLL\n", pci_mhz); dev_info(&dev->dev, "bus clock %dMHz, using 66MHz DPLL\n", pci_mhz);
/* /*
* Set our private data up. We only need a few flags * Set our private data up. We only need a few flags

66
drivers/ata/pata_it821x.c
View file

@ -431,7 +431,8 @@ static unsigned int it821x_smart_qc_issue(struct ata_queued_cmd *qc)
case ATA_CMD_SET_FEATURES: case ATA_CMD_SET_FEATURES:
return ata_bmdma_qc_issue(qc); return ata_bmdma_qc_issue(qc);
} }
printk(KERN_DEBUG "it821x: can't process command 0x%02X\n", qc->tf.command); ata_dev_dbg(qc->dev, "it821x: can't process command 0x%02X\n",
qc->tf.command);
return AC_ERR_DEV; return AC_ERR_DEV;
} }
@ -507,12 +508,14 @@ static void it821x_dev_config(struct ata_device *adev)
if (strstr(model_num, "Integrated Technology Express")) { if (strstr(model_num, "Integrated Technology Express")) {
/* RAID mode */ /* RAID mode */
ata_dev_info(adev, "%sRAID%d volume", if (adev->id[129] == 1)
adev->id[147] ? "Bootable " : "", ata_dev_info(adev, "%sRAID%d volume\n",
adev->id[129]); adev->id[147] ? "Bootable " : "",
if (adev->id[129] != 1) adev->id[129]);
pr_cont("(%dK stripe)", adev->id[146]); else
pr_cont("\n"); ata_dev_info(adev, "%sRAID%d volume (%dK stripe)\n",
adev->id[147] ? "Bootable " : "",
adev->id[129], adev->id[146]);
} }
/* This is a controller firmware triggered funny, don't /* This is a controller firmware triggered funny, don't
report the drive faulty! */ report the drive faulty! */
@ -534,7 +537,7 @@ static void it821x_dev_config(struct ata_device *adev)
*/ */
static unsigned int it821x_read_id(struct ata_device *adev, static unsigned int it821x_read_id(struct ata_device *adev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
unsigned int err_mask; unsigned int err_mask;
unsigned char model_num[ATA_ID_PROD_LEN + 1]; unsigned char model_num[ATA_ID_PROD_LEN + 1];
@ -542,21 +545,20 @@ static unsigned int it821x_read_id(struct ata_device *adev,
err_mask = ata_do_dev_read_id(adev, tf, id); err_mask = ata_do_dev_read_id(adev, tf, id);
if (err_mask) if (err_mask)
return err_mask; return err_mask;
ata_id_c_string(id, model_num, ATA_ID_PROD, sizeof(model_num)); ata_id_c_string((u16 *)id, model_num, ATA_ID_PROD, sizeof(model_num));
id[83] &= ~(1 << 12); /* Cache flush is firmware handled */ id[83] &= cpu_to_le16(~(1 << 12)); /* Cache flush is firmware handled */
id[83] &= ~(1 << 13); /* Ditto for LBA48 flushes */ id[84] &= cpu_to_le16(~(1 << 6)); /* No FUA */
id[84] &= ~(1 << 6); /* No FUA */ id[85] &= cpu_to_le16(~(1 << 10)); /* No HPA */
id[85] &= ~(1 << 10); /* No HPA */ id[76] = 0; /* No NCQ/AN etc */
id[76] = 0; /* No NCQ/AN etc */
if (strstr(model_num, "Integrated Technology Express")) { if (strstr(model_num, "Integrated Technology Express")) {
/* Set feature bits the firmware neglects */ /* Set feature bits the firmware neglects */
id[49] |= 0x0300; /* LBA, DMA */ id[49] |= cpu_to_le16(0x0300); /* LBA, DMA */
id[83] &= 0x7FFF; id[83] &= cpu_to_le16(0x7FFF);
id[83] |= 0x4400; /* Word 83 is valid and LBA48 */ id[83] |= cpu_to_le16(0x4400); /* Word 83 is valid and LBA48 */
id[86] |= 0x0400; /* LBA48 on */ id[86] |= cpu_to_le16(0x0400); /* LBA48 on */
id[ATA_ID_MAJOR_VER] |= 0x1F; id[ATA_ID_MAJOR_VER] |= cpu_to_le16(0x1F);
/* Clear the serial number because it's different each boot /* Clear the serial number because it's different each boot
which breaks validation on resume */ which breaks validation on resume */
memset(&id[ATA_ID_SERNO], 0x20, ATA_ID_SERNO_LEN); memset(&id[ATA_ID_SERNO], 0x20, ATA_ID_SERNO_LEN);
@ -593,6 +595,7 @@ static int it821x_check_atapi_dma(struct ata_queued_cmd *qc)
/** /**
* it821x_display_disk - display disk setup * it821x_display_disk - display disk setup
* @ap: ATA port
* @n: Device number * @n: Device number
* @buf: Buffer block from firmware * @buf: Buffer block from firmware
* *
@ -600,7 +603,7 @@ static int it821x_check_atapi_dma(struct ata_queued_cmd *qc)
* by the firmware. * by the firmware.
*/ */
static void it821x_display_disk(int n, u8 *buf) static void it821x_display_disk(struct ata_port *ap, int n, u8 *buf)
{ {
unsigned char id[41]; unsigned char id[41];
int mode = 0; int mode = 0;
@ -633,13 +636,13 @@ static void it821x_display_disk(int n, u8 *buf)
else else
strcpy(mbuf, "PIO"); strcpy(mbuf, "PIO");
if (buf[52] == 4) if (buf[52] == 4)
printk(KERN_INFO "%d: %-6s %-8s %s %s\n", ata_port_info(ap, "%d: %-6s %-8s %s %s\n",
n, mbuf, types[buf[52]], id, cbl); n, mbuf, types[buf[52]], id, cbl);
else else
printk(KERN_INFO "%d: %-6s %-8s Volume: %1d %s %s\n", ata_port_info(ap, "%d: %-6s %-8s Volume: %1d %s %s\n",
n, mbuf, types[buf[52]], buf[53], id, cbl); n, mbuf, types[buf[52]], buf[53], id, cbl);
if (buf[125] < 100) if (buf[125] < 100)
printk(KERN_INFO "%d: Rebuilding: %d%%\n", n, buf[125]); ata_port_info(ap, "%d: Rebuilding: %d%%\n", n, buf[125]);
} }
/** /**
@ -676,7 +679,7 @@ static u8 *it821x_firmware_command(struct ata_port *ap, u8 cmd, int len)
status = ioread8(ap->ioaddr.status_addr); status = ioread8(ap->ioaddr.status_addr);
if (status & ATA_ERR) { if (status & ATA_ERR) {
kfree(buf); kfree(buf);
printk(KERN_ERR "it821x_firmware_command: rejected\n"); ata_port_err(ap, "%s: rejected\n", __func__);
return NULL; return NULL;
} }
if (status & ATA_DRQ) { if (status & ATA_DRQ) {
@ -686,7 +689,7 @@ static u8 *it821x_firmware_command(struct ata_port *ap, u8 cmd, int len)
usleep_range(500, 1000); usleep_range(500, 1000);
} }
kfree(buf); kfree(buf);
printk(KERN_ERR "it821x_firmware_command: timeout\n"); ata_port_err(ap, "%s: timeout\n", __func__);
return NULL; return NULL;
} }
@ -709,13 +712,13 @@ static void it821x_probe_firmware(struct ata_port *ap)
buf = it821x_firmware_command(ap, 0xFA, 512); buf = it821x_firmware_command(ap, 0xFA, 512);
if (buf != NULL) { if (buf != NULL) {
printk(KERN_INFO "pata_it821x: Firmware %02X/%02X/%02X%02X\n", ata_port_info(ap, "pata_it821x: Firmware %02X/%02X/%02X%02X\n",
buf[505], buf[505],
buf[506], buf[506],
buf[507], buf[507],
buf[508]); buf[508]);
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
it821x_display_disk(i, buf + 128 * i); it821x_display_disk(ap, i, buf + 128 * i);
kfree(buf); kfree(buf);
} }
} }
@ -771,7 +774,8 @@ static int it821x_port_start(struct ata_port *ap)
itdev->timing10 = 1; itdev->timing10 = 1;
/* Need to disable ATAPI DMA for this case */ /* Need to disable ATAPI DMA for this case */
if (!itdev->smart) if (!itdev->smart)
printk(KERN_WARNING DRV_NAME": Revision 0x10, workarounds activated.\n"); dev_warn(&pdev->dev,
"Revision 0x10, workarounds activated.\n");
} }
return 0; return 0;
@ -919,14 +923,14 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
} else { } else {
/* Force the card into bypass mode if so requested */ /* Force the card into bypass mode if so requested */
if (it8212_noraid) { if (it8212_noraid) {
printk(KERN_INFO DRV_NAME ": forcing bypass mode.\n"); dev_info(&pdev->dev, "forcing bypass mode.\n");
it821x_disable_raid(pdev); it821x_disable_raid(pdev);
} }
pci_read_config_byte(pdev, 0x50, &conf); pci_read_config_byte(pdev, 0x50, &conf);
conf &= 1; conf &= 1;
printk(KERN_INFO DRV_NAME": controller in %s mode.\n", dev_info(&pdev->dev, "controller in %s mode.\n", mode[conf]);
mode[conf]);
if (conf == 0) if (conf == 0)
ppi[0] = &info_passthru; ppi[0] = &info_passthru;
else else

6
drivers/ata/pata_ixp4xx_cf.c
View file

@ -114,7 +114,7 @@ static void ixp4xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
{ {
struct ixp4xx_pata *ixpp = ap->host->private_data; struct ixp4xx_pata *ixpp = ap->host->private_data;
ata_dev_printk(adev, KERN_INFO, "configured for PIO%d 8bit\n", ata_dev_info(adev, "configured for PIO%d 8bit\n",
adev->pio_mode - XFER_PIO_0); adev->pio_mode - XFER_PIO_0);
ixp4xx_set_8bit_timing(ixpp, adev->pio_mode); ixp4xx_set_8bit_timing(ixpp, adev->pio_mode);
} }
@ -132,8 +132,8 @@ static unsigned int ixp4xx_mmio_data_xfer(struct ata_queued_cmd *qc,
struct ixp4xx_pata *ixpp = ap->host->private_data; struct ixp4xx_pata *ixpp = ap->host->private_data;
unsigned long flags; unsigned long flags;
ata_dev_printk(adev, KERN_DEBUG, "%s %d bytes\n", (rw == READ) ? "READ" : "WRITE", ata_dev_dbg(adev, "%s %d bytes\n", (rw == READ) ? "READ" : "WRITE",
buflen); buflen);
spin_lock_irqsave(ap->lock, flags); spin_lock_irqsave(ap->lock, flags);
/* set the expansion bus in 16bit mode and restore /* set the expansion bus in 16bit mode and restore

9
drivers/ata/pata_marvell.c
View file

@ -32,7 +32,6 @@
static int marvell_pata_active(struct pci_dev *pdev) static int marvell_pata_active(struct pci_dev *pdev)
{ {
int i;
u32 devices; u32 devices;
void __iomem *barp; void __iomem *barp;
@ -44,11 +43,6 @@ static int marvell_pata_active(struct pci_dev *pdev)
if (barp == NULL) if (barp == NULL)
return -ENOMEM; return -ENOMEM;
printk("BAR5:");
for(i = 0; i <= 0x0F; i++)
printk("%02X:%02X ", i, ioread8(barp + i));
printk("\n");
devices = ioread32(barp + 0x0C); devices = ioread32(barp + 0x0C);
pci_iounmap(pdev, barp); pci_iounmap(pdev, barp);
@ -149,7 +143,8 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
#if IS_ENABLED(CONFIG_SATA_AHCI) #if IS_ENABLED(CONFIG_SATA_AHCI)
if (!marvell_pata_active(pdev)) { if (!marvell_pata_active(pdev)) {
printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n"); dev_info(&pdev->dev,
"PATA port not active, deferring to AHCI driver.\n");
return -ENODEV; return -ENODEV;
} }
#endif #endif

5
drivers/ata/pata_netcell.c
View file

@ -21,12 +21,13 @@
/* No PIO or DMA methods needed for this device */ /* No PIO or DMA methods needed for this device */
static unsigned int netcell_read_id(struct ata_device *adev, static unsigned int netcell_read_id(struct ata_device *adev,
struct ata_taskfile *tf, u16 *id) struct ata_taskfile *tf, __le16 *id)
{ {
unsigned int err_mask = ata_do_dev_read_id(adev, tf, id); unsigned int err_mask = ata_do_dev_read_id(adev, tf, id);
/* Firmware forgets to mark words 85-87 valid */ /* Firmware forgets to mark words 85-87 valid */
if (err_mask == 0) if (err_mask == 0)
id[ATA_ID_CSF_DEFAULT] |= 0x4000; id[ATA_ID_CSF_DEFAULT] |= cpu_to_le16(0x4000);
return err_mask; return err_mask;
} }

54
drivers/ata/pata_octeon_cf.c
View file

@ -19,7 +19,7 @@
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <scsi/scsi_host.h> #include <scsi/scsi_host.h>
#include <trace/events/libata.h>
#include <asm/byteorder.h> #include <asm/byteorder.h>
#include <asm/octeon/octeon.h> #include <asm/octeon/octeon.h>
@ -73,16 +73,12 @@ MODULE_PARM_DESC(enable_dma,
*/ */
static unsigned int ns_to_tim_reg(unsigned int tim_mult, unsigned int nsecs) static unsigned int ns_to_tim_reg(unsigned int tim_mult, unsigned int nsecs)
{ {
unsigned int val;
/* /*
* Compute # of eclock periods to get desired duration in * Compute # of eclock periods to get desired duration in
* nanoseconds. * nanoseconds.
*/ */
val = DIV_ROUND_UP(nsecs * (octeon_get_io_clock_rate() / 1000000), return DIV_ROUND_UP(nsecs * (octeon_get_io_clock_rate() / 1000000),
1000 * tim_mult); 1000 * tim_mult);
return val;
} }
static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier) static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier)
@ -273,9 +269,9 @@ static void octeon_cf_set_dmamode(struct ata_port *ap, struct ata_device *dev)
dma_tim.s.we_n = ns_to_tim_reg(tim_mult, oe_n); dma_tim.s.we_n = ns_to_tim_reg(tim_mult, oe_n);
dma_tim.s.we_a = ns_to_tim_reg(tim_mult, oe_a); dma_tim.s.we_a = ns_to_tim_reg(tim_mult, oe_a);
pr_debug("ns to ticks (mult %d) of %d is: %d\n", tim_mult, 60, ata_dev_dbg(dev, "ns to ticks (mult %d) of %d is: %d\n", tim_mult, 60,
ns_to_tim_reg(tim_mult, 60)); ns_to_tim_reg(tim_mult, 60));
pr_debug("oe_n: %d, oe_a: %d, dmack_s: %d, dmack_h: %d, dmarq: %d, pause: %d\n", ata_dev_dbg(dev, "oe_n: %d, oe_a: %d, dmack_s: %d, dmack_h: %d, dmarq: %d, pause: %d\n",
dma_tim.s.oe_n, dma_tim.s.oe_a, dma_tim.s.dmack_s, dma_tim.s.oe_n, dma_tim.s.oe_a, dma_tim.s.dmack_s,
dma_tim.s.dmack_h, dma_tim.s.dmarq, dma_tim.s.pause); dma_tim.s.dmack_h, dma_tim.s.dmarq, dma_tim.s.pause);
@ -440,7 +436,6 @@ static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes,
int rc; int rc;
u8 err; u8 err;
DPRINTK("about to softreset\n");
__raw_writew(ap->ctl, base + 0xe); __raw_writew(ap->ctl, base + 0xe);
udelay(20); udelay(20);
__raw_writew(ap->ctl | ATA_SRST, base + 0xe); __raw_writew(ap->ctl | ATA_SRST, base + 0xe);
@ -455,7 +450,6 @@ static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes,
/* determine by signature whether we have ATA or ATAPI devices */ /* determine by signature whether we have ATA or ATAPI devices */
classes[0] = ata_sff_dev_classify(&link->device[0], 1, &err); classes[0] = ata_sff_dev_classify(&link->device[0], 1, &err);
DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
return 0; return 0;
} }
@ -479,23 +473,11 @@ static void octeon_cf_tf_load16(struct ata_port *ap,
__raw_writew(tf->hob_feature << 8, base + 0xc); __raw_writew(tf->hob_feature << 8, base + 0xc);
__raw_writew(tf->hob_nsect | tf->hob_lbal << 8, base + 2); __raw_writew(tf->hob_nsect | tf->hob_lbal << 8, base + 2);
__raw_writew(tf->hob_lbam | tf->hob_lbah << 8, base + 4); __raw_writew(tf->hob_lbam | tf->hob_lbah << 8, base + 4);
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->hob_feature,
tf->hob_nsect,
tf->hob_lbal,
tf->hob_lbam,
tf->hob_lbah);
} }
if (is_addr) { if (is_addr) {
__raw_writew(tf->feature << 8, base + 0xc); __raw_writew(tf->feature << 8, base + 0xc);
__raw_writew(tf->nsect | tf->lbal << 8, base + 2); __raw_writew(tf->nsect | tf->lbal << 8, base + 2);
__raw_writew(tf->lbam | tf->lbah << 8, base + 4); __raw_writew(tf->lbam | tf->lbah << 8, base + 4);
VPRINTK("feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->feature,
tf->nsect,
tf->lbal,
tf->lbam,
tf->lbah);
} }
ata_wait_idle(ap); ata_wait_idle(ap);
} }
@ -516,20 +498,14 @@ static void octeon_cf_exec_command16(struct ata_port *ap,
{ {
/* The base of the registers is at ioaddr.data_addr. */ /* The base of the registers is at ioaddr.data_addr. */
void __iomem *base = ap->ioaddr.data_addr; void __iomem *base = ap->ioaddr.data_addr;
u16 blob; u16 blob = 0;
if (tf->flags & ATA_TFLAG_DEVICE) { if (tf->flags & ATA_TFLAG_DEVICE)
VPRINTK("device 0x%X\n", tf->device);
blob = tf->device; blob = tf->device;
} else {
blob = 0;
}
DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
blob |= (tf->command << 8); blob |= (tf->command << 8);
__raw_writew(blob, base + 6); __raw_writew(blob, base + 6);
ata_wait_idle(ap); ata_wait_idle(ap);
} }
@ -543,12 +519,10 @@ static void octeon_cf_dma_setup(struct ata_queued_cmd *qc)
struct octeon_cf_port *cf_port; struct octeon_cf_port *cf_port;
cf_port = ap->private_data; cf_port = ap->private_data;
DPRINTK("ENTER\n");
/* issue r/w command */ /* issue r/w command */
qc->cursg = qc->sg; qc->cursg = qc->sg;
cf_port->dma_finished = 0; cf_port->dma_finished = 0;
ap->ops->sff_exec_command(ap, &qc->tf); ap->ops->sff_exec_command(ap, &qc->tf);
DPRINTK("EXIT\n");
} }
/** /**
@ -563,8 +537,6 @@ static void octeon_cf_dma_start(struct ata_queued_cmd *qc)
union cvmx_mio_boot_dma_intx mio_boot_dma_int; union cvmx_mio_boot_dma_intx mio_boot_dma_int;
struct scatterlist *sg; struct scatterlist *sg;
VPRINTK("%d scatterlists\n", qc->n_elem);
/* Get the scatter list entry we need to DMA into */ /* Get the scatter list entry we need to DMA into */
sg = qc->cursg; sg = qc->cursg;
BUG_ON(!sg); BUG_ON(!sg);
@ -605,10 +577,6 @@ static void octeon_cf_dma_start(struct ata_queued_cmd *qc)
mio_boot_dma_cfg.s.adr = sg_dma_address(sg); mio_boot_dma_cfg.s.adr = sg_dma_address(sg);
VPRINTK("%s %d bytes address=%p\n",
(mio_boot_dma_cfg.s.rw) ? "write" : "read", sg->length,
(void *)(unsigned long)mio_boot_dma_cfg.s.adr);
cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64); cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64);
} }
@ -627,9 +595,7 @@ static unsigned int octeon_cf_dma_finished(struct ata_port *ap,
union cvmx_mio_boot_dma_intx dma_int; union cvmx_mio_boot_dma_intx dma_int;
u8 status; u8 status;
VPRINTK("ata%u: protocol %d task_state %d\n", trace_ata_bmdma_stop(qc, &qc->tf, qc->tag);
ap->print_id, qc->tf.protocol, ap->hsm_task_state);
if (ap->hsm_task_state != HSM_ST_LAST) if (ap->hsm_task_state != HSM_ST_LAST)
return 0; return 0;
@ -678,7 +644,6 @@ static irqreturn_t octeon_cf_interrupt(int irq, void *dev_instance)
spin_lock_irqsave(&host->lock, flags); spin_lock_irqsave(&host->lock, flags);
DPRINTK("ENTER\n");
for (i = 0; i < host->n_ports; i++) { for (i = 0; i < host->n_ports; i++) {
u8 status; u8 status;
struct ata_port *ap; struct ata_port *ap;
@ -701,6 +666,7 @@ static irqreturn_t octeon_cf_interrupt(int irq, void *dev_instance)
if (!sg_is_last(qc->cursg)) { if (!sg_is_last(qc->cursg)) {
qc->cursg = sg_next(qc->cursg); qc->cursg = sg_next(qc->cursg);
handled = 1; handled = 1;
trace_ata_bmdma_start(ap, &qc->tf, qc->tag);
octeon_cf_dma_start(qc); octeon_cf_dma_start(qc);
continue; continue;
} else { } else {
@ -732,7 +698,6 @@ static irqreturn_t octeon_cf_interrupt(int irq, void *dev_instance)
} }
} }
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
DPRINTK("EXIT\n");
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
@ -800,8 +765,11 @@ static unsigned int octeon_cf_qc_issue(struct ata_queued_cmd *qc)
case ATA_PROT_DMA: case ATA_PROT_DMA:
WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
trace_ata_tf_load(ap, &qc->tf);
ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
trace_ata_bmdma_setup(ap, &qc->tf, qc->tag);
octeon_cf_dma_setup(qc); /* set up dma */ octeon_cf_dma_setup(qc); /* set up dma */
trace_ata_bmdma_start(ap, &qc->tf, qc->tag);
octeon_cf_dma_start(qc); /* initiate dma */ octeon_cf_dma_start(qc); /* initiate dma */
ap->hsm_task_state = HSM_ST_LAST; ap->hsm_task_state = HSM_ST_LAST;
break; break;

15
drivers/ata/pata_of_platform.c
View file

@ -25,11 +25,12 @@ static int pata_of_platform_probe(struct platform_device *ofdev)
struct device_node *dn = ofdev->dev.of_node; struct device_node *dn = ofdev->dev.of_node;
struct resource io_res; struct resource io_res;
struct resource ctl_res; struct resource ctl_res;
struct resource *irq_res; struct resource irq_res;
unsigned int reg_shift = 0; unsigned int reg_shift = 0;
int pio_mode = 0; int pio_mode = 0;
int pio_mask; int pio_mask;
bool use16bit; bool use16bit;
int irq;
ret = of_address_to_resource(dn, 0, &io_res); ret = of_address_to_resource(dn, 0, &io_res);
if (ret) { if (ret) {
@ -45,7 +46,15 @@ static int pata_of_platform_probe(struct platform_device *ofdev)
return -EINVAL; return -EINVAL;
} }
irq_res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0); memset(&irq_res, 0, sizeof(irq_res));
irq = platform_get_irq_optional(ofdev, 0);
if (irq < 0 && irq != -ENXIO)
return irq;
if (irq > 0) {
irq_res.start = irq;
irq_res.end = irq;
}
of_property_read_u32(dn, "reg-shift", &reg_shift); of_property_read_u32(dn, "reg-shift", &reg_shift);
@ -63,7 +72,7 @@ static int pata_of_platform_probe(struct platform_device *ofdev)
pio_mask = 1 << pio_mode; pio_mask = 1 << pio_mode;
pio_mask |= (1 << pio_mode) - 1; pio_mask |= (1 << pio_mode) - 1;
return __pata_platform_probe(&ofdev->dev, &io_res, &ctl_res, irq_res, return __pata_platform_probe(&ofdev->dev, &io_res, &ctl_res, irq > 0 ? &irq_res : NULL,
reg_shift, pio_mask, &pata_platform_sht, reg_shift, pio_mask, &pata_platform_sht,
use16bit); use16bit);
} }

71
drivers/ata/pata_pdc2027x.c
View file

@ -30,13 +30,6 @@
#define DRV_NAME "pata_pdc2027x" #define DRV_NAME "pata_pdc2027x"
#define DRV_VERSION "1.0" #define DRV_VERSION "1.0"
#undef PDC_DEBUG
#ifdef PDC_DEBUG
#define PDPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
#else
#define PDPRINTK(fmt, args...)
#endif
enum { enum {
PDC_MMIO_BAR = 5, PDC_MMIO_BAR = 5,
@ -214,11 +207,11 @@ static int pdc2027x_cable_detect(struct ata_port *ap)
if (cgcr & (1 << 26)) if (cgcr & (1 << 26))
goto cbl40; goto cbl40;
PDPRINTK("No cable or 80-conductor cable on port %d\n", ap->port_no); ata_port_dbg(ap, "No cable or 80-conductor cable\n");
return ATA_CBL_PATA80; return ATA_CBL_PATA80;
cbl40: cbl40:
printk(KERN_INFO DRV_NAME ": 40-conductor cable detected on port %d\n", ap->port_no); ata_port_info(ap, DRV_NAME ":40-conductor cable detected\n");
return ATA_CBL_PATA40; return ATA_CBL_PATA40;
} }
@ -292,17 +285,17 @@ static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev)
unsigned int pio = adev->pio_mode - XFER_PIO_0; unsigned int pio = adev->pio_mode - XFER_PIO_0;
u32 ctcr0, ctcr1; u32 ctcr0, ctcr1;
PDPRINTK("adev->pio_mode[%X]\n", adev->pio_mode); ata_port_dbg(ap, "adev->pio_mode[%X]\n", adev->pio_mode);
/* Sanity check */ /* Sanity check */
if (pio > 4) { if (pio > 4) {
printk(KERN_ERR DRV_NAME ": Unknown pio mode [%d] ignored\n", pio); ata_port_err(ap, "Unknown pio mode [%d] ignored\n", pio);
return; return;
} }
/* Set the PIO timing registers using value table for 133MHz */ /* Set the PIO timing registers using value table for 133MHz */
PDPRINTK("Set pio regs... \n"); ata_port_dbg(ap, "Set pio regs... \n");
ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0)); ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0));
ctcr0 &= 0xffff0000; ctcr0 &= 0xffff0000;
@ -315,9 +308,7 @@ static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev)
ctcr1 |= (pdc2027x_pio_timing_tbl[pio].value2 << 24); ctcr1 |= (pdc2027x_pio_timing_tbl[pio].value2 << 24);
iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1)); iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1));
PDPRINTK("Set pio regs done\n"); ata_port_dbg(ap, "Set to pio mode[%u] \n", pio);
PDPRINTK("Set to pio mode[%u] \n", pio);
} }
/** /**
@ -350,7 +341,7 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
iowrite32(ctcr1 & ~(1 << 7), dev_mmio(ap, adev, PDC_CTCR1)); iowrite32(ctcr1 & ~(1 << 7), dev_mmio(ap, adev, PDC_CTCR1));
} }
PDPRINTK("Set udma regs... \n"); ata_port_dbg(ap, "Set udma regs... \n");
ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1)); ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1));
ctcr1 &= 0xff000000; ctcr1 &= 0xff000000;
@ -359,16 +350,14 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
(pdc2027x_udma_timing_tbl[udma_mode].value2 << 16); (pdc2027x_udma_timing_tbl[udma_mode].value2 << 16);
iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1)); iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1));
PDPRINTK("Set udma regs done\n"); ata_port_dbg(ap, "Set to udma mode[%u] \n", udma_mode);
PDPRINTK("Set to udma mode[%u] \n", udma_mode);
} else if ((dma_mode >= XFER_MW_DMA_0) && } else if ((dma_mode >= XFER_MW_DMA_0) &&
(dma_mode <= XFER_MW_DMA_2)) { (dma_mode <= XFER_MW_DMA_2)) {
/* Set the MDMA timing registers with value table for 133MHz */ /* Set the MDMA timing registers with value table for 133MHz */
unsigned int mdma_mode = dma_mode & 0x07; unsigned int mdma_mode = dma_mode & 0x07;
PDPRINTK("Set mdma regs... \n"); ata_port_dbg(ap, "Set mdma regs... \n");
ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0)); ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0));
ctcr0 &= 0x0000ffff; ctcr0 &= 0x0000ffff;
@ -376,11 +365,10 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
(pdc2027x_mdma_timing_tbl[mdma_mode].value1 << 24); (pdc2027x_mdma_timing_tbl[mdma_mode].value1 << 24);
iowrite32(ctcr0, dev_mmio(ap, adev, PDC_CTCR0)); iowrite32(ctcr0, dev_mmio(ap, adev, PDC_CTCR0));
PDPRINTK("Set mdma regs done\n");
PDPRINTK("Set to mdma mode[%u] \n", mdma_mode); ata_port_dbg(ap, "Set to mdma mode[%u] \n", mdma_mode);
} else { } else {
printk(KERN_ERR DRV_NAME ": Unknown dma mode [%u] ignored\n", dma_mode); ata_port_err(ap, "Unknown dma mode [%u] ignored\n", dma_mode);
} }
} }
@ -414,7 +402,7 @@ static int pdc2027x_set_mode(struct ata_link *link, struct ata_device **r_failed
ctcr1 |= (1 << 25); ctcr1 |= (1 << 25);
iowrite32(ctcr1, dev_mmio(ap, dev, PDC_CTCR1)); iowrite32(ctcr1, dev_mmio(ap, dev, PDC_CTCR1));
PDPRINTK("Turn on prefetch\n"); ata_dev_dbg(dev, "Turn on prefetch\n");
} else { } else {
pdc2027x_set_dmamode(ap, dev); pdc2027x_set_dmamode(ap, dev);
} }
@ -485,8 +473,8 @@ retry:
counter = (bccrh << 15) | bccrl; counter = (bccrh << 15) | bccrl;
PDPRINTK("bccrh [%X] bccrl [%X]\n", bccrh, bccrl); dev_dbg(host->dev, "bccrh [%X] bccrl [%X]\n", bccrh, bccrl);
PDPRINTK("bccrhv[%X] bccrlv[%X]\n", bccrhv, bccrlv); dev_dbg(host->dev, "bccrhv[%X] bccrlv[%X]\n", bccrhv, bccrlv);
/* /*
* The 30-bit decreasing counter are read by 2 pieces. * The 30-bit decreasing counter are read by 2 pieces.
@ -495,7 +483,7 @@ retry:
*/ */
if (retry && !(bccrh == bccrhv && bccrl >= bccrlv)) { if (retry && !(bccrh == bccrhv && bccrl >= bccrlv)) {
retry--; retry--;
PDPRINTK("rereading counter\n"); dev_dbg(host->dev, "rereading counter\n");
goto retry; goto retry;
} }
@ -520,20 +508,19 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b
/* Sanity check */ /* Sanity check */
if (unlikely(pll_clock_khz < 5000L || pll_clock_khz > 70000L)) { if (unlikely(pll_clock_khz < 5000L || pll_clock_khz > 70000L)) {
printk(KERN_ERR DRV_NAME ": Invalid PLL input clock %ldkHz, give up!\n", pll_clock_khz); dev_err(host->dev, "Invalid PLL input clock %ldkHz, give up!\n",
pll_clock_khz);
return; return;
} }
#ifdef PDC_DEBUG dev_dbg(host->dev, "pout_required is %ld\n", pout_required);
PDPRINTK("pout_required is %ld\n", pout_required);
/* Show the current clock value of PLL control register /* Show the current clock value of PLL control register
* (maybe already configured by the firmware) * (maybe already configured by the firmware)
*/ */
pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); pll_ctl = ioread16(mmio_base + PDC_PLL_CTL);
PDPRINTK("pll_ctl[%X]\n", pll_ctl); dev_dbg(host->dev, "pll_ctl[%X]\n", pll_ctl);
#endif
/* /*
* Calculate the ratio of F, R and OD * Calculate the ratio of F, R and OD
@ -552,7 +539,7 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b
R = 0x00; R = 0x00;
} else { } else {
/* Invalid ratio */ /* Invalid ratio */
printk(KERN_ERR DRV_NAME ": Invalid ratio %ld, give up!\n", ratio); dev_err(host->dev, "Invalid ratio %ld, give up!\n", ratio);
return; return;
} }
@ -560,15 +547,15 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b
if (unlikely(F < 0 || F > 127)) { if (unlikely(F < 0 || F > 127)) {
/* Invalid F */ /* Invalid F */
printk(KERN_ERR DRV_NAME ": F[%d] invalid!\n", F); dev_err(host->dev, "F[%d] invalid!\n", F);
return; return;
} }
PDPRINTK("F[%d] R[%d] ratio*1000[%ld]\n", F, R, ratio); dev_dbg(host->dev, "F[%d] R[%d] ratio*1000[%ld]\n", F, R, ratio);
pll_ctl = (R << 8) | F; pll_ctl = (R << 8) | F;
PDPRINTK("Writing pll_ctl[%X]\n", pll_ctl); dev_dbg(host->dev, "Writing pll_ctl[%X]\n", pll_ctl);
iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL);
ioread16(mmio_base + PDC_PLL_CTL); /* flush */ ioread16(mmio_base + PDC_PLL_CTL); /* flush */
@ -576,15 +563,13 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b
/* Wait the PLL circuit to be stable */ /* Wait the PLL circuit to be stable */
msleep(30); msleep(30);
#ifdef PDC_DEBUG
/* /*
* Show the current clock value of PLL control register * Show the current clock value of PLL control register
* (maybe configured by the firmware) * (maybe configured by the firmware)
*/ */
pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); pll_ctl = ioread16(mmio_base + PDC_PLL_CTL);
PDPRINTK("pll_ctl[%X]\n", pll_ctl); dev_dbg(host->dev, "pll_ctl[%X]\n", pll_ctl);
#endif
return; return;
} }
@ -605,7 +590,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
/* Start the test mode */ /* Start the test mode */
scr = ioread32(mmio_base + PDC_SYS_CTL); scr = ioread32(mmio_base + PDC_SYS_CTL);
PDPRINTK("scr[%X]\n", scr); dev_dbg(host->dev, "scr[%X]\n", scr);
iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL); iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL);
ioread32(mmio_base + PDC_SYS_CTL); /* flush */ ioread32(mmio_base + PDC_SYS_CTL); /* flush */
@ -622,7 +607,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
/* Stop the test mode */ /* Stop the test mode */
scr = ioread32(mmio_base + PDC_SYS_CTL); scr = ioread32(mmio_base + PDC_SYS_CTL);
PDPRINTK("scr[%X]\n", scr); dev_dbg(host->dev, "scr[%X]\n", scr);
iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL); iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL);
ioread32(mmio_base + PDC_SYS_CTL); /* flush */ ioread32(mmio_base + PDC_SYS_CTL); /* flush */
@ -632,8 +617,8 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 * pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 *
(100000000 / usec_elapsed); (100000000 / usec_elapsed);
PDPRINTK("start[%ld] end[%ld] \n", start_count, end_count); dev_dbg(host->dev, "start[%ld] end[%ld] PLL input clock[%ld]HZ\n",
PDPRINTK("PLL input clock[%ld]Hz\n", pll_clock); start_count, end_count, pll_clock);
return pll_clock; return pll_clock;
} }

2
drivers/ata/pata_pdc202xx_old.c
View file

@ -38,8 +38,6 @@ static int pdc2026x_cable_detect(struct ata_port *ap)
static void pdc202xx_exec_command(struct ata_port *ap, static void pdc202xx_exec_command(struct ata_port *ap,
const struct ata_taskfile *tf) const struct ata_taskfile *tf)
{ {
DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
iowrite8(tf->command, ap->ioaddr.command_addr); iowrite8(tf->command, ap->ioaddr.command_addr);
ndelay(400); ndelay(400);
} }

4
drivers/ata/pata_rz1000.c
View file

@ -69,7 +69,7 @@ static int rz1000_fifo_disable(struct pci_dev *pdev)
reg &= 0xDFFF; reg &= 0xDFFF;
if (pci_write_config_word(pdev, 0x40, reg) != 0) if (pci_write_config_word(pdev, 0x40, reg) != 0)
return -1; return -1;
printk(KERN_INFO DRV_NAME ": disabled chipset readahead.\n"); dev_info(&pdev->dev, "disabled chipset readahead.\n");
return 0; return 0;
} }
@ -97,7 +97,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
if (rz1000_fifo_disable(pdev) == 0) if (rz1000_fifo_disable(pdev) == 0)
return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL, 0); return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL, 0);
printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n"); dev_err(&pdev->dev, "failed to disable read-ahead on chipset.\n");
/* Not safe to use so skip */ /* Not safe to use so skip */
return -ENODEV; return -ENODEV;
} }

4
drivers/ata/pata_serverworks.c
View file

@ -286,13 +286,13 @@ static int serverworks_fixup_osb4(struct pci_dev *pdev)
pci_read_config_dword(isa_dev, 0x64, &reg); pci_read_config_dword(isa_dev, 0x64, &reg);
reg &= ~0x00002000; /* disable 600ns interrupt mask */ reg &= ~0x00002000; /* disable 600ns interrupt mask */
if (!(reg & 0x00004000)) if (!(reg & 0x00004000))
printk(KERN_DEBUG DRV_NAME ": UDMA not BIOS enabled.\n"); dev_info(&pdev->dev, "UDMA not BIOS enabled.\n");
reg |= 0x00004000; /* enable UDMA/33 support */ reg |= 0x00004000; /* enable UDMA/33 support */
pci_write_config_dword(isa_dev, 0x64, reg); pci_write_config_dword(isa_dev, 0x64, reg);
pci_dev_put(isa_dev); pci_dev_put(isa_dev);
return 0; return 0;
} }
printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n"); dev_warn(&pdev->dev, "Unable to find bridge.\n");
return -ENODEV; return -ENODEV;
} }

9
drivers/ata/pata_sil680.c
View file

@ -212,7 +212,6 @@ static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev)
static void sil680_sff_exec_command(struct ata_port *ap, static void sil680_sff_exec_command(struct ata_port *ap,
const struct ata_taskfile *tf) const struct ata_taskfile *tf)
{ {
DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
iowrite8(tf->command, ap->ioaddr.command_addr); iowrite8(tf->command, ap->ioaddr.command_addr);
ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
} }
@ -309,17 +308,17 @@ static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio)
switch (tmpbyte & 0x30) { switch (tmpbyte & 0x30) {
case 0x00: case 0x00:
printk(KERN_INFO "sil680: 100MHz clock.\n"); dev_info(&pdev->dev, "sil680: 100MHz clock.\n");
break; break;
case 0x10: case 0x10:
printk(KERN_INFO "sil680: 133MHz clock.\n"); dev_info(&pdev->dev, "sil680: 133MHz clock.\n");
break; break;
case 0x20: case 0x20:
printk(KERN_INFO "sil680: Using PCI clock.\n"); dev_info(&pdev->dev, "sil680: Using PCI clock.\n");
break; break;
/* This last case is _NOT_ ok */ /* This last case is _NOT_ ok */
case 0x30: case 0x30:
printk(KERN_ERR "sil680: Clock disabled ?\n"); dev_err(&pdev->dev, "sil680: Clock disabled ?\n");
} }
return tmpbyte & 0x30; return tmpbyte & 0x30;
} }

12
drivers/ata/pata_via.c
View file

@ -414,12 +414,6 @@ static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
iowrite8(tf->hob_lbal, ioaddr->lbal_addr); iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
iowrite8(tf->hob_lbam, ioaddr->lbam_addr); iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
iowrite8(tf->hob_lbah, ioaddr->lbah_addr); iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->hob_feature,
tf->hob_nsect,
tf->hob_lbal,
tf->hob_lbam,
tf->hob_lbah);
} }
if (is_addr) { if (is_addr) {
@ -428,12 +422,6 @@ static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
iowrite8(tf->lbal, ioaddr->lbal_addr); iowrite8(tf->lbal, ioaddr->lbal_addr);
iowrite8(tf->lbam, ioaddr->lbam_addr); iowrite8(tf->lbam, ioaddr->lbam_addr);
iowrite8(tf->lbah, ioaddr->lbah_addr); iowrite8(tf->lbah, ioaddr->lbah_addr);
VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
tf->feature,
tf->nsect,
tf->lbal,
tf->lbam,
tf->lbah);
} }
ata_wait_idle(ap); ata_wait_idle(ap);

33
drivers/ata/pdc_adma.c
View file

@ -284,9 +284,6 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
*(__le32 *)(buf + i) = *(__le32 *)(buf + i) =
(pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4); (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
i += 4; i += 4;
VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
(unsigned long)addr, len);
} }
if (likely(last_buf)) if (likely(last_buf))
@ -302,8 +299,6 @@ static enum ata_completion_errors adma_qc_prep(struct ata_queued_cmd *qc)
u32 pkt_dma = (u32)pp->pkt_dma; u32 pkt_dma = (u32)pp->pkt_dma;
int i = 0; int i = 0;
VPRINTK("ENTER\n");
adma_enter_reg_mode(qc->ap); adma_enter_reg_mode(qc->ap);
if (qc->tf.protocol != ATA_PROT_DMA) if (qc->tf.protocol != ATA_PROT_DMA)
return AC_ERR_OK; return AC_ERR_OK;
@ -355,22 +350,6 @@ static enum ata_completion_errors adma_qc_prep(struct ata_queued_cmd *qc)
i = adma_fill_sg(qc); i = adma_fill_sg(qc);
wmb(); /* flush PRDs and pkt to memory */ wmb(); /* flush PRDs and pkt to memory */
#if 0
/* dump out CPB + PRDs for debug */
{
int j, len = 0;
static char obuf[2048];
for (j = 0; j < i; ++j) {
len += sprintf(obuf+len, "%02x ", buf[j]);
if ((j & 7) == 7) {
printk("%s\n", obuf);
len = 0;
}
}
if (len)
printk("%s\n", obuf);
}
#endif
return AC_ERR_OK; return AC_ERR_OK;
} }
@ -379,8 +358,6 @@ static inline void adma_packet_start(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
void __iomem *chan = ADMA_PORT_REGS(ap); void __iomem *chan = ADMA_PORT_REGS(ap);
VPRINTK("ENTER, ap %p\n", ap);
/* fire up the ADMA engine */ /* fire up the ADMA engine */
writew(aPIOMD4 | aGO, chan + ADMA_CONTROL); writew(aPIOMD4 | aGO, chan + ADMA_CONTROL);
} }
@ -475,8 +452,6 @@ static inline unsigned int adma_intr_mmio(struct ata_host *host)
u8 status = ata_sff_check_status(ap); u8 status = ata_sff_check_status(ap);
if ((status & ATA_BUSY)) if ((status & ATA_BUSY))
continue; continue;
DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
ap->print_id, qc->tf.protocol, status);
/* complete taskfile transaction */ /* complete taskfile transaction */
pp->state = adma_state_idle; pp->state = adma_state_idle;
@ -504,14 +479,10 @@ static irqreturn_t adma_intr(int irq, void *dev_instance)
struct ata_host *host = dev_instance; struct ata_host *host = dev_instance;
unsigned int handled = 0; unsigned int handled = 0;
VPRINTK("ENTER\n");
spin_lock(&host->lock); spin_lock(&host->lock);
handled = adma_intr_pkt(host) | adma_intr_mmio(host); handled = adma_intr_pkt(host) | adma_intr_mmio(host);
spin_unlock(&host->lock); spin_unlock(&host->lock);
VPRINTK("EXIT\n");
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
@ -547,8 +518,8 @@ static int adma_port_start(struct ata_port *ap)
return -ENOMEM; return -ENOMEM;
/* paranoia? */ /* paranoia? */
if ((pp->pkt_dma & 7) != 0) { if ((pp->pkt_dma & 7) != 0) {
printk(KERN_ERR "bad alignment for pp->pkt_dma: %08x\n", ata_port_err(ap, "bad alignment for pp->pkt_dma: %08x\n",
(u32)pp->pkt_dma); (u32)pp->pkt_dma);
return -ENOMEM; return -ENOMEM;
} }
ap->private_data = pp; ap->private_data = pp;

165
drivers/ata/sata_dwc_460ex.c
View file

@ -14,15 +14,6 @@
* COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
*/ */
#ifdef CONFIG_SATA_DWC_DEBUG
#define DEBUG
#endif
#ifdef CONFIG_SATA_DWC_VDEBUG
#define VERBOSE_DEBUG
#define DEBUG_NCQ
#endif
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/device.h> #include <linux/device.h>
@ -34,6 +25,7 @@
#include <linux/phy/phy.h> #include <linux/phy/phy.h>
#include <linux/libata.h> #include <linux/libata.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <trace/events/libata.h>
#include "libata.h" #include "libata.h"
@ -182,10 +174,8 @@ enum {
* Prototypes * Prototypes
*/ */
static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag); static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag);
static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc, static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc);
u32 check_status); static void sata_dwc_dma_xfer_complete(struct ata_port *ap);
static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status);
static void sata_dwc_port_stop(struct ata_port *ap);
static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag); static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag);
#ifdef CONFIG_SATA_DWC_OLD_DMA #ifdef CONFIG_SATA_DWC_OLD_DMA
@ -215,9 +205,10 @@ static int sata_dwc_dma_get_channel_old(struct sata_dwc_device_port *hsdevp)
{ {
struct sata_dwc_device *hsdev = hsdevp->hsdev; struct sata_dwc_device *hsdev = hsdevp->hsdev;
struct dw_dma_slave *dws = &sata_dwc_dma_dws; struct dw_dma_slave *dws = &sata_dwc_dma_dws;
struct device *dev = hsdev->dev;
dma_cap_mask_t mask; dma_cap_mask_t mask;
dws->dma_dev = hsdev->dev; dws->dma_dev = dev;
dma_cap_zero(mask); dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask); dma_cap_set(DMA_SLAVE, mask);
@ -225,8 +216,7 @@ static int sata_dwc_dma_get_channel_old(struct sata_dwc_device_port *hsdevp)
/* Acquire DMA channel */ /* Acquire DMA channel */
hsdevp->chan = dma_request_channel(mask, sata_dwc_dma_filter, hsdevp); hsdevp->chan = dma_request_channel(mask, sata_dwc_dma_filter, hsdevp);
if (!hsdevp->chan) { if (!hsdevp->chan) {
dev_err(hsdev->dev, "%s: dma channel unavailable\n", dev_err(dev, "%s: dma channel unavailable\n", __func__);
__func__);
return -EAGAIN; return -EAGAIN;
} }
@ -236,26 +226,25 @@ static int sata_dwc_dma_get_channel_old(struct sata_dwc_device_port *hsdevp)
static int sata_dwc_dma_init_old(struct platform_device *pdev, static int sata_dwc_dma_init_old(struct platform_device *pdev,
struct sata_dwc_device *hsdev) struct sata_dwc_device *hsdev)
{ {
struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev;
struct resource *res; struct device_node *np = dev->of_node;
hsdev->dma = devm_kzalloc(&pdev->dev, sizeof(*hsdev->dma), GFP_KERNEL); hsdev->dma = devm_kzalloc(dev, sizeof(*hsdev->dma), GFP_KERNEL);
if (!hsdev->dma) if (!hsdev->dma)
return -ENOMEM; return -ENOMEM;
hsdev->dma->dev = &pdev->dev; hsdev->dma->dev = dev;
hsdev->dma->id = pdev->id; hsdev->dma->id = pdev->id;
/* Get SATA DMA interrupt number */ /* Get SATA DMA interrupt number */
hsdev->dma->irq = irq_of_parse_and_map(np, 1); hsdev->dma->irq = irq_of_parse_and_map(np, 1);
if (hsdev->dma->irq == NO_IRQ) { if (hsdev->dma->irq == NO_IRQ) {
dev_err(&pdev->dev, "no SATA DMA irq\n"); dev_err(dev, "no SATA DMA irq\n");
return -ENODEV; return -ENODEV;
} }
/* Get physical SATA DMA register base address */ /* Get physical SATA DMA register base address */
res = platform_get_resource(pdev, IORESOURCE_MEM, 1); hsdev->dma->regs = devm_platform_ioremap_resource(pdev, 1);
hsdev->dma->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hsdev->dma->regs)) if (IS_ERR(hsdev->dma->regs))
return PTR_ERR(hsdev->dma->regs); return PTR_ERR(hsdev->dma->regs);
@ -297,35 +286,6 @@ static const char *get_prot_descript(u8 protocol)
} }
} }
static const char *get_dma_dir_descript(int dma_dir)
{
switch ((enum dma_data_direction)dma_dir) {
case DMA_BIDIRECTIONAL:
return "bidirectional";
case DMA_TO_DEVICE:
return "to device";
case DMA_FROM_DEVICE:
return "from device";
default:
return "none";
}
}
static void sata_dwc_tf_dump(struct ata_port *ap, struct ata_taskfile *tf)
{
dev_vdbg(ap->dev,
"taskfile cmd: 0x%02x protocol: %s flags: 0x%lx device: %x\n",
tf->command, get_prot_descript(tf->protocol), tf->flags,
tf->device);
dev_vdbg(ap->dev,
"feature: 0x%02x nsect: 0x%x lbal: 0x%x lbam: 0x%x lbah: 0x%x\n",
tf->feature, tf->nsect, tf->lbal, tf->lbam, tf->lbah);
dev_vdbg(ap->dev,
"hob_feature: 0x%02x hob_nsect: 0x%x hob_lbal: 0x%x hob_lbam: 0x%x hob_lbah: 0x%x\n",
tf->hob_feature, tf->hob_nsect, tf->hob_lbal, tf->hob_lbam,
tf->hob_lbah);
}
static void dma_dwc_xfer_done(void *hsdev_instance) static void dma_dwc_xfer_done(void *hsdev_instance)
{ {
unsigned long flags; unsigned long flags;
@ -355,7 +315,7 @@ static void dma_dwc_xfer_done(void *hsdev_instance)
} }
if ((hsdevp->dma_interrupt_count % 2) == 0) if ((hsdevp->dma_interrupt_count % 2) == 0)
sata_dwc_dma_xfer_complete(ap, 1); sata_dwc_dma_xfer_complete(ap);
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
} }
@ -553,6 +513,7 @@ static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
* active tag. It is the tag that matches the command about to * active tag. It is the tag that matches the command about to
* be completed. * be completed.
*/ */
trace_ata_bmdma_start(ap, &qc->tf, tag);
qc->ap->link.active_tag = tag; qc->ap->link.active_tag = tag;
sata_dwc_bmdma_start_by_tag(qc, tag); sata_dwc_bmdma_start_by_tag(qc, tag);
@ -586,7 +547,7 @@ static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
if (status & ATA_ERR) { if (status & ATA_ERR) {
dev_dbg(ap->dev, "interrupt ATA_ERR (0x%x)\n", status); dev_dbg(ap->dev, "interrupt ATA_ERR (0x%x)\n", status);
sata_dwc_qc_complete(ap, qc, 1); sata_dwc_qc_complete(ap, qc);
handled = 1; handled = 1;
goto DONE; goto DONE;
} }
@ -611,13 +572,13 @@ DRVSTILLBUSY:
} }
if ((hsdevp->dma_interrupt_count % 2) == 0) if ((hsdevp->dma_interrupt_count % 2) == 0)
sata_dwc_dma_xfer_complete(ap, 1); sata_dwc_dma_xfer_complete(ap);
} else if (ata_is_pio(qc->tf.protocol)) { } else if (ata_is_pio(qc->tf.protocol)) {
ata_sff_hsm_move(ap, qc, status, 0); ata_sff_hsm_move(ap, qc, status, 0);
handled = 1; handled = 1;
goto DONE; goto DONE;
} else { } else {
if (unlikely(sata_dwc_qc_complete(ap, qc, 1))) if (unlikely(sata_dwc_qc_complete(ap, qc)))
goto DRVSTILLBUSY; goto DRVSTILLBUSY;
} }
@ -677,7 +638,7 @@ DRVSTILLBUSY:
if (status & ATA_ERR) { if (status & ATA_ERR) {
dev_dbg(ap->dev, "%s ATA_ERR (0x%x)\n", __func__, dev_dbg(ap->dev, "%s ATA_ERR (0x%x)\n", __func__,
status); status);
sata_dwc_qc_complete(ap, qc, 1); sata_dwc_qc_complete(ap, qc);
handled = 1; handled = 1;
goto DONE; goto DONE;
} }
@ -692,9 +653,9 @@ DRVSTILLBUSY:
dev_warn(ap->dev, "%s: DMA not pending?\n", dev_warn(ap->dev, "%s: DMA not pending?\n",
__func__); __func__);
if ((hsdevp->dma_interrupt_count % 2) == 0) if ((hsdevp->dma_interrupt_count % 2) == 0)
sata_dwc_dma_xfer_complete(ap, 1); sata_dwc_dma_xfer_complete(ap);
} else { } else {
if (unlikely(sata_dwc_qc_complete(ap, qc, 1))) if (unlikely(sata_dwc_qc_complete(ap, qc)))
goto STILLBUSY; goto STILLBUSY;
} }
continue; continue;
@ -749,7 +710,7 @@ static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag)
} }
} }
static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status) static void sata_dwc_dma_xfer_complete(struct ata_port *ap)
{ {
struct ata_queued_cmd *qc; struct ata_queued_cmd *qc;
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap); struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
@ -763,17 +724,6 @@ static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status)
return; return;
} }
#ifdef DEBUG_NCQ
if (tag > 0) {
dev_info(ap->dev,
"%s tag=%u cmd=0x%02x dma dir=%s proto=%s dmacr=0x%08x\n",
__func__, qc->hw_tag, qc->tf.command,
get_dma_dir_descript(qc->dma_dir),
get_prot_descript(qc->tf.protocol),
sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr));
}
#endif
if (ata_is_dma(qc->tf.protocol)) { if (ata_is_dma(qc->tf.protocol)) {
if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) { if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) {
dev_err(ap->dev, dev_err(ap->dev,
@ -783,15 +733,14 @@ static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status)
} }
hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_NONE; hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_NONE;
sata_dwc_qc_complete(ap, qc, check_status); sata_dwc_qc_complete(ap, qc);
ap->link.active_tag = ATA_TAG_POISON; ap->link.active_tag = ATA_TAG_POISON;
} else { } else {
sata_dwc_qc_complete(ap, qc, check_status); sata_dwc_qc_complete(ap, qc);
} }
} }
static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc, static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc)
u32 check_status)
{ {
u8 status = 0; u8 status = 0;
u32 mask = 0x0; u32 mask = 0x0;
@ -799,7 +748,6 @@ static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc,
struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap); struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap); struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
hsdev->sactive_queued = 0; hsdev->sactive_queued = 0;
dev_dbg(ap->dev, "%s checkstatus? %x\n", __func__, check_status);
if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_TX) if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_TX)
dev_err(ap->dev, "TX DMA PENDING\n"); dev_err(ap->dev, "TX DMA PENDING\n");
@ -980,9 +928,6 @@ static void sata_dwc_exec_command_by_tag(struct ata_port *ap,
{ {
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap); struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
dev_dbg(ap->dev, "%s cmd(0x%02x): %s tag=%d\n", __func__, tf->command,
ata_get_cmd_descript(tf->command), tag);
hsdevp->cmd_issued[tag] = cmd_issued; hsdevp->cmd_issued[tag] = cmd_issued;
/* /*
@ -1005,12 +950,9 @@ static void sata_dwc_bmdma_setup(struct ata_queued_cmd *qc)
{ {
u8 tag = qc->hw_tag; u8 tag = qc->hw_tag;
if (ata_is_ncq(qc->tf.protocol)) { if (!ata_is_ncq(qc->tf.protocol))
dev_dbg(qc->ap->dev, "%s: ap->link.sactive=0x%08x tag=%d\n",
__func__, qc->ap->link.sactive, tag);
} else {
tag = 0; tag = 0;
}
sata_dwc_bmdma_setup_by_tag(qc, tag); sata_dwc_bmdma_setup_by_tag(qc, tag);
} }
@ -1037,12 +979,6 @@ static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag)
start_dma = 0; start_dma = 0;
} }
dev_dbg(ap->dev,
"%s qc=%p tag: %x cmd: 0x%02x dma_dir: %s start_dma? %x\n",
__func__, qc, tag, qc->tf.command,
get_dma_dir_descript(qc->dma_dir), start_dma);
sata_dwc_tf_dump(ap, &qc->tf);
if (start_dma) { if (start_dma) {
sata_dwc_scr_read(&ap->link, SCR_ERROR, &reg); sata_dwc_scr_read(&ap->link, SCR_ERROR, &reg);
if (reg & SATA_DWC_SERROR_ERR_BITS) { if (reg & SATA_DWC_SERROR_ERR_BITS) {
@ -1067,13 +1003,9 @@ static void sata_dwc_bmdma_start(struct ata_queued_cmd *qc)
{ {
u8 tag = qc->hw_tag; u8 tag = qc->hw_tag;
if (ata_is_ncq(qc->tf.protocol)) { if (!ata_is_ncq(qc->tf.protocol))
dev_dbg(qc->ap->dev, "%s: ap->link.sactive=0x%08x tag=%d\n",
__func__, qc->ap->link.sactive, tag);
} else {
tag = 0; tag = 0;
}
dev_dbg(qc->ap->dev, "%s\n", __func__);
sata_dwc_bmdma_start_by_tag(qc, tag); sata_dwc_bmdma_start_by_tag(qc, tag);
} }
@ -1084,16 +1016,6 @@ static unsigned int sata_dwc_qc_issue(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap); struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
#ifdef DEBUG_NCQ
if (qc->hw_tag > 0 || ap->link.sactive > 1)
dev_info(ap->dev,
"%s ap id=%d cmd(0x%02x)=%s qc tag=%d prot=%s ap active_tag=0x%08x ap sactive=0x%08x\n",
__func__, ap->print_id, qc->tf.command,
ata_get_cmd_descript(qc->tf.command),
qc->hw_tag, get_prot_descript(qc->tf.protocol),
ap->link.active_tag, ap->link.sactive);
#endif
if (!ata_is_ncq(qc->tf.protocol)) if (!ata_is_ncq(qc->tf.protocol))
tag = 0; tag = 0;
@ -1110,11 +1032,9 @@ static unsigned int sata_dwc_qc_issue(struct ata_queued_cmd *qc)
sactive |= (0x00000001 << tag); sactive |= (0x00000001 << tag);
sata_dwc_scr_write(&ap->link, SCR_ACTIVE, sactive); sata_dwc_scr_write(&ap->link, SCR_ACTIVE, sactive);
dev_dbg(qc->ap->dev, trace_ata_tf_load(ap, &qc->tf);
"%s: tag=%d ap->link.sactive = 0x%08x sactive=0x%08x\n",
__func__, tag, qc->ap->link.sactive, sactive);
ap->ops->sff_tf_load(ap, &qc->tf); ap->ops->sff_tf_load(ap, &qc->tf);
trace_ata_exec_command(ap, &qc->tf, tag);
sata_dwc_exec_command_by_tag(ap, &qc->tf, tag, sata_dwc_exec_command_by_tag(ap, &qc->tf, tag,
SATA_DWC_CMD_ISSUED_PEND); SATA_DWC_CMD_ISSUED_PEND);
} else { } else {
@ -1207,6 +1127,8 @@ static const struct ata_port_info sata_dwc_port_info[] = {
static int sata_dwc_probe(struct platform_device *ofdev) static int sata_dwc_probe(struct platform_device *ofdev)
{ {
struct device *dev = &ofdev->dev;
struct device_node *np = dev->of_node;
struct sata_dwc_device *hsdev; struct sata_dwc_device *hsdev;
u32 idr, versionr; u32 idr, versionr;
char *ver = (char *)&versionr; char *ver = (char *)&versionr;
@ -1216,23 +1138,21 @@ static int sata_dwc_probe(struct platform_device *ofdev)
struct ata_host *host; struct ata_host *host;
struct ata_port_info pi = sata_dwc_port_info[0]; struct ata_port_info pi = sata_dwc_port_info[0];
const struct ata_port_info *ppi[] = { &pi, NULL }; const struct ata_port_info *ppi[] = { &pi, NULL };
struct device_node *np = ofdev->dev.of_node;
struct resource *res; struct resource *res;
/* Allocate DWC SATA device */ /* Allocate DWC SATA device */
host = ata_host_alloc_pinfo(&ofdev->dev, ppi, SATA_DWC_MAX_PORTS); host = ata_host_alloc_pinfo(dev, ppi, SATA_DWC_MAX_PORTS);
hsdev = devm_kzalloc(&ofdev->dev, sizeof(*hsdev), GFP_KERNEL); hsdev = devm_kzalloc(dev, sizeof(*hsdev), GFP_KERNEL);
if (!host || !hsdev) if (!host || !hsdev)
return -ENOMEM; return -ENOMEM;
host->private_data = hsdev; host->private_data = hsdev;
/* Ioremap SATA registers */ /* Ioremap SATA registers */
res = platform_get_resource(ofdev, IORESOURCE_MEM, 0); base = devm_platform_get_and_ioremap_resource(ofdev, 0, &res);
base = devm_ioremap_resource(&ofdev->dev, res);
if (IS_ERR(base)) if (IS_ERR(base))
return PTR_ERR(base); return PTR_ERR(base);
dev_dbg(&ofdev->dev, "ioremap done for SATA register address\n"); dev_dbg(dev, "ioremap done for SATA register address\n");
/* Synopsys DWC SATA specific Registers */ /* Synopsys DWC SATA specific Registers */
hsdev->sata_dwc_regs = base + SATA_DWC_REG_OFFSET; hsdev->sata_dwc_regs = base + SATA_DWC_REG_OFFSET;
@ -1246,11 +1166,10 @@ static int sata_dwc_probe(struct platform_device *ofdev)
/* Read the ID and Version Registers */ /* Read the ID and Version Registers */
idr = sata_dwc_readl(&hsdev->sata_dwc_regs->idr); idr = sata_dwc_readl(&hsdev->sata_dwc_regs->idr);
versionr = sata_dwc_readl(&hsdev->sata_dwc_regs->versionr); versionr = sata_dwc_readl(&hsdev->sata_dwc_regs->versionr);
dev_notice(&ofdev->dev, "id %d, controller version %c.%c%c\n", dev_notice(dev, "id %d, controller version %c.%c%c\n", idr, ver[0], ver[1], ver[2]);
idr, ver[0], ver[1], ver[2]);
/* Save dev for later use in dev_xxx() routines */ /* Save dev for later use in dev_xxx() routines */
hsdev->dev = &ofdev->dev; hsdev->dev = dev;
/* Enable SATA Interrupts */ /* Enable SATA Interrupts */
sata_dwc_enable_interrupts(hsdev); sata_dwc_enable_interrupts(hsdev);
@ -1258,7 +1177,7 @@ static int sata_dwc_probe(struct platform_device *ofdev)
/* Get SATA interrupt number */ /* Get SATA interrupt number */
irq = irq_of_parse_and_map(np, 0); irq = irq_of_parse_and_map(np, 0);
if (irq == NO_IRQ) { if (irq == NO_IRQ) {
dev_err(&ofdev->dev, "no SATA DMA irq\n"); dev_err(dev, "no SATA DMA irq\n");
return -ENODEV; return -ENODEV;
} }
@ -1270,7 +1189,7 @@ static int sata_dwc_probe(struct platform_device *ofdev)
} }
#endif #endif
hsdev->phy = devm_phy_optional_get(hsdev->dev, "sata-phy"); hsdev->phy = devm_phy_optional_get(dev, "sata-phy");
if (IS_ERR(hsdev->phy)) if (IS_ERR(hsdev->phy))
return PTR_ERR(hsdev->phy); return PTR_ERR(hsdev->phy);
@ -1285,7 +1204,7 @@ static int sata_dwc_probe(struct platform_device *ofdev)
*/ */
err = ata_host_activate(host, irq, sata_dwc_isr, 0, &sata_dwc_sht); err = ata_host_activate(host, irq, sata_dwc_isr, 0, &sata_dwc_sht);
if (err) if (err)
dev_err(&ofdev->dev, "failed to activate host"); dev_err(dev, "failed to activate host");
return 0; return 0;
@ -1309,7 +1228,7 @@ static int sata_dwc_remove(struct platform_device *ofdev)
sata_dwc_dma_exit_old(hsdev); sata_dwc_dma_exit_old(hsdev);
#endif #endif
dev_dbg(&ofdev->dev, "done\n"); dev_dbg(dev, "done\n");
return 0; return 0;
} }

212
drivers/ata/sata_fsl.c
View file

@ -221,10 +221,10 @@ enum {
* 4 Dwords per command slot, command header size == 64 Dwords. * 4 Dwords per command slot, command header size == 64 Dwords.
*/ */
struct cmdhdr_tbl_entry { struct cmdhdr_tbl_entry {
u32 cda; __le32 cda;
u32 prde_fis_len; __le32 prde_fis_len;
u32 ttl; __le32 ttl;
u32 desc_info; __le32 desc_info;
}; };
/* /*
@ -246,8 +246,10 @@ enum {
struct command_desc { struct command_desc {
u8 cfis[8 * 4]; u8 cfis[8 * 4];
u8 sfis[8 * 4]; u8 sfis[8 * 4];
u8 acmd[4 * 4]; struct_group(cdb,
u8 fill[4 * 4]; u8 acmd[4 * 4];
u8 fill[4 * 4];
);
u32 prdt[SATA_FSL_MAX_PRD_DIRECT * 4]; u32 prdt[SATA_FSL_MAX_PRD_DIRECT * 4];
u32 prdt_indirect[(SATA_FSL_MAX_PRD - SATA_FSL_MAX_PRD_DIRECT) * 4]; u32 prdt_indirect[(SATA_FSL_MAX_PRD - SATA_FSL_MAX_PRD_DIRECT) * 4];
}; };
@ -257,9 +259,9 @@ struct command_desc {
*/ */
struct prde { struct prde {
u32 dba; __le32 dba;
u8 fill[2 * 4]; u8 fill[2 * 4];
u32 ddc_and_ext; __le32 ddc_and_ext;
}; };
/* /*
@ -311,16 +313,16 @@ static void fsl_sata_set_irq_coalescing(struct ata_host *host,
intr_coalescing_ticks = ticks; intr_coalescing_ticks = ticks;
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
DPRINTK("interrupt coalescing, count = 0x%x, ticks = %x\n", dev_dbg(host->dev, "interrupt coalescing, count = 0x%x, ticks = %x\n",
intr_coalescing_count, intr_coalescing_ticks); intr_coalescing_count, intr_coalescing_ticks);
DPRINTK("ICC register status: (hcr base: %p) = 0x%x\n", dev_dbg(host->dev, "ICC register status: (hcr base: 0x%p) = 0x%x\n",
hcr_base, ioread32(hcr_base + ICC)); hcr_base, ioread32(hcr_base + ICC));
} }
static ssize_t fsl_sata_intr_coalescing_show(struct device *dev, static ssize_t fsl_sata_intr_coalescing_show(struct device *dev,
struct device_attribute *attr, char *buf) struct device_attribute *attr, char *buf)
{ {
return sprintf(buf, "%d %d\n", return sysfs_emit(buf, "%d %d\n",
intr_coalescing_count, intr_coalescing_ticks); intr_coalescing_count, intr_coalescing_ticks);
} }
@ -355,9 +357,9 @@ static ssize_t fsl_sata_rx_watermark_show(struct device *dev,
spin_lock_irqsave(&host->lock, flags); spin_lock_irqsave(&host->lock, flags);
rx_watermark = ioread32(csr_base + TRANSCFG); rx_watermark = ioread32(csr_base + TRANSCFG);
rx_watermark &= 0x1f; rx_watermark &= 0x1f;
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
return sprintf(buf, "%d\n", rx_watermark);
return sysfs_emit(buf, "%d\n", rx_watermark);
} }
static ssize_t fsl_sata_rx_watermark_store(struct device *dev, static ssize_t fsl_sata_rx_watermark_store(struct device *dev,
@ -385,25 +387,27 @@ static ssize_t fsl_sata_rx_watermark_store(struct device *dev,
return strlen(buf); return strlen(buf);
} }
static inline unsigned int sata_fsl_tag(unsigned int tag, static inline unsigned int sata_fsl_tag(struct ata_port *ap,
unsigned int tag,
void __iomem *hcr_base) void __iomem *hcr_base)
{ {
/* We let libATA core do actual (queue) tag allocation */ /* We let libATA core do actual (queue) tag allocation */
if (unlikely(tag >= SATA_FSL_QUEUE_DEPTH)) { if (unlikely(tag >= SATA_FSL_QUEUE_DEPTH)) {
DPRINTK("tag %d invalid : out of range\n", tag); ata_port_dbg(ap, "tag %d invalid : out of range\n", tag);
return 0; return 0;
} }
if (unlikely((ioread32(hcr_base + CQ)) & (1 << tag))) { if (unlikely((ioread32(hcr_base + CQ)) & (1 << tag))) {
DPRINTK("tag %d invalid : in use!!\n", tag); ata_port_dbg(ap, "tag %d invalid : in use!!\n", tag);
return 0; return 0;
} }
return tag; return tag;
} }
static void sata_fsl_setup_cmd_hdr_entry(struct sata_fsl_port_priv *pp, static void sata_fsl_setup_cmd_hdr_entry(struct ata_port *ap,
struct sata_fsl_port_priv *pp,
unsigned int tag, u32 desc_info, unsigned int tag, u32 desc_info,
u32 data_xfer_len, u8 num_prde, u32 data_xfer_len, u8 num_prde,
u8 fis_len) u8 fis_len)
@ -421,11 +425,11 @@ static void sata_fsl_setup_cmd_hdr_entry(struct sata_fsl_port_priv *pp,
pp->cmdslot[tag].ttl = cpu_to_le32(data_xfer_len & ~0x03); pp->cmdslot[tag].ttl = cpu_to_le32(data_xfer_len & ~0x03);
pp->cmdslot[tag].desc_info = cpu_to_le32(desc_info | (tag & 0x1F)); pp->cmdslot[tag].desc_info = cpu_to_le32(desc_info | (tag & 0x1F));
VPRINTK("cda=0x%x, prde_fis_len=0x%x, ttl=0x%x, di=0x%x\n", ata_port_dbg(ap, "cda=0x%x, prde_fis_len=0x%x, ttl=0x%x, di=0x%x\n",
pp->cmdslot[tag].cda, le32_to_cpu(pp->cmdslot[tag].cda),
pp->cmdslot[tag].prde_fis_len, le32_to_cpu(pp->cmdslot[tag].prde_fis_len),
pp->cmdslot[tag].ttl, pp->cmdslot[tag].desc_info); le32_to_cpu(pp->cmdslot[tag].ttl),
le32_to_cpu(pp->cmdslot[tag].desc_info));
} }
static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc, static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
@ -447,8 +451,6 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
dma_addr_t indirect_ext_segment_paddr; dma_addr_t indirect_ext_segment_paddr;
unsigned int si; unsigned int si;
VPRINTK("SATA FSL : cd = 0x%p, prd = 0x%p\n", cmd_desc, prd);
indirect_ext_segment_paddr = cmd_desc_paddr + indirect_ext_segment_paddr = cmd_desc_paddr +
SATA_FSL_CMD_DESC_OFFSET_TO_PRDT + SATA_FSL_MAX_PRD_DIRECT * 16; SATA_FSL_CMD_DESC_OFFSET_TO_PRDT + SATA_FSL_MAX_PRD_DIRECT * 16;
@ -456,9 +458,6 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
dma_addr_t sg_addr = sg_dma_address(sg); dma_addr_t sg_addr = sg_dma_address(sg);
u32 sg_len = sg_dma_len(sg); u32 sg_len = sg_dma_len(sg);
VPRINTK("SATA FSL : fill_sg, sg_addr = 0x%llx, sg_len = %d\n",
(unsigned long long)sg_addr, sg_len);
/* warn if each s/g element is not dword aligned */ /* warn if each s/g element is not dword aligned */
if (unlikely(sg_addr & 0x03)) if (unlikely(sg_addr & 0x03))
ata_port_err(qc->ap, "s/g addr unaligned : 0x%llx\n", ata_port_err(qc->ap, "s/g addr unaligned : 0x%llx\n",
@ -469,7 +468,6 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
if (num_prde == (SATA_FSL_MAX_PRD_DIRECT - 1) && if (num_prde == (SATA_FSL_MAX_PRD_DIRECT - 1) &&
sg_next(sg) != NULL) { sg_next(sg) != NULL) {
VPRINTK("setting indirect prde\n");
prd_ptr_to_indirect_ext = prd; prd_ptr_to_indirect_ext = prd;
prd->dba = cpu_to_le32(indirect_ext_segment_paddr); prd->dba = cpu_to_le32(indirect_ext_segment_paddr);
indirect_ext_segment_sz = 0; indirect_ext_segment_sz = 0;
@ -481,9 +479,6 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
prd->dba = cpu_to_le32(sg_addr); prd->dba = cpu_to_le32(sg_addr);
prd->ddc_and_ext = cpu_to_le32(data_snoop | (sg_len & ~0x03)); prd->ddc_and_ext = cpu_to_le32(data_snoop | (sg_len & ~0x03));
VPRINTK("sg_fill, ttl=%d, dba=0x%x, ddc=0x%x\n",
ttl_dwords, prd->dba, prd->ddc_and_ext);
++num_prde; ++num_prde;
++prd; ++prd;
if (prd_ptr_to_indirect_ext) if (prd_ptr_to_indirect_ext)
@ -508,7 +503,7 @@ static enum ata_completion_errors sata_fsl_qc_prep(struct ata_queued_cmd *qc)
struct sata_fsl_port_priv *pp = ap->private_data; struct sata_fsl_port_priv *pp = ap->private_data;
struct sata_fsl_host_priv *host_priv = ap->host->private_data; struct sata_fsl_host_priv *host_priv = ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base; void __iomem *hcr_base = host_priv->hcr_base;
unsigned int tag = sata_fsl_tag(qc->hw_tag, hcr_base); unsigned int tag = sata_fsl_tag(ap, qc->hw_tag, hcr_base);
struct command_desc *cd; struct command_desc *cd;
u32 desc_info = CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE; u32 desc_info = CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE;
u32 num_prde = 0; u32 num_prde = 0;
@ -520,19 +515,11 @@ static enum ata_completion_errors sata_fsl_qc_prep(struct ata_queued_cmd *qc)
ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, (u8 *) &cd->cfis); ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, (u8 *) &cd->cfis);
VPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x\n",
cd->cfis[0], cd->cfis[1], cd->cfis[2]);
if (qc->tf.protocol == ATA_PROT_NCQ) {
VPRINTK("FPDMA xfer,Sctor cnt[0:7],[8:15] = %d,%d\n",
cd->cfis[3], cd->cfis[11]);
}
/* setup "ACMD - atapi command" in cmd. desc. if this is ATAPI cmd */ /* setup "ACMD - atapi command" in cmd. desc. if this is ATAPI cmd */
if (ata_is_atapi(qc->tf.protocol)) { if (ata_is_atapi(qc->tf.protocol)) {
desc_info |= ATAPI_CMD; desc_info |= ATAPI_CMD;
memset((void *)&cd->acmd, 0, 32); memset(&cd->cdb, 0, sizeof(cd->cdb));
memcpy((void *)&cd->acmd, qc->cdb, qc->dev->cdb_len); memcpy(&cd->cdb, qc->cdb, qc->dev->cdb_len);
} }
if (qc->flags & ATA_QCFLAG_DMAMAP) if (qc->flags & ATA_QCFLAG_DMAMAP)
@ -543,10 +530,10 @@ static enum ata_completion_errors sata_fsl_qc_prep(struct ata_queued_cmd *qc)
if (qc->tf.protocol == ATA_PROT_NCQ) if (qc->tf.protocol == ATA_PROT_NCQ)
desc_info |= FPDMA_QUEUED_CMD; desc_info |= FPDMA_QUEUED_CMD;
sata_fsl_setup_cmd_hdr_entry(pp, tag, desc_info, ttl_dwords, sata_fsl_setup_cmd_hdr_entry(ap, pp, tag, desc_info, ttl_dwords,
num_prde, 5); num_prde, 5);
VPRINTK("SATA FSL : xx_qc_prep, di = 0x%x, ttl = %d, num_prde = %d\n", ata_port_dbg(ap, "SATA FSL : di = 0x%x, ttl = %d, num_prde = %d\n",
desc_info, ttl_dwords, num_prde); desc_info, ttl_dwords, num_prde);
return AC_ERR_OK; return AC_ERR_OK;
@ -557,9 +544,9 @@ static unsigned int sata_fsl_qc_issue(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
struct sata_fsl_host_priv *host_priv = ap->host->private_data; struct sata_fsl_host_priv *host_priv = ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base; void __iomem *hcr_base = host_priv->hcr_base;
unsigned int tag = sata_fsl_tag(qc->hw_tag, hcr_base); unsigned int tag = sata_fsl_tag(ap, qc->hw_tag, hcr_base);
VPRINTK("xx_qc_issue called,CQ=0x%x,CA=0x%x,CE=0x%x,CC=0x%x\n", ata_port_dbg(ap, "CQ=0x%x,CA=0x%x,CE=0x%x,CC=0x%x\n",
ioread32(CQ + hcr_base), ioread32(CQ + hcr_base),
ioread32(CA + hcr_base), ioread32(CA + hcr_base),
ioread32(CE + hcr_base), ioread32(CC + hcr_base)); ioread32(CE + hcr_base), ioread32(CC + hcr_base));
@ -569,10 +556,10 @@ static unsigned int sata_fsl_qc_issue(struct ata_queued_cmd *qc)
/* Simply queue command to the controller/device */ /* Simply queue command to the controller/device */
iowrite32(1 << tag, CQ + hcr_base); iowrite32(1 << tag, CQ + hcr_base);
VPRINTK("xx_qc_issue called, tag=%d, CQ=0x%x, CA=0x%x\n", ata_port_dbg(ap, "tag=%d, CQ=0x%x, CA=0x%x\n",
tag, ioread32(CQ + hcr_base), ioread32(CA + hcr_base)); tag, ioread32(CQ + hcr_base), ioread32(CA + hcr_base));
VPRINTK("CE=0x%x, DE=0x%x, CC=0x%x, CmdStat = 0x%x\n", ata_port_dbg(ap, "CE=0x%x, DE=0x%x, CC=0x%x, CmdStat = 0x%x\n",
ioread32(CE + hcr_base), ioread32(CE + hcr_base),
ioread32(DE + hcr_base), ioread32(DE + hcr_base),
ioread32(CC + hcr_base), ioread32(CC + hcr_base),
@ -586,7 +573,7 @@ static bool sata_fsl_qc_fill_rtf(struct ata_queued_cmd *qc)
struct sata_fsl_port_priv *pp = qc->ap->private_data; struct sata_fsl_port_priv *pp = qc->ap->private_data;
struct sata_fsl_host_priv *host_priv = qc->ap->host->private_data; struct sata_fsl_host_priv *host_priv = qc->ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base; void __iomem *hcr_base = host_priv->hcr_base;
unsigned int tag = sata_fsl_tag(qc->hw_tag, hcr_base); unsigned int tag = sata_fsl_tag(qc->ap, qc->hw_tag, hcr_base);
struct command_desc *cd; struct command_desc *cd;
cd = pp->cmdentry + tag; cd = pp->cmdentry + tag;
@ -613,7 +600,7 @@ static int sata_fsl_scr_write(struct ata_link *link,
return -EINVAL; return -EINVAL;
} }
VPRINTK("xx_scr_write, reg_in = %d\n", sc_reg); ata_link_dbg(link, "reg_in = %d\n", sc_reg);
iowrite32(val, ssr_base + (sc_reg * 4)); iowrite32(val, ssr_base + (sc_reg * 4));
return 0; return 0;
@ -637,7 +624,7 @@ static int sata_fsl_scr_read(struct ata_link *link,
return -EINVAL; return -EINVAL;
} }
VPRINTK("xx_scr_read, reg_in = %d\n", sc_reg); ata_link_dbg(link, "reg_in = %d\n", sc_reg);
*val = ioread32(ssr_base + (sc_reg * 4)); *val = ioread32(ssr_base + (sc_reg * 4));
return 0; return 0;
@ -649,18 +636,18 @@ static void sata_fsl_freeze(struct ata_port *ap)
void __iomem *hcr_base = host_priv->hcr_base; void __iomem *hcr_base = host_priv->hcr_base;
u32 temp; u32 temp;
VPRINTK("xx_freeze, CQ=0x%x, CA=0x%x, CE=0x%x, DE=0x%x\n", ata_port_dbg(ap, "CQ=0x%x, CA=0x%x, CE=0x%x, DE=0x%x\n",
ioread32(CQ + hcr_base), ioread32(CQ + hcr_base),
ioread32(CA + hcr_base), ioread32(CA + hcr_base),
ioread32(CE + hcr_base), ioread32(DE + hcr_base)); ioread32(CE + hcr_base), ioread32(DE + hcr_base));
VPRINTK("CmdStat = 0x%x\n", ata_port_dbg(ap, "CmdStat = 0x%x\n",
ioread32(host_priv->csr_base + COMMANDSTAT)); ioread32(host_priv->csr_base + COMMANDSTAT));
/* disable interrupts on the controller/port */ /* disable interrupts on the controller/port */
temp = ioread32(hcr_base + HCONTROL); temp = ioread32(hcr_base + HCONTROL);
iowrite32((temp & ~0x3F), hcr_base + HCONTROL); iowrite32((temp & ~0x3F), hcr_base + HCONTROL);
VPRINTK("in xx_freeze : HControl = 0x%x, HStatus = 0x%x\n", ata_port_dbg(ap, "HControl = 0x%x, HStatus = 0x%x\n",
ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS)); ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS));
} }
@ -673,7 +660,7 @@ static void sata_fsl_thaw(struct ata_port *ap)
/* ack. any pending IRQs for this controller/port */ /* ack. any pending IRQs for this controller/port */
temp = ioread32(hcr_base + HSTATUS); temp = ioread32(hcr_base + HSTATUS);
VPRINTK("xx_thaw, pending IRQs = 0x%x\n", (temp & 0x3F)); ata_port_dbg(ap, "pending IRQs = 0x%x\n", (temp & 0x3F));
if (temp & 0x3F) if (temp & 0x3F)
iowrite32((temp & 0x3F), hcr_base + HSTATUS); iowrite32((temp & 0x3F), hcr_base + HSTATUS);
@ -682,7 +669,7 @@ static void sata_fsl_thaw(struct ata_port *ap)
temp = ioread32(hcr_base + HCONTROL); temp = ioread32(hcr_base + HCONTROL);
iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL); iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL);
VPRINTK("xx_thaw : HControl = 0x%x, HStatus = 0x%x\n", ata_port_dbg(ap, "HControl = 0x%x, HStatus = 0x%x\n",
ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS)); ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS));
} }
@ -744,8 +731,9 @@ static int sata_fsl_port_start(struct ata_port *ap)
ap->private_data = pp; ap->private_data = pp;
VPRINTK("CHBA = 0x%x, cmdentry_phys = 0x%x\n", ata_port_dbg(ap, "CHBA = 0x%lx, cmdentry_phys = 0x%lx\n",
pp->cmdslot_paddr, pp->cmdentry_paddr); (unsigned long)pp->cmdslot_paddr,
(unsigned long)pp->cmdentry_paddr);
/* Now, update the CHBA register in host controller cmd register set */ /* Now, update the CHBA register in host controller cmd register set */
iowrite32(pp->cmdslot_paddr & 0xffffffff, hcr_base + CHBA); iowrite32(pp->cmdslot_paddr & 0xffffffff, hcr_base + CHBA);
@ -761,9 +749,9 @@ static int sata_fsl_port_start(struct ata_port *ap)
temp = ioread32(hcr_base + HCONTROL); temp = ioread32(hcr_base + HCONTROL);
iowrite32((temp | HCONTROL_ONLINE_PHY_RST), hcr_base + HCONTROL); iowrite32((temp | HCONTROL_ONLINE_PHY_RST), hcr_base + HCONTROL);
VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); ata_port_dbg(ap, "HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS));
VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); ata_port_dbg(ap, "HControl = 0x%x\n", ioread32(hcr_base + HCONTROL));
VPRINTK("CHBA = 0x%x\n", ioread32(hcr_base + CHBA)); ata_port_dbg(ap, "CHBA = 0x%x\n", ioread32(hcr_base + CHBA));
return 0; return 0;
} }
@ -803,16 +791,15 @@ static unsigned int sata_fsl_dev_classify(struct ata_port *ap)
temp = ioread32(hcr_base + SIGNATURE); temp = ioread32(hcr_base + SIGNATURE);
VPRINTK("raw sig = 0x%x\n", temp); ata_port_dbg(ap, "HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS));
VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); ata_port_dbg(ap, "HControl = 0x%x\n", ioread32(hcr_base + HCONTROL));
VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL));
tf.lbah = (temp >> 24) & 0xff; tf.lbah = (temp >> 24) & 0xff;
tf.lbam = (temp >> 16) & 0xff; tf.lbam = (temp >> 16) & 0xff;
tf.lbal = (temp >> 8) & 0xff; tf.lbal = (temp >> 8) & 0xff;
tf.nsect = temp & 0xff; tf.nsect = temp & 0xff;
return ata_dev_classify(&tf); return ata_port_classify(ap, &tf);
} }
static int sata_fsl_hardreset(struct ata_link *link, unsigned int *class, static int sata_fsl_hardreset(struct ata_link *link, unsigned int *class,
@ -825,8 +812,6 @@ static int sata_fsl_hardreset(struct ata_link *link, unsigned int *class,
int i = 0; int i = 0;
unsigned long start_jiffies; unsigned long start_jiffies;
DPRINTK("in xx_hardreset\n");
try_offline_again: try_offline_again:
/* /*
* Force host controller to go off-line, aborting current operations * Force host controller to go off-line, aborting current operations
@ -852,9 +837,10 @@ try_offline_again:
goto try_offline_again; goto try_offline_again;
} }
DPRINTK("hardreset, controller off-lined\n"); ata_port_dbg(ap, "hardreset, controller off-lined\n"
VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); "HStatus = 0x%x HControl = 0x%x\n",
VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); ioread32(hcr_base + HSTATUS),
ioread32(hcr_base + HCONTROL));
/* /*
* PHY reset should remain asserted for atleast 1ms * PHY reset should remain asserted for atleast 1ms
@ -882,9 +868,10 @@ try_offline_again:
goto err; goto err;
} }
DPRINTK("hardreset, controller off-lined & on-lined\n"); ata_port_dbg(ap, "controller off-lined & on-lined\n"
VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); "HStatus = 0x%x HControl = 0x%x\n",
VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); ioread32(hcr_base + HSTATUS),
ioread32(hcr_base + HCONTROL));
/* /*
* First, wait for the PHYRDY change to occur before waiting for * First, wait for the PHYRDY change to occur before waiting for
@ -941,10 +928,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
u8 *cfis; u8 *cfis;
u32 Serror; u32 Serror;
DPRINTK("in xx_softreset\n");
if (ata_link_offline(link)) { if (ata_link_offline(link)) {
DPRINTK("PHY reports no device\n");
*class = ATA_DEV_NONE; *class = ATA_DEV_NONE;
return 0; return 0;
} }
@ -957,19 +941,17 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
* reached here, we can send a command to the target device * reached here, we can send a command to the target device
*/ */
DPRINTK("Sending SRST/device reset\n");
ata_tf_init(link->device, &tf); ata_tf_init(link->device, &tf);
cfis = (u8 *) &pp->cmdentry->cfis; cfis = (u8 *) &pp->cmdentry->cfis;
/* device reset/SRST is a control register update FIS, uses tag0 */ /* device reset/SRST is a control register update FIS, uses tag0 */
sata_fsl_setup_cmd_hdr_entry(pp, 0, sata_fsl_setup_cmd_hdr_entry(ap, pp, 0,
SRST_CMD | CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE, 0, 0, 5); SRST_CMD | CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE, 0, 0, 5);
tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */ tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */
ata_tf_to_fis(&tf, pmp, 0, cfis); ata_tf_to_fis(&tf, pmp, 0, cfis);
DPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x, 0x%x\n", ata_port_dbg(ap, "Dumping cfis : 0x%x, 0x%x, 0x%x, 0x%x\n",
cfis[0], cfis[1], cfis[2], cfis[3]); cfis[0], cfis[1], cfis[2], cfis[3]);
/* /*
@ -977,7 +959,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
* other commands are active on the controller/device * other commands are active on the controller/device
*/ */
DPRINTK("@Softreset, CQ = 0x%x, CA = 0x%x, CC = 0x%x\n", ata_port_dbg(ap, "CQ = 0x%x, CA = 0x%x, CC = 0x%x\n",
ioread32(CQ + hcr_base), ioread32(CQ + hcr_base),
ioread32(CA + hcr_base), ioread32(CC + hcr_base)); ioread32(CA + hcr_base), ioread32(CC + hcr_base));
@ -990,15 +972,16 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
if (temp & 0x1) { if (temp & 0x1) {
ata_port_warn(ap, "ATA_SRST issue failed\n"); ata_port_warn(ap, "ATA_SRST issue failed\n");
DPRINTK("Softreset@5000,CQ=0x%x,CA=0x%x,CC=0x%x\n", ata_port_dbg(ap, "Softreset@5000,CQ=0x%x,CA=0x%x,CC=0x%x\n",
ioread32(CQ + hcr_base), ioread32(CQ + hcr_base),
ioread32(CA + hcr_base), ioread32(CC + hcr_base)); ioread32(CA + hcr_base), ioread32(CC + hcr_base));
sata_fsl_scr_read(&ap->link, SCR_ERROR, &Serror); sata_fsl_scr_read(&ap->link, SCR_ERROR, &Serror);
DPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); ata_port_dbg(ap, "HStatus = 0x%x HControl = 0x%x Serror = 0x%x\n",
DPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); ioread32(hcr_base + HSTATUS),
DPRINTK("Serror = 0x%x\n", Serror); ioread32(hcr_base + HCONTROL),
Serror);
goto err; goto err;
} }
@ -1012,8 +995,9 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
* using ATA signature D2H register FIS to the host controller. * using ATA signature D2H register FIS to the host controller.
*/ */
sata_fsl_setup_cmd_hdr_entry(pp, 0, CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE, sata_fsl_setup_cmd_hdr_entry(ap, pp, 0,
0, 0, 5); CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE,
0, 0, 5);
tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */ tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */
ata_tf_to_fis(&tf, pmp, 0, cfis); ata_tf_to_fis(&tf, pmp, 0, cfis);
@ -1030,8 +1014,6 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
*/ */
iowrite32(0x01, CC + hcr_base); /* We know it will be cmd#0 always */ iowrite32(0x01, CC + hcr_base); /* We know it will be cmd#0 always */
DPRINTK("SATA FSL : Now checking device signature\n");
*class = ATA_DEV_NONE; *class = ATA_DEV_NONE;
/* Verify if SStatus indicates device presence */ /* Verify if SStatus indicates device presence */
@ -1045,9 +1027,8 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
*class = sata_fsl_dev_classify(ap); *class = sata_fsl_dev_classify(ap);
DPRINTK("class = %d\n", *class); ata_port_dbg(ap, "ccreg = 0x%x\n", ioread32(hcr_base + CC));
VPRINTK("ccreg = 0x%x\n", ioread32(hcr_base + CC)); ata_port_dbg(ap, "cereg = 0x%x\n", ioread32(hcr_base + CE));
VPRINTK("cereg = 0x%x\n", ioread32(hcr_base + CE));
} }
return 0; return 0;
@ -1058,10 +1039,7 @@ err:
static void sata_fsl_error_handler(struct ata_port *ap) static void sata_fsl_error_handler(struct ata_port *ap)
{ {
DPRINTK("in xx_error_handler\n");
sata_pmp_error_handler(ap); sata_pmp_error_handler(ap);
} }
static void sata_fsl_post_internal_cmd(struct ata_queued_cmd *qc) static void sata_fsl_post_internal_cmd(struct ata_queued_cmd *qc)
@ -1102,7 +1080,7 @@ static void sata_fsl_error_intr(struct ata_port *ap)
if (unlikely(SError & 0xFFFF0000)) if (unlikely(SError & 0xFFFF0000))
sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); sata_fsl_scr_write(&ap->link, SCR_ERROR, SError);
DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", ata_port_dbg(ap, "hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n",
hstatus, cereg, ioread32(hcr_base + DE), SError); hstatus, cereg, ioread32(hcr_base + DE), SError);
/* handle fatal errors */ /* handle fatal errors */
@ -1119,7 +1097,7 @@ static void sata_fsl_error_intr(struct ata_port *ap)
/* Handle PHYRDY change notification */ /* Handle PHYRDY change notification */
if (hstatus & INT_ON_PHYRDY_CHG) { if (hstatus & INT_ON_PHYRDY_CHG) {
DPRINTK("SATA FSL: PHYRDY change indication\n"); ata_port_dbg(ap, "PHYRDY change indication\n");
/* Setup a soft-reset EH action */ /* Setup a soft-reset EH action */
ata_ehi_hotplugged(ehi); ata_ehi_hotplugged(ehi);
@ -1140,7 +1118,7 @@ static void sata_fsl_error_intr(struct ata_port *ap)
*/ */
abort = 1; abort = 1;
DPRINTK("single device error, CE=0x%x, DE=0x%x\n", ata_port_dbg(ap, "single device error, CE=0x%x, DE=0x%x\n",
ioread32(hcr_base + CE), ioread32(hcr_base + DE)); ioread32(hcr_base + CE), ioread32(hcr_base + DE));
/* find out the offending link and qc */ /* find out the offending link and qc */
@ -1245,18 +1223,18 @@ static void sata_fsl_host_intr(struct ata_port *ap)
} }
if (unlikely(SError & 0xFFFF0000)) { if (unlikely(SError & 0xFFFF0000)) {
DPRINTK("serror @host_intr : 0x%x\n", SError); ata_port_dbg(ap, "serror @host_intr : 0x%x\n", SError);
sata_fsl_error_intr(ap); sata_fsl_error_intr(ap);
} }
if (unlikely(hstatus & status_mask)) { if (unlikely(hstatus & status_mask)) {
DPRINTK("error interrupt!!\n"); ata_port_dbg(ap, "error interrupt!!\n");
sata_fsl_error_intr(ap); sata_fsl_error_intr(ap);
return; return;
} }
VPRINTK("Status of all queues :\n"); ata_port_dbg(ap, "Status of all queues :\n");
VPRINTK("done_mask/CC = 0x%x, CA = 0x%x, CE=0x%x,CQ=0x%x,apqa=0x%llx\n", ata_port_dbg(ap, "done_mask/CC = 0x%x, CA = 0x%x, CE=0x%x,CQ=0x%x,apqa=0x%llx\n",
done_mask, done_mask,
ioread32(hcr_base + CA), ioread32(hcr_base + CA),
ioread32(hcr_base + CE), ioread32(hcr_base + CE),
@ -1268,15 +1246,13 @@ static void sata_fsl_host_intr(struct ata_port *ap)
/* clear CC bit, this will also complete the interrupt */ /* clear CC bit, this will also complete the interrupt */
iowrite32(done_mask, hcr_base + CC); iowrite32(done_mask, hcr_base + CC);
DPRINTK("Status of all queues :\n"); ata_port_dbg(ap, "Status of all queues: done_mask/CC = 0x%x, CA = 0x%x, CE=0x%x\n",
DPRINTK("done_mask/CC = 0x%x, CA = 0x%x, CE=0x%x\n",
done_mask, ioread32(hcr_base + CA), done_mask, ioread32(hcr_base + CA),
ioread32(hcr_base + CE)); ioread32(hcr_base + CE));
for (i = 0; i < SATA_FSL_QUEUE_DEPTH; i++) { for (i = 0; i < SATA_FSL_QUEUE_DEPTH; i++) {
if (done_mask & (1 << i)) if (done_mask & (1 << i))
DPRINTK ata_port_dbg(ap, "completing ncq cmd,tag=%d,CC=0x%x,CA=0x%x\n",
("completing ncq cmd,tag=%d,CC=0x%x,CA=0x%x\n",
i, ioread32(hcr_base + CC), i, ioread32(hcr_base + CC),
ioread32(hcr_base + CA)); ioread32(hcr_base + CA));
} }
@ -1287,7 +1263,7 @@ static void sata_fsl_host_intr(struct ata_port *ap)
iowrite32(1, hcr_base + CC); iowrite32(1, hcr_base + CC);
qc = ata_qc_from_tag(ap, ATA_TAG_INTERNAL); qc = ata_qc_from_tag(ap, ATA_TAG_INTERNAL);
DPRINTK("completing non-ncq cmd, CC=0x%x\n", ata_port_dbg(ap, "completing non-ncq cmd, CC=0x%x\n",
ioread32(hcr_base + CC)); ioread32(hcr_base + CC));
if (qc) { if (qc) {
@ -1295,7 +1271,7 @@ static void sata_fsl_host_intr(struct ata_port *ap)
} }
} else { } else {
/* Spurious Interrupt!! */ /* Spurious Interrupt!! */
DPRINTK("spurious interrupt!!, CC = 0x%x\n", ata_port_dbg(ap, "spurious interrupt!!, CC = 0x%x\n",
ioread32(hcr_base + CC)); ioread32(hcr_base + CC));
iowrite32(done_mask, hcr_base + CC); iowrite32(done_mask, hcr_base + CC);
return; return;
@ -1315,8 +1291,6 @@ static irqreturn_t sata_fsl_interrupt(int irq, void *dev_instance)
interrupt_enables = ioread32(hcr_base + HSTATUS); interrupt_enables = ioread32(hcr_base + HSTATUS);
interrupt_enables &= 0x3F; interrupt_enables &= 0x3F;
DPRINTK("interrupt status 0x%x\n", interrupt_enables);
if (!interrupt_enables) if (!interrupt_enables)
return IRQ_NONE; return IRQ_NONE;
@ -1369,7 +1343,7 @@ static int sata_fsl_init_controller(struct ata_host *host)
iowrite32((temp & ~0x3F), hcr_base + HCONTROL); iowrite32((temp & ~0x3F), hcr_base + HCONTROL);
/* Disable interrupt coalescing control(icc), for the moment */ /* Disable interrupt coalescing control(icc), for the moment */
DPRINTK("icc = 0x%x\n", ioread32(hcr_base + ICC)); dev_dbg(host->dev, "icc = 0x%x\n", ioread32(hcr_base + ICC));
iowrite32(0x01000000, hcr_base + ICC); iowrite32(0x01000000, hcr_base + ICC);
/* clear error registers, SError is cleared by libATA */ /* clear error registers, SError is cleared by libATA */
@ -1388,8 +1362,8 @@ static int sata_fsl_init_controller(struct ata_host *host)
* callback, that should also initiate the OOB, COMINIT sequence * callback, that should also initiate the OOB, COMINIT sequence
*/ */
DPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); dev_dbg(host->dev, "HStatus = 0x%x HControl = 0x%x\n",
DPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); ioread32(hcr_base + HSTATUS), ioread32(hcr_base + HCONTROL));
return 0; return 0;
} }
@ -1406,8 +1380,7 @@ static void sata_fsl_host_stop(struct ata_host *host)
* scsi mid-layer and libata interface structures * scsi mid-layer and libata interface structures
*/ */
static struct scsi_host_template sata_fsl_sht = { static struct scsi_host_template sata_fsl_sht = {
ATA_NCQ_SHT("sata_fsl"), ATA_NCQ_SHT_QD("sata_fsl", SATA_FSL_QUEUE_DEPTH),
.can_queue = SATA_FSL_QUEUE_DEPTH,
.sg_tablesize = SATA_FSL_MAX_PRD_USABLE, .sg_tablesize = SATA_FSL_MAX_PRD_USABLE,
.dma_boundary = ATA_DMA_BOUNDARY, .dma_boundary = ATA_DMA_BOUNDARY,
}; };
@ -1478,9 +1451,8 @@ static int sata_fsl_probe(struct platform_device *ofdev)
iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG); iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG);
} }
DPRINTK("@reset i/o = 0x%x\n", ioread32(csr_base + TRANSCFG)); dev_dbg(&ofdev->dev, "@reset i/o = 0x%x\n",
DPRINTK("sizeof(cmd_desc) = %d\n", sizeof(struct command_desc)); ioread32(csr_base + TRANSCFG));
DPRINTK("sizeof(#define cmd_desc) = %d\n", SATA_FSL_CMD_DESC_SIZE);
host_priv = kzalloc(sizeof(struct sata_fsl_host_priv), GFP_KERNEL); host_priv = kzalloc(sizeof(struct sata_fsl_host_priv), GFP_KERNEL);
if (!host_priv) if (!host_priv)

4
drivers/ata/sata_gemini.c
View file

@ -253,12 +253,12 @@ static int gemini_sata_bridge_init(struct sata_gemini *sg)
ret = clk_prepare_enable(sg->sata0_pclk); ret = clk_prepare_enable(sg->sata0_pclk);
if (ret) { if (ret) {
pr_err("failed to enable SATA0 PCLK\n"); dev_err(dev, "failed to enable SATA0 PCLK\n");
return ret; return ret;
} }
ret = clk_prepare_enable(sg->sata1_pclk); ret = clk_prepare_enable(sg->sata1_pclk);
if (ret) { if (ret) {
pr_err("failed to enable SATA1 PCLK\n"); dev_err(dev, "failed to enable SATA1 PCLK\n");
clk_disable_unprepare(sg->sata0_pclk); clk_disable_unprepare(sg->sata0_pclk);
return ret; return ret;
} }

4
drivers/ata/sata_inic162x.c
View file

@ -488,8 +488,6 @@ static enum ata_completion_errors inic_qc_prep(struct ata_queued_cmd *qc)
bool is_data = ata_is_data(qc->tf.protocol); bool is_data = ata_is_data(qc->tf.protocol);
unsigned int cdb_len = 0; unsigned int cdb_len = 0;
VPRINTK("ENTER\n");
if (is_atapi) if (is_atapi)
cdb_len = qc->dev->cdb_len; cdb_len = qc->dev->cdb_len;
@ -657,7 +655,7 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
} }
inic_tf_read(ap, &tf); inic_tf_read(ap, &tf);
*class = ata_dev_classify(&tf); *class = ata_port_classify(ap, &tf);
} }
return 0; return 0;

132
drivers/ata/sata_mv.c
View file

@ -579,7 +579,7 @@ struct mv_hw_ops {
void (*enable_leds)(struct mv_host_priv *hpriv, void __iomem *mmio); void (*enable_leds)(struct mv_host_priv *hpriv, void __iomem *mmio);
void (*read_preamp)(struct mv_host_priv *hpriv, int idx, void (*read_preamp)(struct mv_host_priv *hpriv, int idx,
void __iomem *mmio); void __iomem *mmio);
int (*reset_hc)(struct mv_host_priv *hpriv, void __iomem *mmio, int (*reset_hc)(struct ata_host *host, void __iomem *mmio,
unsigned int n_hc); unsigned int n_hc);
void (*reset_flash)(struct mv_host_priv *hpriv, void __iomem *mmio); void (*reset_flash)(struct mv_host_priv *hpriv, void __iomem *mmio);
void (*reset_bus)(struct ata_host *host, void __iomem *mmio); void (*reset_bus)(struct ata_host *host, void __iomem *mmio);
@ -606,7 +606,7 @@ static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
static void mv5_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio); static void mv5_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio);
static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx, static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx,
void __iomem *mmio); void __iomem *mmio);
static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, static int mv5_reset_hc(struct ata_host *host, void __iomem *mmio,
unsigned int n_hc); unsigned int n_hc);
static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio); static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio);
static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio); static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio);
@ -616,14 +616,14 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
static void mv6_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio); static void mv6_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio);
static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx, static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx,
void __iomem *mmio); void __iomem *mmio);
static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, static int mv6_reset_hc(struct ata_host *host, void __iomem *mmio,
unsigned int n_hc); unsigned int n_hc);
static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio); static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio);
static void mv_soc_enable_leds(struct mv_host_priv *hpriv, static void mv_soc_enable_leds(struct mv_host_priv *hpriv,
void __iomem *mmio); void __iomem *mmio);
static void mv_soc_read_preamp(struct mv_host_priv *hpriv, int idx, static void mv_soc_read_preamp(struct mv_host_priv *hpriv, int idx,
void __iomem *mmio); void __iomem *mmio);
static int mv_soc_reset_hc(struct mv_host_priv *hpriv, static int mv_soc_reset_hc(struct ata_host *host,
void __iomem *mmio, unsigned int n_hc); void __iomem *mmio, unsigned int n_hc);
static void mv_soc_reset_flash(struct mv_host_priv *hpriv, static void mv_soc_reset_flash(struct mv_host_priv *hpriv,
void __iomem *mmio); void __iomem *mmio);
@ -1248,81 +1248,74 @@ static int mv_stop_edma(struct ata_port *ap)
return err; return err;
} }
#ifdef ATA_DEBUG static void mv_dump_mem(struct device *dev, void __iomem *start, unsigned bytes)
static void mv_dump_mem(void __iomem *start, unsigned bytes)
{ {
int b, w; int b, w, o;
unsigned char linebuf[38];
for (b = 0; b < bytes; ) { for (b = 0; b < bytes; ) {
DPRINTK("%p: ", start + b); for (w = 0, o = 0; b < bytes && w < 4; w++) {
for (w = 0; b < bytes && w < 4; w++) { o += snprintf(linebuf + o, sizeof(linebuf) - o,
printk("%08x ", readl(start + b)); "%08x ", readl(start + b));
b += sizeof(u32); b += sizeof(u32);
} }
printk("\n"); dev_dbg(dev, "%s: %p: %s\n",
__func__, start + b, linebuf);
} }
} }
#endif
#if defined(ATA_DEBUG) || defined(CONFIG_PCI)
static void mv_dump_pci_cfg(struct pci_dev *pdev, unsigned bytes) static void mv_dump_pci_cfg(struct pci_dev *pdev, unsigned bytes)
{ {
#ifdef ATA_DEBUG int b, w, o;
int b, w; u32 dw = 0;
u32 dw; unsigned char linebuf[38];
for (b = 0; b < bytes; ) { for (b = 0; b < bytes; ) {
DPRINTK("%02x: ", b); for (w = 0, o = 0; b < bytes && w < 4; w++) {
for (w = 0; b < bytes && w < 4; w++) {
(void) pci_read_config_dword(pdev, b, &dw); (void) pci_read_config_dword(pdev, b, &dw);
printk("%08x ", dw); o += snprintf(linebuf + o, sizeof(linebuf) - o,
"%08x ", dw);
b += sizeof(u32); b += sizeof(u32);
} }
printk("\n"); dev_dbg(&pdev->dev, "%s: %02x: %s\n",
__func__, b, linebuf);
} }
#endif
} }
#endif
static void mv_dump_all_regs(void __iomem *mmio_base, int port, static void mv_dump_all_regs(void __iomem *mmio_base,
struct pci_dev *pdev) struct pci_dev *pdev)
{ {
#ifdef ATA_DEBUG void __iomem *hc_base;
void __iomem *hc_base = mv_hc_base(mmio_base,
port >> MV_PORT_HC_SHIFT);
void __iomem *port_base; void __iomem *port_base;
int start_port, num_ports, p, start_hc, num_hcs, hc; int start_port, num_ports, p, start_hc, num_hcs, hc;
if (0 > port) { start_hc = start_port = 0;
start_hc = start_port = 0; num_ports = 8; /* should be benign for 4 port devs */
num_ports = 8; /* shld be benign for 4 port devs */ num_hcs = 2;
num_hcs = 2; dev_dbg(&pdev->dev,
} else { "%s: All registers for port(s) %u-%u:\n", __func__,
start_hc = port >> MV_PORT_HC_SHIFT; start_port, num_ports > 1 ? num_ports - 1 : start_port);
start_port = port;
num_ports = num_hcs = 1;
}
DPRINTK("All registers for port(s) %u-%u:\n", start_port,
num_ports > 1 ? num_ports - 1 : start_port);
if (NULL != pdev) { dev_dbg(&pdev->dev, "%s: PCI config space regs:\n", __func__);
DPRINTK("PCI config space regs:\n"); mv_dump_pci_cfg(pdev, 0x68);
mv_dump_pci_cfg(pdev, 0x68);
} dev_dbg(&pdev->dev, "%s: PCI regs:\n", __func__);
DPRINTK("PCI regs:\n"); mv_dump_mem(&pdev->dev, mmio_base+0xc00, 0x3c);
mv_dump_mem(mmio_base+0xc00, 0x3c); mv_dump_mem(&pdev->dev, mmio_base+0xd00, 0x34);
mv_dump_mem(mmio_base+0xd00, 0x34); mv_dump_mem(&pdev->dev, mmio_base+0xf00, 0x4);
mv_dump_mem(mmio_base+0xf00, 0x4); mv_dump_mem(&pdev->dev, mmio_base+0x1d00, 0x6c);
mv_dump_mem(mmio_base+0x1d00, 0x6c);
for (hc = start_hc; hc < start_hc + num_hcs; hc++) { for (hc = start_hc; hc < start_hc + num_hcs; hc++) {
hc_base = mv_hc_base(mmio_base, hc); hc_base = mv_hc_base(mmio_base, hc);
DPRINTK("HC regs (HC %i):\n", hc); dev_dbg(&pdev->dev, "%s: HC regs (HC %i):\n", __func__, hc);
mv_dump_mem(hc_base, 0x1c); mv_dump_mem(&pdev->dev, hc_base, 0x1c);
} }
for (p = start_port; p < start_port + num_ports; p++) { for (p = start_port; p < start_port + num_ports; p++) {
port_base = mv_port_base(mmio_base, p); port_base = mv_port_base(mmio_base, p);
DPRINTK("EDMA regs (port %i):\n", p); dev_dbg(&pdev->dev, "%s: EDMA regs (port %i):\n", __func__, p);
mv_dump_mem(port_base, 0x54); mv_dump_mem(&pdev->dev, port_base, 0x54);
DPRINTK("SATA regs (port %i):\n", p); dev_dbg(&pdev->dev, "%s: SATA regs (port %i):\n", __func__, p);
mv_dump_mem(port_base+0x300, 0x60); mv_dump_mem(&pdev->dev, port_base+0x300, 0x60);
} }
#endif
} }
static unsigned int mv_scr_offset(unsigned int sc_reg_in) static unsigned int mv_scr_offset(unsigned int sc_reg_in)
@ -2962,8 +2955,8 @@ static int mv_pci_error(struct ata_host *host, void __iomem *mmio)
dev_err(host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n", err_cause); dev_err(host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n", err_cause);
DPRINTK("All regs @ PCI error\n"); dev_dbg(host->dev, "%s: All regs @ PCI error\n", __func__);
mv_dump_all_regs(mmio, -1, to_pci_dev(host->dev)); mv_dump_all_regs(mmio, to_pci_dev(host->dev));
writelfl(0, mmio + hpriv->irq_cause_offset); writelfl(0, mmio + hpriv->irq_cause_offset);
@ -3201,9 +3194,10 @@ static void mv5_reset_one_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
} }
#undef ZERO #undef ZERO
static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, static int mv5_reset_hc(struct ata_host *host, void __iomem *mmio,
unsigned int n_hc) unsigned int n_hc)
{ {
struct mv_host_priv *hpriv = host->private_data;
unsigned int hc, port; unsigned int hc, port;
for (hc = 0; hc < n_hc; hc++) { for (hc = 0; hc < n_hc; hc++) {
@ -3262,7 +3256,7 @@ static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio)
* LOCKING: * LOCKING:
* Inherited from caller. * Inherited from caller.
*/ */
static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, static int mv6_reset_hc(struct ata_host *host, void __iomem *mmio,
unsigned int n_hc) unsigned int n_hc)
{ {
void __iomem *reg = mmio + PCI_MAIN_CMD_STS; void __iomem *reg = mmio + PCI_MAIN_CMD_STS;
@ -3282,7 +3276,7 @@ static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
break; break;
} }
if (!(PCI_MASTER_EMPTY & t)) { if (!(PCI_MASTER_EMPTY & t)) {
printk(KERN_ERR DRV_NAME ": PCI master won't flush\n"); dev_err(host->dev, "PCI master won't flush\n");
rc = 1; rc = 1;
goto done; goto done;
} }
@ -3296,7 +3290,7 @@ static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
} while (!(GLOB_SFT_RST & t) && (i-- > 0)); } while (!(GLOB_SFT_RST & t) && (i-- > 0));
if (!(GLOB_SFT_RST & t)) { if (!(GLOB_SFT_RST & t)) {
printk(KERN_ERR DRV_NAME ": can't set global reset\n"); dev_err(host->dev, "can't set global reset\n");
rc = 1; rc = 1;
goto done; goto done;
} }
@ -3310,7 +3304,7 @@ static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
} while ((GLOB_SFT_RST & t) && (i-- > 0)); } while ((GLOB_SFT_RST & t) && (i-- > 0));
if (GLOB_SFT_RST & t) { if (GLOB_SFT_RST & t) {
printk(KERN_ERR DRV_NAME ": can't clear global reset\n"); dev_err(host->dev, "can't clear global reset\n");
rc = 1; rc = 1;
} }
done: done:
@ -3479,9 +3473,10 @@ static void mv_soc_reset_one_hc(struct mv_host_priv *hpriv,
#undef ZERO #undef ZERO
static int mv_soc_reset_hc(struct mv_host_priv *hpriv, static int mv_soc_reset_hc(struct ata_host *host,
void __iomem *mmio, unsigned int n_hc) void __iomem *mmio, unsigned int n_hc)
{ {
struct mv_host_priv *hpriv = host->private_data;
unsigned int port; unsigned int port;
for (port = 0; port < hpriv->n_ports; port++) for (port = 0; port < hpriv->n_ports; port++)
@ -3723,11 +3718,6 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
/* unmask all non-transient EDMA error interrupts */ /* unmask all non-transient EDMA error interrupts */
writelfl(~EDMA_ERR_IRQ_TRANSIENT, port_mmio + EDMA_ERR_IRQ_MASK); writelfl(~EDMA_ERR_IRQ_TRANSIENT, port_mmio + EDMA_ERR_IRQ_MASK);
VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n",
readl(port_mmio + EDMA_CFG),
readl(port_mmio + EDMA_ERR_IRQ_CAUSE),
readl(port_mmio + EDMA_ERR_IRQ_MASK));
} }
static unsigned int mv_in_pcix_mode(struct ata_host *host) static unsigned int mv_in_pcix_mode(struct ata_host *host)
@ -3859,11 +3849,11 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
* *
* Warn the user, lest they think we're just buggy. * Warn the user, lest they think we're just buggy.
*/ */
printk(KERN_WARNING DRV_NAME ": Highpoint RocketRAID" dev_warn(&pdev->dev, "Highpoint RocketRAID"
" BIOS CORRUPTS DATA on all attached drives," " BIOS CORRUPTS DATA on all attached drives,"
" regardless of if/how they are configured." " regardless of if/how they are configured."
" BEWARE!\n"); " BEWARE!\n");
printk(KERN_WARNING DRV_NAME ": For data safety, do not" dev_warn(&pdev->dev, "For data safety, do not"
" use sectors 8-9 on \"Legacy\" drives," " use sectors 8-9 on \"Legacy\" drives,"
" and avoid the final two gigabytes on" " and avoid the final two gigabytes on"
" all RocketRAID BIOS initialized drives.\n"); " all RocketRAID BIOS initialized drives.\n");
@ -3954,7 +3944,7 @@ static int mv_init_host(struct ata_host *host)
if (hpriv->ops->read_preamp) if (hpriv->ops->read_preamp)
hpriv->ops->read_preamp(hpriv, port, mmio); hpriv->ops->read_preamp(hpriv, port, mmio);
rc = hpriv->ops->reset_hc(hpriv, mmio, n_hc); rc = hpriv->ops->reset_hc(host, mmio, n_hc);
if (rc) if (rc)
goto done; goto done;
@ -3972,7 +3962,7 @@ static int mv_init_host(struct ata_host *host)
for (hc = 0; hc < n_hc; hc++) { for (hc = 0; hc < n_hc; hc++) {
void __iomem *hc_mmio = mv_hc_base(mmio, hc); void __iomem *hc_mmio = mv_hc_base(mmio, hc);
VPRINTK("HC%i: HC config=0x%08x HC IRQ cause " dev_dbg(host->dev, "HC%i: HC config=0x%08x HC IRQ cause "
"(before clear)=0x%08x\n", hc, "(before clear)=0x%08x\n", hc,
readl(hc_mmio + HC_CFG), readl(hc_mmio + HC_CFG),
readl(hc_mmio + HC_IRQ_CAUSE)); readl(hc_mmio + HC_IRQ_CAUSE));
@ -4270,7 +4260,7 @@ static int mv_platform_resume(struct platform_device *pdev)
/* initialize adapter */ /* initialize adapter */
ret = mv_init_host(host); ret = mv_init_host(host);
if (ret) { if (ret) {
printk(KERN_ERR DRV_NAME ": Error during HW init\n"); dev_err(&pdev->dev, "Error during HW init\n");
return ret; return ret;
} }
ata_host_resume(host); ata_host_resume(host);

54
drivers/ata/sata_nv.c
View file

@ -31,6 +31,7 @@
#include <scsi/scsi_host.h> #include <scsi/scsi_host.h>
#include <scsi/scsi_device.h> #include <scsi/scsi_device.h>
#include <linux/libata.h> #include <linux/libata.h>
#include <trace/events/libata.h>
#define DRV_NAME "sata_nv" #define DRV_NAME "sata_nv"
#define DRV_VERSION "3.5" #define DRV_VERSION "3.5"
@ -808,7 +809,7 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
struct nv_adma_port_priv *pp = ap->private_data; struct nv_adma_port_priv *pp = ap->private_data;
u8 flags = pp->cpb[cpb_num].resp_flags; u8 flags = pp->cpb[cpb_num].resp_flags;
VPRINTK("CPB %d, flags=0x%x\n", cpb_num, flags); ata_port_dbg(ap, "CPB %d, flags=0x%x\n", cpb_num, flags);
if (unlikely((force_err || if (unlikely((force_err ||
flags & (NV_CPB_RESP_ATA_ERR | flags & (NV_CPB_RESP_ATA_ERR |
@ -1100,8 +1101,6 @@ static int nv_adma_port_start(struct ata_port *ap)
struct pci_dev *pdev = to_pci_dev(dev); struct pci_dev *pdev = to_pci_dev(dev);
u16 tmp; u16 tmp;
VPRINTK("ENTER\n");
/* /*
* Ensure DMA mask is set to 32-bit before allocating legacy PRD and * Ensure DMA mask is set to 32-bit before allocating legacy PRD and
* pad buffers. * pad buffers.
@ -1190,7 +1189,6 @@ static void nv_adma_port_stop(struct ata_port *ap)
struct nv_adma_port_priv *pp = ap->private_data; struct nv_adma_port_priv *pp = ap->private_data;
void __iomem *mmio = pp->ctl_block; void __iomem *mmio = pp->ctl_block;
VPRINTK("ENTER\n");
writew(0, mmio + NV_ADMA_CTL); writew(0, mmio + NV_ADMA_CTL);
} }
@ -1252,8 +1250,6 @@ static void nv_adma_setup_port(struct ata_port *ap)
void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
struct ata_ioports *ioport = &ap->ioaddr; struct ata_ioports *ioport = &ap->ioaddr;
VPRINTK("ENTER\n");
mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE; mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE;
ioport->cmd_addr = mmio; ioport->cmd_addr = mmio;
@ -1277,8 +1273,6 @@ static int nv_adma_host_init(struct ata_host *host)
unsigned int i; unsigned int i;
u32 tmp32; u32 tmp32;
VPRINTK("ENTER\n");
/* enable ADMA on the ports */ /* enable ADMA on the ports */
pci_read_config_dword(pdev, NV_MCP_SATA_CFG_20, &tmp32); pci_read_config_dword(pdev, NV_MCP_SATA_CFG_20, &tmp32);
tmp32 |= NV_MCP_SATA_CFG_20_PORT0_EN | tmp32 |= NV_MCP_SATA_CFG_20_PORT0_EN |
@ -1320,8 +1314,6 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb)
struct scatterlist *sg; struct scatterlist *sg;
unsigned int si; unsigned int si;
VPRINTK("ENTER\n");
for_each_sg(qc->sg, sg, qc->n_elem, si) { for_each_sg(qc->sg, sg, qc->n_elem, si) {
aprd = (si < 5) ? &cpb->aprd[si] : aprd = (si < 5) ? &cpb->aprd[si] :
&pp->aprd[NV_ADMA_SGTBL_LEN * qc->hw_tag + (si-5)]; &pp->aprd[NV_ADMA_SGTBL_LEN * qc->hw_tag + (si-5)];
@ -1378,8 +1370,6 @@ static enum ata_completion_errors nv_adma_qc_prep(struct ata_queued_cmd *qc)
if (qc->tf.protocol == ATA_PROT_NCQ) if (qc->tf.protocol == ATA_PROT_NCQ)
ctl_flags |= NV_CPB_CTL_QUEUE | NV_CPB_CTL_FPDMA; ctl_flags |= NV_CPB_CTL_QUEUE | NV_CPB_CTL_FPDMA;
VPRINTK("qc->flags = 0x%lx\n", qc->flags);
nv_adma_tf_to_cpb(&qc->tf, cpb->tf); nv_adma_tf_to_cpb(&qc->tf, cpb->tf);
if (qc->flags & ATA_QCFLAG_DMAMAP) { if (qc->flags & ATA_QCFLAG_DMAMAP) {
@ -1404,8 +1394,6 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
void __iomem *mmio = pp->ctl_block; void __iomem *mmio = pp->ctl_block;
int curr_ncq = (qc->tf.protocol == ATA_PROT_NCQ); int curr_ncq = (qc->tf.protocol == ATA_PROT_NCQ);
VPRINTK("ENTER\n");
/* We can't handle result taskfile with NCQ commands, since /* We can't handle result taskfile with NCQ commands, since
retrieving the taskfile switches us out of ADMA mode and would abort retrieving the taskfile switches us out of ADMA mode and would abort
existing commands. */ existing commands. */
@ -1417,7 +1405,6 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
if (nv_adma_use_reg_mode(qc)) { if (nv_adma_use_reg_mode(qc)) {
/* use ATA register mode */ /* use ATA register mode */
VPRINTK("using ATA register mode: 0x%lx\n", qc->flags);
BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) && BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) &&
(qc->flags & ATA_QCFLAG_DMAMAP)); (qc->flags & ATA_QCFLAG_DMAMAP));
nv_adma_register_mode(qc->ap); nv_adma_register_mode(qc->ap);
@ -1438,8 +1425,6 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
writew(qc->hw_tag, mmio + NV_ADMA_APPEND); writew(qc->hw_tag, mmio + NV_ADMA_APPEND);
DPRINTK("Issued tag %u\n", qc->hw_tag);
return 0; return 0;
} }
@ -1871,12 +1856,12 @@ static void nv_swncq_host_init(struct ata_host *host)
/* enable swncq */ /* enable swncq */
tmp = readl(mmio + NV_CTL_MCP55); tmp = readl(mmio + NV_CTL_MCP55);
VPRINTK("HOST_CTL:0x%X\n", tmp); dev_dbg(&pdev->dev, "HOST_CTL:0x%X\n", tmp);
writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55); writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55);
/* enable irq intr */ /* enable irq intr */
tmp = readl(mmio + NV_INT_ENABLE_MCP55); tmp = readl(mmio + NV_INT_ENABLE_MCP55);
VPRINTK("HOST_ENABLE:0x%X\n", tmp); dev_dbg(&pdev->dev, "HOST_ENABLE:0x%X\n", tmp);
writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55); writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55);
/* clear port irq */ /* clear port irq */
@ -2017,19 +2002,17 @@ static unsigned int nv_swncq_issue_atacmd(struct ata_port *ap,
if (qc == NULL) if (qc == NULL)
return 0; return 0;
DPRINTK("Enter\n");
writel((1 << qc->hw_tag), pp->sactive_block); writel((1 << qc->hw_tag), pp->sactive_block);
pp->last_issue_tag = qc->hw_tag; pp->last_issue_tag = qc->hw_tag;
pp->dhfis_bits &= ~(1 << qc->hw_tag); pp->dhfis_bits &= ~(1 << qc->hw_tag);
pp->dmafis_bits &= ~(1 << qc->hw_tag); pp->dmafis_bits &= ~(1 << qc->hw_tag);
pp->qc_active |= (0x1 << qc->hw_tag); pp->qc_active |= (0x1 << qc->hw_tag);
trace_ata_tf_load(ap, &qc->tf);
ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
trace_ata_exec_command(ap, &qc->tf, qc->hw_tag);
ap->ops->sff_exec_command(ap, &qc->tf); ap->ops->sff_exec_command(ap, &qc->tf);
DPRINTK("Issued tag %u\n", qc->hw_tag);
return 0; return 0;
} }
@ -2041,8 +2024,6 @@ static unsigned int nv_swncq_qc_issue(struct ata_queued_cmd *qc)
if (qc->tf.protocol != ATA_PROT_NCQ) if (qc->tf.protocol != ATA_PROT_NCQ)
return ata_bmdma_qc_issue(qc); return ata_bmdma_qc_issue(qc);
DPRINTK("Enter\n");
if (!pp->qc_active) if (!pp->qc_active)
nv_swncq_issue_atacmd(ap, qc); nv_swncq_issue_atacmd(ap, qc);
else else
@ -2087,6 +2068,7 @@ static int nv_swncq_sdbfis(struct ata_port *ap)
u8 lack_dhfis = 0; u8 lack_dhfis = 0;
host_stat = ap->ops->bmdma_status(ap); host_stat = ap->ops->bmdma_status(ap);
trace_ata_bmdma_status(ap, host_stat);
if (unlikely(host_stat & ATA_DMA_ERR)) { if (unlikely(host_stat & ATA_DMA_ERR)) {
/* error when transferring data to/from memory */ /* error when transferring data to/from memory */
ata_ehi_clear_desc(ehi); ata_ehi_clear_desc(ehi);
@ -2109,7 +2091,7 @@ static int nv_swncq_sdbfis(struct ata_port *ap)
ata_qc_complete_multiple(ap, ata_qc_get_active(ap) ^ done_mask); ata_qc_complete_multiple(ap, ata_qc_get_active(ap) ^ done_mask);
if (!ap->qc_active) { if (!ap->qc_active) {
DPRINTK("over\n"); ata_port_dbg(ap, "over\n");
nv_swncq_pp_reinit(ap); nv_swncq_pp_reinit(ap);
return 0; return 0;
} }
@ -2124,12 +2106,12 @@ static int nv_swncq_sdbfis(struct ata_port *ap)
*/ */
lack_dhfis = 1; lack_dhfis = 1;
DPRINTK("id 0x%x QC: qc_active 0x%llx," ata_port_dbg(ap, "QC: qc_active 0x%llx,"
"SWNCQ:qc_active 0x%X defer_bits %X " "SWNCQ:qc_active 0x%X defer_bits %X "
"dhfis 0x%X dmafis 0x%X last_issue_tag %x\n", "dhfis 0x%X dmafis 0x%X last_issue_tag %x\n",
ap->print_id, ap->qc_active, pp->qc_active, ap->qc_active, pp->qc_active,
pp->defer_queue.defer_bits, pp->dhfis_bits, pp->defer_queue.defer_bits, pp->dhfis_bits,
pp->dmafis_bits, pp->last_issue_tag); pp->dmafis_bits, pp->last_issue_tag);
nv_swncq_fis_reinit(ap); nv_swncq_fis_reinit(ap);
@ -2169,7 +2151,7 @@ static void nv_swncq_dmafis(struct ata_port *ap)
__ata_bmdma_stop(ap); __ata_bmdma_stop(ap);
tag = nv_swncq_tag(ap); tag = nv_swncq_tag(ap);
DPRINTK("dma setup tag 0x%x\n", tag); ata_port_dbg(ap, "dma setup tag 0x%x\n", tag);
qc = ata_qc_from_tag(ap, tag); qc = ata_qc_from_tag(ap, tag);
if (unlikely(!qc)) if (unlikely(!qc))
@ -2237,9 +2219,9 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis)
if (fis & NV_SWNCQ_IRQ_SDBFIS) { if (fis & NV_SWNCQ_IRQ_SDBFIS) {
pp->ncq_flags |= ncq_saw_sdb; pp->ncq_flags |= ncq_saw_sdb;
DPRINTK("id 0x%x SWNCQ: qc_active 0x%X " ata_port_dbg(ap, "SWNCQ: qc_active 0x%X "
"dhfis 0x%X dmafis 0x%X sactive 0x%X\n", "dhfis 0x%X dmafis 0x%X sactive 0x%X\n",
ap->print_id, pp->qc_active, pp->dhfis_bits, pp->qc_active, pp->dhfis_bits,
pp->dmafis_bits, readl(pp->sactive_block)); pp->dmafis_bits, readl(pp->sactive_block));
if (nv_swncq_sdbfis(ap) < 0) if (nv_swncq_sdbfis(ap) < 0)
goto irq_error; goto irq_error;
@ -2265,7 +2247,7 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis)
goto irq_exit; goto irq_exit;
if (pp->defer_queue.defer_bits) { if (pp->defer_queue.defer_bits) {
DPRINTK("send next command\n"); ata_port_dbg(ap, "send next command\n");
qc = nv_swncq_qc_from_dq(ap); qc = nv_swncq_qc_from_dq(ap);
nv_swncq_issue_atacmd(ap, qc); nv_swncq_issue_atacmd(ap, qc);
} }

31
drivers/ata/sata_promise.c
View file

@ -596,7 +596,8 @@ static void pdc_fill_sg(struct ata_queued_cmd *qc)
prd[idx].addr = cpu_to_le32(addr); prd[idx].addr = cpu_to_le32(addr);
prd[idx].flags_len = cpu_to_le32(len & 0xffff); prd[idx].flags_len = cpu_to_le32(len & 0xffff);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); ata_port_dbg(ap, "PRD[%u] = (0x%X, 0x%X)\n",
idx, addr, len);
idx++; idx++;
sg_len -= len; sg_len -= len;
@ -609,17 +610,16 @@ static void pdc_fill_sg(struct ata_queued_cmd *qc)
if (len > SG_COUNT_ASIC_BUG) { if (len > SG_COUNT_ASIC_BUG) {
u32 addr; u32 addr;
VPRINTK("Splitting last PRD.\n");
addr = le32_to_cpu(prd[idx - 1].addr); addr = le32_to_cpu(prd[idx - 1].addr);
prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG); prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG); ata_port_dbg(ap, "PRD[%u] = (0x%X, 0x%X)\n",
idx - 1, addr, SG_COUNT_ASIC_BUG);
addr = addr + len - SG_COUNT_ASIC_BUG; addr = addr + len - SG_COUNT_ASIC_BUG;
len = SG_COUNT_ASIC_BUG; len = SG_COUNT_ASIC_BUG;
prd[idx].addr = cpu_to_le32(addr); prd[idx].addr = cpu_to_le32(addr);
prd[idx].flags_len = cpu_to_le32(len); prd[idx].flags_len = cpu_to_le32(len);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); ata_port_dbg(ap, "PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
idx++; idx++;
} }
@ -632,8 +632,6 @@ static enum ata_completion_errors pdc_qc_prep(struct ata_queued_cmd *qc)
struct pdc_port_priv *pp = qc->ap->private_data; struct pdc_port_priv *pp = qc->ap->private_data;
unsigned int i; unsigned int i;
VPRINTK("ENTER\n");
switch (qc->tf.protocol) { switch (qc->tf.protocol) {
case ATA_PROT_DMA: case ATA_PROT_DMA:
pdc_fill_sg(qc); pdc_fill_sg(qc);
@ -922,12 +920,8 @@ static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
u32 hotplug_status; u32 hotplug_status;
int is_sataii_tx4; int is_sataii_tx4;
VPRINTK("ENTER\n"); if (!host || !host->iomap[PDC_MMIO_BAR])
if (!host || !host->iomap[PDC_MMIO_BAR]) {
VPRINTK("QUICK EXIT\n");
return IRQ_NONE; return IRQ_NONE;
}
host_mmio = host->iomap[PDC_MMIO_BAR]; host_mmio = host->iomap[PDC_MMIO_BAR];
@ -946,23 +940,18 @@ static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
/* reading should also clear interrupts */ /* reading should also clear interrupts */
mask = readl(host_mmio + PDC_INT_SEQMASK); mask = readl(host_mmio + PDC_INT_SEQMASK);
if (mask == 0xffffffff && hotplug_status == 0) { if (mask == 0xffffffff && hotplug_status == 0)
VPRINTK("QUICK EXIT 2\n");
goto done_irq; goto done_irq;
}
mask &= 0xffff; /* only 16 SEQIDs possible */ mask &= 0xffff; /* only 16 SEQIDs possible */
if (mask == 0 && hotplug_status == 0) { if (mask == 0 && hotplug_status == 0)
VPRINTK("QUICK EXIT 3\n");
goto done_irq; goto done_irq;
}
writel(mask, host_mmio + PDC_INT_SEQMASK); writel(mask, host_mmio + PDC_INT_SEQMASK);
is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags); is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags);
for (i = 0; i < host->n_ports; i++) { for (i = 0; i < host->n_ports; i++) {
VPRINTK("port %u\n", i);
ap = host->ports[i]; ap = host->ports[i];
/* check for a plug or unplug event */ /* check for a plug or unplug event */
@ -989,8 +978,6 @@ static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
} }
} }
VPRINTK("EXIT\n");
done_irq: done_irq:
spin_unlock(&host->lock); spin_unlock(&host->lock);
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
@ -1005,8 +992,6 @@ static void pdc_packet_start(struct ata_queued_cmd *qc)
unsigned int port_no = ap->port_no; unsigned int port_no = ap->port_no;
u8 seq = (u8) (port_no + 1); u8 seq = (u8) (port_no + 1);
VPRINTK("ENTER, ap %p\n", ap);
writel(0x00000001, host_mmio + (seq * 4)); writel(0x00000001, host_mmio + (seq * 4));
readl(host_mmio + (seq * 4)); /* flush */ readl(host_mmio + (seq * 4)); /* flush */

15
drivers/ata/sata_qstor.c
View file

@ -252,9 +252,6 @@ static unsigned int qs_fill_sg(struct ata_queued_cmd *qc)
len = sg_dma_len(sg); len = sg_dma_len(sg);
*(__le32 *)prd = cpu_to_le32(len); *(__le32 *)prd = cpu_to_le32(len);
prd += sizeof(u64); prd += sizeof(u64);
VPRINTK("PRD[%u] = (0x%llX, 0x%X)\n", si,
(unsigned long long)addr, len);
} }
return si; return si;
@ -268,8 +265,6 @@ static enum ata_completion_errors qs_qc_prep(struct ata_queued_cmd *qc)
u64 addr; u64 addr;
unsigned int nelem; unsigned int nelem;
VPRINTK("ENTER\n");
qs_enter_reg_mode(qc->ap); qs_enter_reg_mode(qc->ap);
if (qc->tf.protocol != ATA_PROT_DMA) if (qc->tf.protocol != ATA_PROT_DMA)
return AC_ERR_OK; return AC_ERR_OK;
@ -304,8 +299,6 @@ static inline void qs_packet_start(struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
u8 __iomem *chan = qs_mmio_base(ap->host) + (ap->port_no * 0x4000); u8 __iomem *chan = qs_mmio_base(ap->host) + (ap->port_no * 0x4000);
VPRINTK("ENTER, ap %p\n", ap);
writeb(QS_CTR0_CLER, chan + QS_CCT_CTR0); writeb(QS_CTR0_CLER, chan + QS_CCT_CTR0);
wmb(); /* flush PRDs and pkt to memory */ wmb(); /* flush PRDs and pkt to memory */
writel(QS_CCF_RUN_PKT, chan + QS_CCT_CFF); writel(QS_CCF_RUN_PKT, chan + QS_CCT_CFF);
@ -374,8 +367,8 @@ static inline unsigned int qs_intr_pkt(struct ata_host *host)
struct qs_port_priv *pp = ap->private_data; struct qs_port_priv *pp = ap->private_data;
struct ata_queued_cmd *qc; struct ata_queued_cmd *qc;
DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", dev_dbg(host->dev, "SFF=%08x%08x: sHST=%d sDST=%02x\n",
sff1, sff0, port_no, sHST, sDST); sff1, sff0, sHST, sDST);
handled = 1; handled = 1;
if (!pp || pp->state != qs_state_pkt) if (!pp || pp->state != qs_state_pkt)
continue; continue;
@ -435,14 +428,10 @@ static irqreturn_t qs_intr(int irq, void *dev_instance)
unsigned int handled = 0; unsigned int handled = 0;
unsigned long flags; unsigned long flags;
VPRINTK("ENTER\n");
spin_lock_irqsave(&host->lock, flags); spin_lock_irqsave(&host->lock, flags);
handled = qs_intr_pkt(host) | qs_intr_mmio(host); handled = qs_intr_pkt(host) | qs_intr_mmio(host);
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
VPRINTK("EXIT\n");
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }

26
drivers/ata/sata_rcar.c
View file

@ -323,8 +323,6 @@ static int sata_rcar_bus_softreset(struct ata_port *ap, unsigned long deadline)
{ {
struct ata_ioports *ioaddr = &ap->ioaddr; struct ata_ioports *ioaddr = &ap->ioaddr;
DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
/* software reset. causes dev0 to be selected */ /* software reset. causes dev0 to be selected */
iowrite32(ap->ctl, ioaddr->ctl_addr); iowrite32(ap->ctl, ioaddr->ctl_addr);
udelay(20); udelay(20);
@ -350,7 +348,6 @@ static int sata_rcar_softreset(struct ata_link *link, unsigned int *classes,
devmask |= 1 << 0; devmask |= 1 << 0;
/* issue bus reset */ /* issue bus reset */
DPRINTK("about to softreset, devmask=%x\n", devmask);
rc = sata_rcar_bus_softreset(ap, deadline); rc = sata_rcar_bus_softreset(ap, deadline);
/* if link is occupied, -ENODEV too is an error */ /* if link is occupied, -ENODEV too is an error */
if (rc && (rc != -ENODEV || sata_scr_valid(link))) { if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
@ -361,7 +358,6 @@ static int sata_rcar_softreset(struct ata_link *link, unsigned int *classes,
/* determine by signature whether we have ATA or ATAPI devices */ /* determine by signature whether we have ATA or ATAPI devices */
classes[0] = ata_sff_dev_classify(&link->device[0], devmask, &err); classes[0] = ata_sff_dev_classify(&link->device[0], devmask, &err);
DPRINTK("classes[0]=%u\n", classes[0]);
return 0; return 0;
} }
@ -383,12 +379,6 @@ static void sata_rcar_tf_load(struct ata_port *ap,
iowrite32(tf->hob_lbal, ioaddr->lbal_addr); iowrite32(tf->hob_lbal, ioaddr->lbal_addr);
iowrite32(tf->hob_lbam, ioaddr->lbam_addr); iowrite32(tf->hob_lbam, ioaddr->lbam_addr);
iowrite32(tf->hob_lbah, ioaddr->lbah_addr); iowrite32(tf->hob_lbah, ioaddr->lbah_addr);
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->hob_feature,
tf->hob_nsect,
tf->hob_lbal,
tf->hob_lbam,
tf->hob_lbah);
} }
if (is_addr) { if (is_addr) {
@ -397,18 +387,10 @@ static void sata_rcar_tf_load(struct ata_port *ap,
iowrite32(tf->lbal, ioaddr->lbal_addr); iowrite32(tf->lbal, ioaddr->lbal_addr);
iowrite32(tf->lbam, ioaddr->lbam_addr); iowrite32(tf->lbam, ioaddr->lbam_addr);
iowrite32(tf->lbah, ioaddr->lbah_addr); iowrite32(tf->lbah, ioaddr->lbah_addr);
VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
tf->feature,
tf->nsect,
tf->lbal,
tf->lbam,
tf->lbah);
} }
if (tf->flags & ATA_TFLAG_DEVICE) { if (tf->flags & ATA_TFLAG_DEVICE)
iowrite32(tf->device, ioaddr->device_addr); iowrite32(tf->device, ioaddr->device_addr);
VPRINTK("device 0x%X\n", tf->device);
}
ata_wait_idle(ap); ata_wait_idle(ap);
} }
@ -440,8 +422,6 @@ static void sata_rcar_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
static void sata_rcar_exec_command(struct ata_port *ap, static void sata_rcar_exec_command(struct ata_port *ap,
const struct ata_taskfile *tf) const struct ata_taskfile *tf)
{ {
DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
iowrite32(tf->command, ap->ioaddr.command_addr); iowrite32(tf->command, ap->ioaddr.command_addr);
ata_sff_pause(ap); ata_sff_pause(ap);
} }
@ -499,7 +479,6 @@ static void sata_rcar_drain_fifo(struct ata_queued_cmd *qc)
count < 65536; count += 2) count < 65536; count += 2)
ioread32(ap->ioaddr.data_addr); ioread32(ap->ioaddr.data_addr);
/* Can become DEBUG later */
if (count) if (count)
ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count); ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
} }
@ -543,7 +522,6 @@ static void sata_rcar_bmdma_fill_sg(struct ata_queued_cmd *qc)
prd[si].addr = cpu_to_le32(addr); prd[si].addr = cpu_to_le32(addr);
prd[si].flags_len = cpu_to_le32(sg_len); prd[si].flags_len = cpu_to_le32(sg_len);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", si, addr, sg_len);
} }
/* end-of-table flag */ /* end-of-table flag */
@ -685,7 +663,7 @@ static void sata_rcar_serr_interrupt(struct ata_port *ap)
if (!serror) if (!serror)
return; return;
DPRINTK("SError @host_intr: 0x%x\n", serror); ata_port_dbg(ap, "SError @host_intr: 0x%x\n", serror);
/* first, analyze and record host port events */ /* first, analyze and record host port events */
ata_ehi_clear_desc(ehi); ata_ehi_clear_desc(ehi);

1
drivers/ata/sata_sil.c
View file

@ -307,7 +307,6 @@ static void sil_fill_sg(struct ata_queued_cmd *qc)
prd->addr = cpu_to_le32(addr); prd->addr = cpu_to_le32(addr);
prd->flags_len = cpu_to_le32(sg_len); prd->flags_len = cpu_to_le32(sg_len);
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", si, addr, sg_len);
last_prd = prd; last_prd = prd;
prd++; prd++;

5
drivers/ata/sata_sil24.c
View file

@ -656,8 +656,6 @@ static int sil24_softreset(struct ata_link *link, unsigned int *class,
const char *reason; const char *reason;
int rc; int rc;
DPRINTK("ENTER\n");
/* put the port into known state */ /* put the port into known state */
if (sil24_init_port(ap)) { if (sil24_init_port(ap)) {
reason = "port not ready"; reason = "port not ready";
@ -680,9 +678,8 @@ static int sil24_softreset(struct ata_link *link, unsigned int *class,
} }
sil24_read_tf(ap, 0, &tf); sil24_read_tf(ap, 0, &tf);
*class = ata_dev_classify(&tf); *class = ata_port_classify(ap, &tf);
DPRINTK("EXIT, class=%u\n", *class);
return 0; return 0;
err: err:

148
drivers/ata/sata_sx4.c
View file

@ -78,6 +78,9 @@
#define DRV_NAME "sata_sx4" #define DRV_NAME "sata_sx4"
#define DRV_VERSION "0.12" #define DRV_VERSION "0.12"
static int dimm_test;
module_param(dimm_test, int, 0644);
MODULE_PARM_DESC(dimm_test, "Enable DIMM test during startup (1 = enabled)");
enum { enum {
PDC_MMIO_BAR = 3, PDC_MMIO_BAR = 3,
@ -211,10 +214,8 @@ static unsigned int pdc20621_i2c_read(struct ata_host *host,
u32 device, u32 subaddr, u32 *pdata); u32 device, u32 subaddr, u32 *pdata);
static int pdc20621_prog_dimm0(struct ata_host *host); static int pdc20621_prog_dimm0(struct ata_host *host);
static unsigned int pdc20621_prog_dimm_global(struct ata_host *host); static unsigned int pdc20621_prog_dimm_global(struct ata_host *host);
#ifdef ATA_VERBOSE_DEBUG
static void pdc20621_get_from_dimm(struct ata_host *host, static void pdc20621_get_from_dimm(struct ata_host *host,
void *psource, u32 offset, u32 size); void *psource, u32 offset, u32 size);
#endif
static void pdc20621_put_to_dimm(struct ata_host *host, static void pdc20621_put_to_dimm(struct ata_host *host,
void *psource, u32 offset, u32 size); void *psource, u32 offset, u32 size);
static void pdc20621_irq_clear(struct ata_port *ap); static void pdc20621_irq_clear(struct ata_port *ap);
@ -308,15 +309,9 @@ static inline void pdc20621_ata_sg(u8 *buf, unsigned int portno,
/* output ATA packet S/G table */ /* output ATA packet S/G table */
addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA + addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA +
(PDC_DIMM_DATA_STEP * portno); (PDC_DIMM_DATA_STEP * portno);
VPRINTK("ATA sg addr 0x%x, %d\n", addr, addr);
buf32[dw] = cpu_to_le32(addr); buf32[dw] = cpu_to_le32(addr);
buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT);
VPRINTK("ATA PSG @ %x == (0x%x, 0x%x)\n",
PDC_20621_DIMM_BASE +
(PDC_DIMM_WINDOW_STEP * portno) +
PDC_DIMM_APKT_PRD,
buf32[dw], buf32[dw + 1]);
} }
static inline void pdc20621_host_sg(u8 *buf, unsigned int portno, static inline void pdc20621_host_sg(u8 *buf, unsigned int portno,
@ -332,12 +327,6 @@ static inline void pdc20621_host_sg(u8 *buf, unsigned int portno,
buf32[dw] = cpu_to_le32(addr); buf32[dw] = cpu_to_le32(addr);
buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT);
VPRINTK("HOST PSG @ %x == (0x%x, 0x%x)\n",
PDC_20621_DIMM_BASE +
(PDC_DIMM_WINDOW_STEP * portno) +
PDC_DIMM_HPKT_PRD,
buf32[dw], buf32[dw + 1]);
} }
static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf, static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf,
@ -351,7 +340,6 @@ static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf,
unsigned int dimm_sg = PDC_20621_DIMM_BASE + unsigned int dimm_sg = PDC_20621_DIMM_BASE +
(PDC_DIMM_WINDOW_STEP * portno) + (PDC_DIMM_WINDOW_STEP * portno) +
PDC_DIMM_APKT_PRD; PDC_DIMM_APKT_PRD;
VPRINTK("ENTER, dimm_sg == 0x%x, %d\n", dimm_sg, dimm_sg);
i = PDC_DIMM_ATA_PKT; i = PDC_DIMM_ATA_PKT;
@ -406,8 +394,6 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf,
unsigned int dimm_sg = PDC_20621_DIMM_BASE + unsigned int dimm_sg = PDC_20621_DIMM_BASE +
(PDC_DIMM_WINDOW_STEP * portno) + (PDC_DIMM_WINDOW_STEP * portno) +
PDC_DIMM_HPKT_PRD; PDC_DIMM_HPKT_PRD;
VPRINTK("ENTER, dimm_sg == 0x%x, %d\n", dimm_sg, dimm_sg);
VPRINTK("host_sg == 0x%x, %d\n", host_sg, host_sg);
dw = PDC_DIMM_HOST_PKT >> 2; dw = PDC_DIMM_HOST_PKT >> 2;
@ -424,14 +410,6 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf,
buf32[dw + 1] = cpu_to_le32(host_sg); buf32[dw + 1] = cpu_to_le32(host_sg);
buf32[dw + 2] = cpu_to_le32(dimm_sg); buf32[dw + 2] = cpu_to_le32(dimm_sg);
buf32[dw + 3] = 0; buf32[dw + 3] = 0;
VPRINTK("HOST PKT @ %x == (0x%x 0x%x 0x%x 0x%x)\n",
PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * portno) +
PDC_DIMM_HOST_PKT,
buf32[dw + 0],
buf32[dw + 1],
buf32[dw + 2],
buf32[dw + 3]);
} }
static void pdc20621_dma_prep(struct ata_queued_cmd *qc) static void pdc20621_dma_prep(struct ata_queued_cmd *qc)
@ -447,8 +425,6 @@ static void pdc20621_dma_prep(struct ata_queued_cmd *qc)
WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
VPRINTK("ata%u: ENTER\n", ap->print_id);
/* hard-code chip #0 */ /* hard-code chip #0 */
mmio += PDC_CHIP0_OFS; mmio += PDC_CHIP0_OFS;
@ -492,7 +468,8 @@ static void pdc20621_dma_prep(struct ata_queued_cmd *qc)
readl(dimm_mmio); /* MMIO PCI posting flush */ readl(dimm_mmio); /* MMIO PCI posting flush */
VPRINTK("ata pkt buf ofs %u, prd size %u, mmio copied\n", i, sgt_len); ata_port_dbg(ap, "ata pkt buf ofs %u, prd size %u, mmio copied\n",
i, sgt_len);
} }
static void pdc20621_nodata_prep(struct ata_queued_cmd *qc) static void pdc20621_nodata_prep(struct ata_queued_cmd *qc)
@ -504,8 +481,6 @@ static void pdc20621_nodata_prep(struct ata_queued_cmd *qc)
unsigned int portno = ap->port_no; unsigned int portno = ap->port_no;
unsigned int i; unsigned int i;
VPRINTK("ata%u: ENTER\n", ap->print_id);
/* hard-code chip #0 */ /* hard-code chip #0 */
mmio += PDC_CHIP0_OFS; mmio += PDC_CHIP0_OFS;
@ -527,7 +502,7 @@ static void pdc20621_nodata_prep(struct ata_queued_cmd *qc)
readl(dimm_mmio); /* MMIO PCI posting flush */ readl(dimm_mmio); /* MMIO PCI posting flush */
VPRINTK("ata pkt buf ofs %u, mmio copied\n", i); ata_port_dbg(ap, "ata pkt buf ofs %u, mmio copied\n", i);
} }
static enum ata_completion_errors pdc20621_qc_prep(struct ata_queued_cmd *qc) static enum ata_completion_errors pdc20621_qc_prep(struct ata_queued_cmd *qc)
@ -601,7 +576,6 @@ static void pdc20621_pop_hdma(struct ata_queued_cmd *qc)
pp->hdma_cons++; pp->hdma_cons++;
} }
#ifdef ATA_VERBOSE_DEBUG
static void pdc20621_dump_hdma(struct ata_queued_cmd *qc) static void pdc20621_dump_hdma(struct ata_queued_cmd *qc)
{ {
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
@ -611,14 +585,10 @@ static void pdc20621_dump_hdma(struct ata_queued_cmd *qc)
dimm_mmio += (port_no * PDC_DIMM_WINDOW_STEP); dimm_mmio += (port_no * PDC_DIMM_WINDOW_STEP);
dimm_mmio += PDC_DIMM_HOST_PKT; dimm_mmio += PDC_DIMM_HOST_PKT;
printk(KERN_ERR "HDMA[0] == 0x%08X\n", readl(dimm_mmio)); ata_port_dbg(ap, "HDMA 0x%08X 0x%08X 0x%08X 0x%08X\n",
printk(KERN_ERR "HDMA[1] == 0x%08X\n", readl(dimm_mmio + 4)); readl(dimm_mmio), readl(dimm_mmio + 4),
printk(KERN_ERR "HDMA[2] == 0x%08X\n", readl(dimm_mmio + 8)); readl(dimm_mmio + 8), readl(dimm_mmio + 12));
printk(KERN_ERR "HDMA[3] == 0x%08X\n", readl(dimm_mmio + 12));
} }
#else
static inline void pdc20621_dump_hdma(struct ata_queued_cmd *qc) { }
#endif /* ATA_VERBOSE_DEBUG */
static void pdc20621_packet_start(struct ata_queued_cmd *qc) static void pdc20621_packet_start(struct ata_queued_cmd *qc)
{ {
@ -633,8 +603,6 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc)
/* hard-code chip #0 */ /* hard-code chip #0 */
mmio += PDC_CHIP0_OFS; mmio += PDC_CHIP0_OFS;
VPRINTK("ata%u: ENTER\n", ap->print_id);
wmb(); /* flush PRD, pkt writes */ wmb(); /* flush PRD, pkt writes */
port_ofs = PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * port_no); port_ofs = PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * port_no);
@ -645,7 +613,7 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc)
pdc20621_dump_hdma(qc); pdc20621_dump_hdma(qc);
pdc20621_push_hdma(qc, seq, port_ofs + PDC_DIMM_HOST_PKT); pdc20621_push_hdma(qc, seq, port_ofs + PDC_DIMM_HOST_PKT);
VPRINTK("queued ofs 0x%x (%u), seq %u\n", ata_port_dbg(ap, "queued ofs 0x%x (%u), seq %u\n",
port_ofs + PDC_DIMM_HOST_PKT, port_ofs + PDC_DIMM_HOST_PKT,
port_ofs + PDC_DIMM_HOST_PKT, port_ofs + PDC_DIMM_HOST_PKT,
seq); seq);
@ -656,7 +624,7 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc)
writel(port_ofs + PDC_DIMM_ATA_PKT, writel(port_ofs + PDC_DIMM_ATA_PKT,
ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
VPRINTK("submitted ofs 0x%x (%u), seq %u\n", ata_port_dbg(ap, "submitted ofs 0x%x (%u), seq %u\n",
port_ofs + PDC_DIMM_ATA_PKT, port_ofs + PDC_DIMM_ATA_PKT,
port_ofs + PDC_DIMM_ATA_PKT, port_ofs + PDC_DIMM_ATA_PKT,
seq); seq);
@ -696,14 +664,12 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
u8 status; u8 status;
unsigned int handled = 0; unsigned int handled = 0;
VPRINTK("ENTER\n");
if ((qc->tf.protocol == ATA_PROT_DMA) && /* read */ if ((qc->tf.protocol == ATA_PROT_DMA) && /* read */
(!(qc->tf.flags & ATA_TFLAG_WRITE))) { (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
/* step two - DMA from DIMM to host */ /* step two - DMA from DIMM to host */
if (doing_hdma) { if (doing_hdma) {
VPRINTK("ata%u: read hdma, 0x%x 0x%x\n", ap->print_id, ata_port_dbg(ap, "read hdma, 0x%x 0x%x\n",
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
/* get drive status; clear intr; complete txn */ /* get drive status; clear intr; complete txn */
qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
@ -714,7 +680,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
/* step one - exec ATA command */ /* step one - exec ATA command */
else { else {
u8 seq = (u8) (port_no + 1 + 4); u8 seq = (u8) (port_no + 1 + 4);
VPRINTK("ata%u: read ata, 0x%x 0x%x\n", ap->print_id, ata_port_dbg(ap, "read ata, 0x%x 0x%x\n",
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
/* submit hdma pkt */ /* submit hdma pkt */
@ -729,7 +695,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
/* step one - DMA from host to DIMM */ /* step one - DMA from host to DIMM */
if (doing_hdma) { if (doing_hdma) {
u8 seq = (u8) (port_no + 1); u8 seq = (u8) (port_no + 1);
VPRINTK("ata%u: write hdma, 0x%x 0x%x\n", ap->print_id, ata_port_dbg(ap, "write hdma, 0x%x 0x%x\n",
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
/* submit ata pkt */ /* submit ata pkt */
@ -742,7 +708,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
/* step two - execute ATA command */ /* step two - execute ATA command */
else { else {
VPRINTK("ata%u: write ata, 0x%x 0x%x\n", ap->print_id, ata_port_dbg(ap, "write ata, 0x%x 0x%x\n",
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
/* get drive status; clear intr; complete txn */ /* get drive status; clear intr; complete txn */
qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
@ -755,7 +721,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
} else if (qc->tf.protocol == ATA_PROT_NODATA) { } else if (qc->tf.protocol == ATA_PROT_NODATA) {
status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
DPRINTK("BUS_NODATA (drv_stat 0x%X)\n", status); ata_port_dbg(ap, "BUS_NODATA (drv_stat 0x%X)\n", status);
qc->err_mask |= ac_err_mask(status); qc->err_mask |= ac_err_mask(status);
ata_qc_complete(qc); ata_qc_complete(qc);
handled = 1; handled = 1;
@ -781,29 +747,21 @@ static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance)
unsigned int handled = 0; unsigned int handled = 0;
void __iomem *mmio_base; void __iomem *mmio_base;
VPRINTK("ENTER\n"); if (!host || !host->iomap[PDC_MMIO_BAR])
if (!host || !host->iomap[PDC_MMIO_BAR]) {
VPRINTK("QUICK EXIT\n");
return IRQ_NONE; return IRQ_NONE;
}
mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base = host->iomap[PDC_MMIO_BAR];
/* reading should also clear interrupts */ /* reading should also clear interrupts */
mmio_base += PDC_CHIP0_OFS; mmio_base += PDC_CHIP0_OFS;
mask = readl(mmio_base + PDC_20621_SEQMASK); mask = readl(mmio_base + PDC_20621_SEQMASK);
VPRINTK("mask == 0x%x\n", mask);
if (mask == 0xffffffff) { if (mask == 0xffffffff)
VPRINTK("QUICK EXIT 2\n");
return IRQ_NONE; return IRQ_NONE;
}
mask &= 0xffff; /* only 16 tags possible */ mask &= 0xffff; /* only 16 tags possible */
if (!mask) { if (!mask)
VPRINTK("QUICK EXIT 3\n");
return IRQ_NONE; return IRQ_NONE;
}
spin_lock(&host->lock); spin_lock(&host->lock);
@ -816,7 +774,8 @@ static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance)
else else
ap = host->ports[port_no]; ap = host->ports[port_no];
tmp = mask & (1 << i); tmp = mask & (1 << i);
VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); if (ap)
ata_port_dbg(ap, "seq %u, tmp %x\n", i, tmp);
if (tmp && ap) { if (tmp && ap) {
struct ata_queued_cmd *qc; struct ata_queued_cmd *qc;
@ -829,10 +788,6 @@ static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance)
spin_unlock(&host->lock); spin_unlock(&host->lock);
VPRINTK("mask == 0x%x\n", mask);
VPRINTK("EXIT\n");
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
@ -979,7 +934,6 @@ static void pdc_sata_setup_port(struct ata_ioports *port, void __iomem *base)
} }
#ifdef ATA_VERBOSE_DEBUG
static void pdc20621_get_from_dimm(struct ata_host *host, void *psource, static void pdc20621_get_from_dimm(struct ata_host *host, void *psource,
u32 offset, u32 size) u32 offset, u32 size)
{ {
@ -1029,7 +983,6 @@ static void pdc20621_get_from_dimm(struct ata_host *host, void *psource,
memcpy_fromio(psource, dimm_mmio, size / 4); memcpy_fromio(psource, dimm_mmio, size / 4);
} }
} }
#endif
static void pdc20621_put_to_dimm(struct ata_host *host, void *psource, static void pdc20621_put_to_dimm(struct ata_host *host, void *psource,
@ -1226,15 +1179,16 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_host *host)
/* Turn on for ECC */ /* Turn on for ECC */
if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
PDC_DIMM_SPD_TYPE, &spd0)) { PDC_DIMM_SPD_TYPE, &spd0)) {
pr_err("Failed in i2c read: device=%#x, subaddr=%#x\n", dev_err(host->dev,
PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE); "Failed in i2c read: device=%#x, subaddr=%#x\n",
PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE);
return 1; return 1;
} }
if (spd0 == 0x02) { if (spd0 == 0x02) {
data |= (0x01 << 16); data |= (0x01 << 16);
writel(data, mmio + PDC_SDRAM_CONTROL); writel(data, mmio + PDC_SDRAM_CONTROL);
readl(mmio + PDC_SDRAM_CONTROL); readl(mmio + PDC_SDRAM_CONTROL);
printk(KERN_ERR "Local DIMM ECC Enabled\n"); dev_err(host->dev, "Local DIMM ECC Enabled\n");
} }
/* DIMM Initialization Select/Enable (bit 18/19) */ /* DIMM Initialization Select/Enable (bit 18/19) */
@ -1274,7 +1228,7 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
/* Initialize Time Period Register */ /* Initialize Time Period Register */
writel(0xffffffff, mmio + PDC_TIME_PERIOD); writel(0xffffffff, mmio + PDC_TIME_PERIOD);
time_period = readl(mmio + PDC_TIME_PERIOD); time_period = readl(mmio + PDC_TIME_PERIOD);
VPRINTK("Time Period Register (0x40): 0x%x\n", time_period); dev_dbg(host->dev, "Time Period Register (0x40): 0x%x\n", time_period);
/* Enable timer */ /* Enable timer */
writel(PDC_TIMER_DEFAULT, mmio + PDC_TIME_CONTROL); writel(PDC_TIMER_DEFAULT, mmio + PDC_TIME_CONTROL);
@ -1289,7 +1243,7 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
*/ */
tcount = readl(mmio + PDC_TIME_COUNTER); tcount = readl(mmio + PDC_TIME_COUNTER);
VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); dev_dbg(host->dev, "Time Counter Register (0x44): 0x%x\n", tcount);
/* /*
If SX4 is on PCI-X bus, after 3 seconds, the timer counter If SX4 is on PCI-X bus, after 3 seconds, the timer counter
@ -1297,17 +1251,19 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
*/ */
if (tcount >= PCI_X_TCOUNT) { if (tcount >= PCI_X_TCOUNT) {
ticks = (time_period - tcount); ticks = (time_period - tcount);
VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); dev_dbg(host->dev, "Num counters 0x%x (%d)\n", ticks, ticks);
clock = (ticks / 300000); clock = (ticks / 300000);
VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); dev_dbg(host->dev, "10 * Internal clk = 0x%x (%d)\n",
clock, clock);
clock = (clock * 33); clock = (clock * 33);
VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); dev_dbg(host->dev, "10 * Internal clk * 33 = 0x%x (%d)\n",
clock, clock);
/* PLL F Param (bit 22:16) */ /* PLL F Param (bit 22:16) */
fparam = (1400000 / clock) - 2; fparam = (1400000 / clock) - 2;
VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); dev_dbg(host->dev, "PLL F Param: 0x%x (%d)\n", fparam, fparam);
/* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */
pci_status = (0x8a001824 | (fparam << 16)); pci_status = (0x8a001824 | (fparam << 16));
@ -1315,7 +1271,7 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
pci_status = PCI_PLL_INIT; pci_status = PCI_PLL_INIT;
/* Initialize PLL. */ /* Initialize PLL. */
VPRINTK("pci_status: 0x%x\n", pci_status); dev_dbg(host->dev, "pci_status: 0x%x\n", pci_status);
writel(pci_status, mmio + PDC_CTL_STATUS); writel(pci_status, mmio + PDC_CTL_STATUS);
readl(mmio + PDC_CTL_STATUS); readl(mmio + PDC_CTL_STATUS);
@ -1324,23 +1280,23 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
and program the DIMM Module Controller. and program the DIMM Module Controller.
*/ */
if (!(speed = pdc20621_detect_dimm(host))) { if (!(speed = pdc20621_detect_dimm(host))) {
printk(KERN_ERR "Detect Local DIMM Fail\n"); dev_err(host->dev, "Detect Local DIMM Fail\n");
return 1; /* DIMM error */ return 1; /* DIMM error */
} }
VPRINTK("Local DIMM Speed = %d\n", speed); dev_dbg(host->dev, "Local DIMM Speed = %d\n", speed);
/* Programming DIMM0 Module Control Register (index_CID0:80h) */ /* Programming DIMM0 Module Control Register (index_CID0:80h) */
size = pdc20621_prog_dimm0(host); size = pdc20621_prog_dimm0(host);
VPRINTK("Local DIMM Size = %dMB\n", size); dev_dbg(host->dev, "Local DIMM Size = %dMB\n", size);
/* Programming DIMM Module Global Control Register (index_CID0:88h) */ /* Programming DIMM Module Global Control Register (index_CID0:88h) */
if (pdc20621_prog_dimm_global(host)) { if (pdc20621_prog_dimm_global(host)) {
printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); dev_err(host->dev,
"Programming DIMM Module Global Control Register Fail\n");
return 1; return 1;
} }
#ifdef ATA_VERBOSE_DEBUG if (dimm_test) {
{
u8 test_parttern1[40] = u8 test_parttern1[40] =
{0x55,0xAA,'P','r','o','m','i','s','e',' ', {0x55,0xAA,'P','r','o','m','i','s','e',' ',
'N','o','t',' ','Y','e','t',' ', 'N','o','t',' ','Y','e','t',' ',
@ -1354,31 +1310,33 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
pdc20621_put_to_dimm(host, test_parttern1, 0x10040, 40); pdc20621_put_to_dimm(host, test_parttern1, 0x10040, 40);
pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40);
printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], dev_info(host->dev, "DIMM test pattern 1: %x, %x, %s\n", test_parttern2[0],
test_parttern2[1], &(test_parttern2[2])); test_parttern2[1], &(test_parttern2[2]));
pdc20621_get_from_dimm(host, test_parttern2, 0x10040, pdc20621_get_from_dimm(host, test_parttern2, 0x10040,
40); 40);
printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], dev_info(host->dev, "DIMM test pattern 2: %x, %x, %s\n",
test_parttern2[1], &(test_parttern2[2])); test_parttern2[0],
test_parttern2[1], &(test_parttern2[2]));
pdc20621_put_to_dimm(host, test_parttern1, 0x40, 40); pdc20621_put_to_dimm(host, test_parttern1, 0x40, 40);
pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40);
printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], dev_info(host->dev, "DIMM test pattern 3: %x, %x, %s\n",
test_parttern2[1], &(test_parttern2[2])); test_parttern2[0],
test_parttern2[1], &(test_parttern2[2]));
} }
#endif
/* ECC initiliazation. */ /* ECC initiliazation. */
if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
PDC_DIMM_SPD_TYPE, &spd0)) { PDC_DIMM_SPD_TYPE, &spd0)) {
pr_err("Failed in i2c read: device=%#x, subaddr=%#x\n", dev_err(host->dev,
"Failed in i2c read: device=%#x, subaddr=%#x\n",
PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE); PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE);
return 1; return 1;
} }
if (spd0 == 0x02) { if (spd0 == 0x02) {
void *buf; void *buf;
VPRINTK("Start ECC initialization\n"); dev_dbg(host->dev, "Start ECC initialization\n");
addr = 0; addr = 0;
length = size * 1024 * 1024; length = size * 1024 * 1024;
buf = kzalloc(ECC_ERASE_BUF_SZ, GFP_KERNEL); buf = kzalloc(ECC_ERASE_BUF_SZ, GFP_KERNEL);
@ -1390,7 +1348,7 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
addr += ECC_ERASE_BUF_SZ; addr += ECC_ERASE_BUF_SZ;
} }
kfree(buf); kfree(buf);
VPRINTK("Finish ECC initialization\n"); dev_dbg(host->dev, "Finish ECC initialization\n");
} }
return 0; return 0;
} }

138
include/linux/libata.h
View file

@ -39,25 +39,9 @@
* compile-time options: to be removed as soon as all the drivers are * compile-time options: to be removed as soon as all the drivers are
* converted to the new debugging mechanism * converted to the new debugging mechanism
*/ */
#undef ATA_DEBUG /* debugging output */
#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
#undef ATA_IRQ_TRAP /* define to ack screaming irqs */ #undef ATA_IRQ_TRAP /* define to ack screaming irqs */
#undef ATA_NDEBUG /* define to disable quick runtime checks */
/* note: prints function name for you */
#ifdef ATA_DEBUG
#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
#ifdef ATA_VERBOSE_DEBUG
#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
#else
#define VPRINTK(fmt, args...)
#endif /* ATA_VERBOSE_DEBUG */
#else
#define DPRINTK(fmt, args...)
#define VPRINTK(fmt, args...)
#endif /* ATA_DEBUG */
#define ata_print_version_once(dev, version) \ #define ata_print_version_once(dev, version) \
({ \ ({ \
static bool __print_once; \ static bool __print_once; \
@ -68,38 +52,6 @@
} \ } \
}) })
/* NEW: debug levels */
#define HAVE_LIBATA_MSG 1
enum {
ATA_MSG_DRV = 0x0001,
ATA_MSG_INFO = 0x0002,
ATA_MSG_PROBE = 0x0004,
ATA_MSG_WARN = 0x0008,
ATA_MSG_MALLOC = 0x0010,
ATA_MSG_CTL = 0x0020,
ATA_MSG_INTR = 0x0040,
ATA_MSG_ERR = 0x0080,
};
#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
{
if (dval < 0 || dval >= (sizeof(u32) * 8))
return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
if (!dval)
return 0;
return (1 << dval) - 1;
}
/* defines only for the constants which don't work well as enums */ /* defines only for the constants which don't work well as enums */
#define ATA_TAG_POISON 0xfafbfcfdU #define ATA_TAG_POISON 0xfafbfcfdU
@ -191,7 +143,7 @@ enum {
ATA_LFLAG_NO_LPM = (1 << 8), /* disable LPM on this link */ ATA_LFLAG_NO_LPM = (1 << 8), /* disable LPM on this link */
ATA_LFLAG_RST_ONCE = (1 << 9), /* limit recovery to one reset */ ATA_LFLAG_RST_ONCE = (1 << 9), /* limit recovery to one reset */
ATA_LFLAG_CHANGED = (1 << 10), /* LPM state changed on this link */ ATA_LFLAG_CHANGED = (1 << 10), /* LPM state changed on this link */
ATA_LFLAG_NO_DB_DELAY = (1 << 11), /* no debounce delay on link resume */ ATA_LFLAG_NO_DEBOUNCE_DELAY = (1 << 11), /* no debounce delay on link resume */
/* struct ata_port flags */ /* struct ata_port flags */
ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */ ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
@ -884,7 +836,6 @@ struct ata_port {
unsigned int hsm_task_state; unsigned int hsm_task_state;
u32 msg_enable;
struct list_head eh_done_q; struct list_head eh_done_q;
wait_queue_head_t eh_wait_q; wait_queue_head_t eh_wait_q;
int eh_tries; int eh_tries;
@ -933,7 +884,8 @@ struct ata_port_operations {
void (*set_piomode)(struct ata_port *ap, struct ata_device *dev); void (*set_piomode)(struct ata_port *ap, struct ata_device *dev);
void (*set_dmamode)(struct ata_port *ap, struct ata_device *dev); void (*set_dmamode)(struct ata_port *ap, struct ata_device *dev);
int (*set_mode)(struct ata_link *link, struct ata_device **r_failed_dev); int (*set_mode)(struct ata_link *link, struct ata_device **r_failed_dev);
unsigned int (*read_id)(struct ata_device *dev, struct ata_taskfile *tf, u16 *id); unsigned int (*read_id)(struct ata_device *dev, struct ata_taskfile *tf,
__le16 *id);
void (*dev_config)(struct ata_device *dev); void (*dev_config)(struct ata_device *dev);
@ -1160,13 +1112,15 @@ extern enum ata_completion_errors ata_noop_qc_prep(struct ata_queued_cmd *qc);
extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
unsigned int n_elem); unsigned int n_elem);
extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
extern unsigned int ata_port_classify(struct ata_port *ap,
const struct ata_taskfile *tf);
extern void ata_dev_disable(struct ata_device *adev); extern void ata_dev_disable(struct ata_device *adev);
extern void ata_id_string(const u16 *id, unsigned char *s, extern void ata_id_string(const u16 *id, unsigned char *s,
unsigned int ofs, unsigned int len); unsigned int ofs, unsigned int len);
extern void ata_id_c_string(const u16 *id, unsigned char *s, extern void ata_id_c_string(const u16 *id, unsigned char *s,
unsigned int ofs, unsigned int len); unsigned int ofs, unsigned int len);
extern unsigned int ata_do_dev_read_id(struct ata_device *dev, extern unsigned int ata_do_dev_read_id(struct ata_device *dev,
struct ata_taskfile *tf, u16 *id); struct ata_taskfile *tf, __le16 *id);
extern void ata_qc_complete(struct ata_queued_cmd *qc); extern void ata_qc_complete(struct ata_queued_cmd *qc);
extern u64 ata_qc_get_active(struct ata_port *ap); extern u64 ata_qc_get_active(struct ata_port *ap);
extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd); extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd);
@ -1432,6 +1386,12 @@ extern const struct attribute_group *ata_common_sdev_groups[];
.tag_alloc_policy = BLK_TAG_ALLOC_RR, \ .tag_alloc_policy = BLK_TAG_ALLOC_RR, \
.slave_configure = ata_scsi_slave_config .slave_configure = ata_scsi_slave_config
#define ATA_SUBBASE_SHT_QD(drv_name, drv_qd) \
__ATA_BASE_SHT(drv_name), \
.can_queue = drv_qd, \
.tag_alloc_policy = BLK_TAG_ALLOC_RR, \
.slave_configure = ata_scsi_slave_config
#define ATA_BASE_SHT(drv_name) \ #define ATA_BASE_SHT(drv_name) \
ATA_SUBBASE_SHT(drv_name), \ ATA_SUBBASE_SHT(drv_name), \
.sdev_groups = ata_common_sdev_groups .sdev_groups = ata_common_sdev_groups
@ -1443,6 +1403,11 @@ extern const struct attribute_group *ata_ncq_sdev_groups[];
ATA_SUBBASE_SHT(drv_name), \ ATA_SUBBASE_SHT(drv_name), \
.sdev_groups = ata_ncq_sdev_groups, \ .sdev_groups = ata_ncq_sdev_groups, \
.change_queue_depth = ata_scsi_change_queue_depth .change_queue_depth = ata_scsi_change_queue_depth
#define ATA_NCQ_SHT_QD(drv_name, drv_qd) \
ATA_SUBBASE_SHT_QD(drv_name, drv_qd), \
.sdev_groups = ata_ncq_sdev_groups, \
.change_queue_depth = ata_scsi_change_queue_depth
#endif #endif
/* /*
@ -1487,51 +1452,61 @@ static inline int sata_srst_pmp(struct ata_link *link)
return link->pmp; return link->pmp;
} }
/* #define ata_port_printk(level, ap, fmt, ...) \
* printk helpers pr_ ## level ("ata%u: " fmt, (ap)->print_id, ##__VA_ARGS__)
*/
__printf(3, 4)
void ata_port_printk(const struct ata_port *ap, const char *level,
const char *fmt, ...);
__printf(3, 4)
void ata_link_printk(const struct ata_link *link, const char *level,
const char *fmt, ...);
__printf(3, 4)
void ata_dev_printk(const struct ata_device *dev, const char *level,
const char *fmt, ...);
#define ata_port_err(ap, fmt, ...) \ #define ata_port_err(ap, fmt, ...) \
ata_port_printk(ap, KERN_ERR, fmt, ##__VA_ARGS__) ata_port_printk(err, ap, fmt, ##__VA_ARGS__)
#define ata_port_warn(ap, fmt, ...) \ #define ata_port_warn(ap, fmt, ...) \
ata_port_printk(ap, KERN_WARNING, fmt, ##__VA_ARGS__) ata_port_printk(warn, ap, fmt, ##__VA_ARGS__)
#define ata_port_notice(ap, fmt, ...) \ #define ata_port_notice(ap, fmt, ...) \
ata_port_printk(ap, KERN_NOTICE, fmt, ##__VA_ARGS__) ata_port_printk(notice, ap, fmt, ##__VA_ARGS__)
#define ata_port_info(ap, fmt, ...) \ #define ata_port_info(ap, fmt, ...) \
ata_port_printk(ap, KERN_INFO, fmt, ##__VA_ARGS__) ata_port_printk(info, ap, fmt, ##__VA_ARGS__)
#define ata_port_dbg(ap, fmt, ...) \ #define ata_port_dbg(ap, fmt, ...) \
ata_port_printk(ap, KERN_DEBUG, fmt, ##__VA_ARGS__) ata_port_printk(debug, ap, fmt, ##__VA_ARGS__)
#define ata_link_printk(level, link, fmt, ...) \
do { \
if (sata_pmp_attached((link)->ap) || \
(link)->ap->slave_link) \
pr_ ## level ("ata%u.%02u: " fmt, \
(link)->ap->print_id, \
(link)->pmp, \
##__VA_ARGS__); \
else \
pr_ ## level ("ata%u: " fmt, \
(link)->ap->print_id, \
##__VA_ARGS__); \
} while (0)
#define ata_link_err(link, fmt, ...) \ #define ata_link_err(link, fmt, ...) \
ata_link_printk(link, KERN_ERR, fmt, ##__VA_ARGS__) ata_link_printk(err, link, fmt, ##__VA_ARGS__)
#define ata_link_warn(link, fmt, ...) \ #define ata_link_warn(link, fmt, ...) \
ata_link_printk(link, KERN_WARNING, fmt, ##__VA_ARGS__) ata_link_printk(warn, link, fmt, ##__VA_ARGS__)
#define ata_link_notice(link, fmt, ...) \ #define ata_link_notice(link, fmt, ...) \
ata_link_printk(link, KERN_NOTICE, fmt, ##__VA_ARGS__) ata_link_printk(notice, link, fmt, ##__VA_ARGS__)
#define ata_link_info(link, fmt, ...) \ #define ata_link_info(link, fmt, ...) \
ata_link_printk(link, KERN_INFO, fmt, ##__VA_ARGS__) ata_link_printk(info, link, fmt, ##__VA_ARGS__)
#define ata_link_dbg(link, fmt, ...) \ #define ata_link_dbg(link, fmt, ...) \
ata_link_printk(link, KERN_DEBUG, fmt, ##__VA_ARGS__) ata_link_printk(debug, link, fmt, ##__VA_ARGS__)
#define ata_dev_printk(level, dev, fmt, ...) \
pr_ ## level("ata%u.%02u: " fmt, \
(dev)->link->ap->print_id, \
(dev)->link->pmp + (dev)->devno, \
##__VA_ARGS__)
#define ata_dev_err(dev, fmt, ...) \ #define ata_dev_err(dev, fmt, ...) \
ata_dev_printk(dev, KERN_ERR, fmt, ##__VA_ARGS__) ata_dev_printk(err, dev, fmt, ##__VA_ARGS__)
#define ata_dev_warn(dev, fmt, ...) \ #define ata_dev_warn(dev, fmt, ...) \
ata_dev_printk(dev, KERN_WARNING, fmt, ##__VA_ARGS__) ata_dev_printk(warn, dev, fmt, ##__VA_ARGS__)
#define ata_dev_notice(dev, fmt, ...) \ #define ata_dev_notice(dev, fmt, ...) \
ata_dev_printk(dev, KERN_NOTICE, fmt, ##__VA_ARGS__) ata_dev_printk(notice, dev, fmt, ##__VA_ARGS__)
#define ata_dev_info(dev, fmt, ...) \ #define ata_dev_info(dev, fmt, ...) \
ata_dev_printk(dev, KERN_INFO, fmt, ##__VA_ARGS__) ata_dev_printk(info, dev, fmt, ##__VA_ARGS__)
#define ata_dev_dbg(dev, fmt, ...) \ #define ata_dev_dbg(dev, fmt, ...) \
ata_dev_printk(dev, KERN_DEBUG, fmt, ##__VA_ARGS__) ata_dev_printk(debug, dev, fmt, ##__VA_ARGS__)
void ata_print_version(const struct device *dev, const char *version); void ata_print_version(const struct device *dev, const char *version);
@ -2065,11 +2040,8 @@ static inline u8 ata_wait_idle(struct ata_port *ap)
{ {
u8 status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); u8 status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
#ifdef ATA_DEBUG
if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ)))
ata_port_printk(ap, KERN_DEBUG, "abnormal Status 0x%X\n", ata_port_dbg(ap, "abnormal Status 0x%X\n", status);
status);
#endif
return status; return status;
} }

416
include/trace/events/libata.h
View file

@ -132,9 +132,37 @@
ata_protocol_name(ATAPI_PROT_PIO), \ ata_protocol_name(ATAPI_PROT_PIO), \
ata_protocol_name(ATAPI_PROT_DMA)) ata_protocol_name(ATAPI_PROT_DMA))
#define ata_class_name(class) { class, #class }
#define show_class_name(val) \
__print_symbolic(val, \
ata_class_name(ATA_DEV_UNKNOWN), \
ata_class_name(ATA_DEV_ATA), \
ata_class_name(ATA_DEV_ATA_UNSUP), \
ata_class_name(ATA_DEV_ATAPI), \
ata_class_name(ATA_DEV_ATAPI_UNSUP), \
ata_class_name(ATA_DEV_PMP), \
ata_class_name(ATA_DEV_PMP_UNSUP), \
ata_class_name(ATA_DEV_SEMB), \
ata_class_name(ATA_DEV_SEMB_UNSUP), \
ata_class_name(ATA_DEV_ZAC), \
ata_class_name(ATA_DEV_ZAC_UNSUP), \
ata_class_name(ATA_DEV_NONE))
#define ata_sff_hsm_state_name(state) { state, #state }
#define show_sff_hsm_state_name(val) \
__print_symbolic(val, \
ata_sff_hsm_state_name(HSM_ST_IDLE), \
ata_sff_hsm_state_name(HSM_ST_FIRST), \
ata_sff_hsm_state_name(HSM_ST), \
ata_sff_hsm_state_name(HSM_ST_LAST), \
ata_sff_hsm_state_name(HSM_ST_ERR))
const char *libata_trace_parse_status(struct trace_seq*, unsigned char); const char *libata_trace_parse_status(struct trace_seq*, unsigned char);
#define __parse_status(s) libata_trace_parse_status(p, s) #define __parse_status(s) libata_trace_parse_status(p, s)
const char *libata_trace_parse_host_stat(struct trace_seq *, unsigned char);
#define __parse_host_stat(s) libata_trace_parse_host_stat(p, s)
const char *libata_trace_parse_eh_action(struct trace_seq *, unsigned int); const char *libata_trace_parse_eh_action(struct trace_seq *, unsigned int);
#define __parse_eh_action(a) libata_trace_parse_eh_action(p, a) #define __parse_eh_action(a) libata_trace_parse_eh_action(p, a)
@ -144,11 +172,14 @@ const char *libata_trace_parse_eh_err_mask(struct trace_seq *, unsigned int);
const char *libata_trace_parse_qc_flags(struct trace_seq *, unsigned int); const char *libata_trace_parse_qc_flags(struct trace_seq *, unsigned int);
#define __parse_qc_flags(f) libata_trace_parse_qc_flags(p, f) #define __parse_qc_flags(f) libata_trace_parse_qc_flags(p, f)
const char *libata_trace_parse_tf_flags(struct trace_seq *, unsigned int);
#define __parse_tf_flags(f) libata_trace_parse_tf_flags(p, f)
const char *libata_trace_parse_subcmd(struct trace_seq *, unsigned char, const char *libata_trace_parse_subcmd(struct trace_seq *, unsigned char,
unsigned char, unsigned char); unsigned char, unsigned char);
#define __parse_subcmd(c,f,h) libata_trace_parse_subcmd(p, c, f, h) #define __parse_subcmd(c,f,h) libata_trace_parse_subcmd(p, c, f, h)
TRACE_EVENT(ata_qc_issue, DECLARE_EVENT_CLASS(ata_qc_issue_template,
TP_PROTO(struct ata_queued_cmd *qc), TP_PROTO(struct ata_queued_cmd *qc),
@ -207,6 +238,14 @@ TRACE_EVENT(ata_qc_issue,
__entry->dev) __entry->dev)
); );
DEFINE_EVENT(ata_qc_issue_template, ata_qc_prep,
TP_PROTO(struct ata_queued_cmd *qc),
TP_ARGS(qc));
DEFINE_EVENT(ata_qc_issue_template, ata_qc_issue,
TP_PROTO(struct ata_queued_cmd *qc),
TP_ARGS(qc));
DECLARE_EVENT_CLASS(ata_qc_complete_template, DECLARE_EVENT_CLASS(ata_qc_complete_template,
TP_PROTO(struct ata_queued_cmd *qc), TP_PROTO(struct ata_queued_cmd *qc),
@ -275,6 +314,128 @@ DEFINE_EVENT(ata_qc_complete_template, ata_qc_complete_done,
TP_PROTO(struct ata_queued_cmd *qc), TP_PROTO(struct ata_queued_cmd *qc),
TP_ARGS(qc)); TP_ARGS(qc));
TRACE_EVENT(ata_tf_load,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf),
TP_ARGS(ap, tf),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned char, cmd )
__field( unsigned char, dev )
__field( unsigned char, lbal )
__field( unsigned char, lbam )
__field( unsigned char, lbah )
__field( unsigned char, nsect )
__field( unsigned char, feature )
__field( unsigned char, hob_lbal )
__field( unsigned char, hob_lbam )
__field( unsigned char, hob_lbah )
__field( unsigned char, hob_nsect )
__field( unsigned char, hob_feature )
__field( unsigned char, proto )
),
TP_fast_assign(
__entry->ata_port = ap->print_id;
__entry->proto = tf->protocol;
__entry->cmd = tf->command;
__entry->dev = tf->device;
__entry->lbal = tf->lbal;
__entry->lbam = tf->lbam;
__entry->lbah = tf->lbah;
__entry->hob_lbal = tf->hob_lbal;
__entry->hob_lbam = tf->hob_lbam;
__entry->hob_lbah = tf->hob_lbah;
__entry->feature = tf->feature;
__entry->hob_feature = tf->hob_feature;
__entry->nsect = tf->nsect;
__entry->hob_nsect = tf->hob_nsect;
),
TP_printk("ata_port=%u proto=%s cmd=%s%s " \
" tf=(%02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x)",
__entry->ata_port,
show_protocol_name(__entry->proto),
show_opcode_name(__entry->cmd),
__parse_subcmd(__entry->cmd, __entry->feature, __entry->hob_nsect),
__entry->cmd, __entry->feature, __entry->nsect,
__entry->lbal, __entry->lbam, __entry->lbah,
__entry->hob_feature, __entry->hob_nsect,
__entry->hob_lbal, __entry->hob_lbam, __entry->hob_lbah,
__entry->dev)
);
DECLARE_EVENT_CLASS(ata_exec_command_template,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf, unsigned int tag),
TP_ARGS(ap, tf, tag),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned int, tag )
__field( unsigned char, cmd )
__field( unsigned char, feature )
__field( unsigned char, hob_nsect )
__field( unsigned char, proto )
),
TP_fast_assign(
__entry->ata_port = ap->print_id;
__entry->tag = tag;
__entry->proto = tf->protocol;
__entry->cmd = tf->command;
__entry->feature = tf->feature;
__entry->hob_nsect = tf->hob_nsect;
),
TP_printk("ata_port=%u tag=%d proto=%s cmd=%s%s",
__entry->ata_port, __entry->tag,
show_protocol_name(__entry->proto),
show_opcode_name(__entry->cmd),
__parse_subcmd(__entry->cmd, __entry->feature, __entry->hob_nsect))
);
DEFINE_EVENT(ata_exec_command_template, ata_exec_command,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf, unsigned int tag),
TP_ARGS(ap, tf, tag));
DEFINE_EVENT(ata_exec_command_template, ata_bmdma_setup,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf, unsigned int tag),
TP_ARGS(ap, tf, tag));
DEFINE_EVENT(ata_exec_command_template, ata_bmdma_start,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf, unsigned int tag),
TP_ARGS(ap, tf, tag));
DEFINE_EVENT(ata_exec_command_template, ata_bmdma_stop,
TP_PROTO(struct ata_port *ap, const struct ata_taskfile *tf, unsigned int tag),
TP_ARGS(ap, tf, tag));
TRACE_EVENT(ata_bmdma_status,
TP_PROTO(struct ata_port *ap, unsigned int host_stat),
TP_ARGS(ap, host_stat),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned int, tag )
__field( unsigned char, host_stat )
),
TP_fast_assign(
__entry->ata_port = ap->print_id;
__entry->host_stat = host_stat;
),
TP_printk("ata_port=%u host_stat=%s",
__entry->ata_port,
__parse_host_stat(__entry->host_stat))
);
TRACE_EVENT(ata_eh_link_autopsy, TRACE_EVENT(ata_eh_link_autopsy,
TP_PROTO(struct ata_device *dev, unsigned int eh_action, unsigned int eh_err_mask), TP_PROTO(struct ata_device *dev, unsigned int eh_action, unsigned int eh_err_mask),
@ -329,6 +490,259 @@ TRACE_EVENT(ata_eh_link_autopsy_qc,
__parse_eh_err_mask(__entry->eh_err_mask)) __parse_eh_err_mask(__entry->eh_err_mask))
); );
DECLARE_EVENT_CLASS(ata_eh_action_template,
TP_PROTO(struct ata_link *link, unsigned int devno, unsigned int eh_action),
TP_ARGS(link, devno, eh_action),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned int, ata_dev )
__field( unsigned int, eh_action )
),
TP_fast_assign(
__entry->ata_port = link->ap->print_id;
__entry->ata_dev = link->pmp + devno;
__entry->eh_action = eh_action;
),
TP_printk("ata_port=%u ata_dev=%u eh_action=%s",
__entry->ata_port, __entry->ata_dev,
__parse_eh_action(__entry->eh_action))
);
DEFINE_EVENT(ata_eh_action_template, ata_eh_about_to_do,
TP_PROTO(struct ata_link *link, unsigned int devno, unsigned int eh_action),
TP_ARGS(link, devno, eh_action));
DEFINE_EVENT(ata_eh_action_template, ata_eh_done,
TP_PROTO(struct ata_link *link, unsigned int devno, unsigned int eh_action),
TP_ARGS(link, devno, eh_action));
DECLARE_EVENT_CLASS(ata_link_reset_begin_template,
TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
TP_ARGS(link, class, deadline),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__array( unsigned int, class, 2 )
__field( unsigned long, deadline )
),
TP_fast_assign(
__entry->ata_port = link->ap->print_id;
memcpy(__entry->class, class, 2);
__entry->deadline = deadline;
),
TP_printk("ata_port=%u deadline=%lu classes=[%s,%s]",
__entry->ata_port, __entry->deadline,
show_class_name(__entry->class[0]),
show_class_name(__entry->class[1]))
);
DEFINE_EVENT(ata_link_reset_begin_template, ata_link_hardreset_begin,
TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
TP_ARGS(link, class, deadline));
DEFINE_EVENT(ata_link_reset_begin_template, ata_slave_hardreset_begin,
TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
TP_ARGS(link, class, deadline));
DEFINE_EVENT(ata_link_reset_begin_template, ata_link_softreset_begin,
TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
TP_ARGS(link, class, deadline));
DECLARE_EVENT_CLASS(ata_link_reset_end_template,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__array( unsigned int, class, 2 )
__field( int, rc )
),
TP_fast_assign(
__entry->ata_port = link->ap->print_id;
memcpy(__entry->class, class, 2);
__entry->rc = rc;
),
TP_printk("ata_port=%u rc=%d class=[%s,%s]",
__entry->ata_port, __entry->rc,
show_class_name(__entry->class[0]),
show_class_name(__entry->class[1]))
);
DEFINE_EVENT(ata_link_reset_end_template, ata_link_hardreset_end,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc));
DEFINE_EVENT(ata_link_reset_end_template, ata_slave_hardreset_end,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc));
DEFINE_EVENT(ata_link_reset_end_template, ata_link_softreset_end,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc));
DEFINE_EVENT(ata_link_reset_end_template, ata_link_postreset,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc));
DEFINE_EVENT(ata_link_reset_end_template, ata_slave_postreset,
TP_PROTO(struct ata_link *link, unsigned int *class, int rc),
TP_ARGS(link, class, rc));
DECLARE_EVENT_CLASS(ata_port_eh_begin_template,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
),
TP_fast_assign(
__entry->ata_port = ap->print_id;
),
TP_printk("ata_port=%u", __entry->ata_port)
);
DEFINE_EVENT(ata_port_eh_begin_template, ata_std_sched_eh,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap));
DEFINE_EVENT(ata_port_eh_begin_template, ata_port_freeze,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap));
DEFINE_EVENT(ata_port_eh_begin_template, ata_port_thaw,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap));
DECLARE_EVENT_CLASS(ata_sff_hsm_template,
TP_PROTO(struct ata_queued_cmd *qc, unsigned char status),
TP_ARGS(qc, status),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned int, ata_dev )
__field( unsigned int, tag )
__field( unsigned int, qc_flags )
__field( unsigned int, protocol )
__field( unsigned int, hsm_state )
__field( unsigned char, dev_state )
),
TP_fast_assign(
__entry->ata_port = qc->ap->print_id;
__entry->ata_dev = qc->dev->link->pmp + qc->dev->devno;
__entry->tag = qc->tag;
__entry->qc_flags = qc->flags;
__entry->protocol = qc->tf.protocol;
__entry->hsm_state = qc->ap->hsm_task_state;
__entry->dev_state = status;
),
TP_printk("ata_port=%u ata_dev=%u tag=%d proto=%s flags=%s task_state=%s dev_stat=0x%X",
__entry->ata_port, __entry->ata_dev, __entry->tag,
show_protocol_name(__entry->protocol),
__parse_qc_flags(__entry->qc_flags),
show_sff_hsm_state_name(__entry->hsm_state),
__entry->dev_state)
);
DEFINE_EVENT(ata_sff_hsm_template, ata_sff_hsm_state,
TP_PROTO(struct ata_queued_cmd *qc, unsigned char state),
TP_ARGS(qc, state));
DEFINE_EVENT(ata_sff_hsm_template, ata_sff_hsm_command_complete,
TP_PROTO(struct ata_queued_cmd *qc, unsigned char state),
TP_ARGS(qc, state));
DEFINE_EVENT(ata_sff_hsm_template, ata_sff_port_intr,
TP_PROTO(struct ata_queued_cmd *qc, unsigned char state),
TP_ARGS(qc, state));
DECLARE_EVENT_CLASS(ata_transfer_data_template,
TP_PROTO(struct ata_queued_cmd *qc, unsigned int offset, unsigned int count),
TP_ARGS(qc, offset, count),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned int, ata_dev )
__field( unsigned int, tag )
__field( unsigned int, flags )
__field( unsigned int, offset )
__field( unsigned int, bytes )
),
TP_fast_assign(
__entry->ata_port = qc->ap->print_id;
__entry->ata_dev = qc->dev->link->pmp + qc->dev->devno;
__entry->tag = qc->tag;
__entry->flags = qc->tf.flags;
__entry->offset = offset;
__entry->bytes = count;
),
TP_printk("ata_port=%u ata_dev=%u tag=%d flags=%s offset=%u bytes=%u",
__entry->ata_port, __entry->ata_dev, __entry->tag,
__parse_tf_flags(__entry->flags),
__entry->offset, __entry->bytes)
);
DEFINE_EVENT(ata_transfer_data_template, ata_sff_pio_transfer_data,
TP_PROTO(struct ata_queued_cmd *qc, unsigned int offset, unsigned int count),
TP_ARGS(qc, offset, count));
DEFINE_EVENT(ata_transfer_data_template, atapi_pio_transfer_data,
TP_PROTO(struct ata_queued_cmd *qc, unsigned int offset, unsigned int count),
TP_ARGS(qc, offset, count));
DEFINE_EVENT(ata_transfer_data_template, atapi_send_cdb,
TP_PROTO(struct ata_queued_cmd *qc, unsigned int offset, unsigned int count),
TP_ARGS(qc, offset, count));
DECLARE_EVENT_CLASS(ata_sff_template,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap),
TP_STRUCT__entry(
__field( unsigned int, ata_port )
__field( unsigned char, hsm_state )
),
TP_fast_assign(
__entry->ata_port = ap->print_id;
__entry->hsm_state = ap->hsm_task_state;
),
TP_printk("ata_port=%u task_state=%s",
__entry->ata_port,
show_sff_hsm_state_name(__entry->hsm_state))
);
DEFINE_EVENT(ata_sff_template, ata_sff_flush_pio_task,
TP_PROTO(struct ata_port *ap),
TP_ARGS(ap));
#endif /* _TRACE_LIBATA_H */ #endif /* _TRACE_LIBATA_H */
/* This part must be outside protection */ /* This part must be outside protection */