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2 commits

Author SHA1 Message Date
Mauro Rossi
00ecc6e6d4 drm/amdgpu: enable ABGR and XBGR formats (v2) 
Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled

(v2) Crossbar registers are defined and used to swap red and blue channels,
     keeping the existing coding style in each of the dce modules.
     After setting crossbar bits in fb_swap, use bitwise OR for big endian
     where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD()

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:10:19 -05:00
Alex Deucher
689957b12b drm/amdgpu: move misc si headers into amdgpu 
Move these to the amdgpu directory to match what we
do for other asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-01-27 12:20:41 -05:00
Renamed from drivers/gpu/drm/amd/include/asic_reg/si/sid.h (Browse further)