Thierry Reding 0e43b8da15 gpu: host1x: Use correct semantics for HOST1X_CHANNEL_DMAEND ... The HOST1X_CHANNEL_DMAEND is an offset relative to the value written to the HOST1X_CHANNEL_DMASTART register, but it is currently treated as an absolute address. This can cause SMMU faults if the CDMA fetches past a pushbuffer's IOMMU mapping. Properly setting the DMAEND prevents the CDMA from fetching beyond that address and avoid such issues. This is currently not observed because a whole (almost) page of essentially scratch space absorbs any excessive prefetching by CDMA. However, changing the number of slots in the push buffer can trigger these SMMU faults. Signed-off-by: Thierry Reding <treding@nvidia.com>		2019-02-07 18:28:58 +01:00
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hw	gpu: host1x: Use correct semantics for HOST1X_CHANNEL_DMAEND	2019-02-07 18:28:58 +01:00
bus.c	gpu: host1x: Represent host1x bus devices in debugfs	2019-02-04 08:35:54 +01:00
bus.h
cdma.c	gpu: host1x: Introduce support for wide opcodes	2019-02-07 18:28:35 +01:00
cdma.h	gpu: host1x: Introduce support for wide opcodes	2019-02-07 18:28:35 +01:00
channel.c
channel.h
debug.c
debug.h
dev.c	gpu: host1x: Support 40-bit addressing on Tegra186	2019-02-07 18:28:58 +01:00
dev.h	gpu: host1x: Set up stream ID table	2019-02-04 08:35:55 +01:00
intr.c
intr.h
job.c	gpu: host1x: Check whether size of unpin isn't 0	2018-07-09 10:31:30 +02:00
job.h
Kconfig
Makefile	gpu: host1x: Add Tegra194 support	2018-11-29 17:11:49 +01:00
mipi.c
syncpt.c
syncpt.h