Claudiu Beznea 7a94b83a7d ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh ... On SAMA7G5, when resuming from backup and self-refresh, the bootloader performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored in RAM by Linux before going to backup and self-refresh). It has been discovered that the current procedure doesn't work for all possible values that might go to ZQ0SR0 due to hardware bug. The workaround to this is to avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0 register and cache its value in RAM after processing it (using modified_gray_code array). The bootloader will restore the processed value. Fixes: d2d4716d83 ("ARM: at91: pm: save ddr phy calibration data to securam") Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com		2022-08-31 10:28:18 +03:00
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.gitignore
at91rm9200.c
at91sam9.c
generic.h
Kconfig	AT91 SoC #2 for 5.19:	2022-05-27 15:56:30 +02:00
Makefile	ARM: at91: add code to handle secure calls	2022-05-12 14:50:20 +03:00
Makefile.boot
pm.c	ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh	2022-08-31 10:28:18 +03:00
pm.h
pm_data-offsets.c
pm_suspend.S	ARM: at91: pm: fix self-refresh for sama7g5	2022-08-31 10:27:57 +03:00
sam9x60.c
sam_secure.c	ARM: at91: add sam_linux_is_optee_available() function	2022-07-20 11:03:45 +03:00
sam_secure.h	ARM: at91: add sam_linux_is_optee_available() function	2022-07-20 11:03:45 +03:00
sama5.c	ARM: at91: setup outer cache .write_sec() callback if needed	2022-07-20 11:05:48 +03:00
sama7.c
samv7.c