Likun Gao 44e7139b45 drm/amd/powerplay: and smc dpm info struct for sienna_cichlid ... And atom_smc_dpm_info_v4_9 struct for sienna_cichlid use. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-01 01:59:13 -04:00
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asic_reg	drm/amd/display: Add dcn30 Headers (v2)	2020-06-03 13:51:56 -04:00
ivsrcid	drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)	2020-06-03 13:52:03 -04:00
amd_acpi.h
amd_pcie.h
amd_pcie_helpers.h
amd_shared.h	drm/amdgpu: add apu flags (v2)	2020-05-22 13:41:53 -04:00
arct_ip_offset.h
atom-bits.h
atom-names.h
atom-types.h
atombios.h
atomfirmware.h	drm/amd/powerplay: and smc dpm info struct for sienna_cichlid	2020-07-01 01:59:13 -04:00
atomfirmwareid.h
cgs_common.h	drm/amdgpu: retire indirect mmio reg support from cgs	2020-04-09 10:43:18 -04:00
cik_structs.h
discovery.h
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm/amdkfd: Consolidate duplicated bo alloc flags	2020-03-10 15:54:34 -04:00
kgd_pp_interface.h
navi10_enum.h
navi10_ip_offset.h
navi12_ip_offset.h
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h
sienna_cichlid_ip_offset.h	drm/amdgpu: initialize IP offset for sienna_cichlid (v2)	2020-06-03 13:52:00 -04:00
soc15_hw_ip.h
soc15_ih_clientid.h	drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid	2020-06-03 13:52:04 -04:00
v9_structs.h
v10_structs.h
vega10_enum.h
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h