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4d6ddfa924
tlb_is_full_mm? What does that mean? The TLB is full? No, it means that the mm's last user has gone and the whole mm is being torn down. And it's an inline function because sparc64 uses a different (slightly better) "tlb_frozen" name for the flag others call "fullmm". And now the ptep_get_and_clear_full macro used in zap_pte_range refers directly to tlb->fullmm, which would be wrong for sparc64. Rather than correct that, I'd prefer to scrap tlb_is_full_mm altogether, and change sparc64 to just use the same poor name as everyone else - is that okay? Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
151 lines
3.1 KiB
C
151 lines
3.1 KiB
C
/* arch/sparc64/mm/tlb.c
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*
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* Copyright (C) 2004 David S. Miller <davem@redhat.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/mmu_context.h>
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#include <asm/tlb.h>
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/* Heavily inspired by the ppc64 code. */
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DEFINE_PER_CPU(struct mmu_gather, mmu_gathers) =
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{ NULL, 0, 0, 0, 0, 0, { 0 }, { NULL }, };
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void flush_tlb_pending(void)
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{
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struct mmu_gather *mp = &__get_cpu_var(mmu_gathers);
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if (mp->tlb_nr) {
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if (CTX_VALID(mp->mm->context)) {
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#ifdef CONFIG_SMP
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smp_flush_tlb_pending(mp->mm, mp->tlb_nr,
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&mp->vaddrs[0]);
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#else
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__flush_tlb_pending(CTX_HWBITS(mp->mm->context),
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mp->tlb_nr, &mp->vaddrs[0]);
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#endif
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}
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mp->tlb_nr = 0;
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}
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}
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void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig)
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{
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struct mmu_gather *mp = &__get_cpu_var(mmu_gathers);
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unsigned long nr;
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vaddr &= PAGE_MASK;
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if (pte_exec(orig))
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vaddr |= 0x1UL;
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if (pte_dirty(orig)) {
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unsigned long paddr, pfn = pte_pfn(orig);
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struct address_space *mapping;
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struct page *page;
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if (!pfn_valid(pfn))
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goto no_cache_flush;
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page = pfn_to_page(pfn);
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if (PageReserved(page))
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goto no_cache_flush;
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/* A real file page? */
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mapping = page_mapping(page);
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if (!mapping)
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goto no_cache_flush;
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paddr = (unsigned long) page_address(page);
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if ((paddr ^ vaddr) & (1 << 13))
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flush_dcache_page_all(mm, page);
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}
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no_cache_flush:
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if (mp->fullmm)
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return;
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nr = mp->tlb_nr;
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if (unlikely(nr != 0 && mm != mp->mm)) {
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flush_tlb_pending();
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nr = 0;
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}
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if (nr == 0)
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mp->mm = mm;
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mp->vaddrs[nr] = vaddr;
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mp->tlb_nr = ++nr;
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if (nr >= TLB_BATCH_NR)
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flush_tlb_pending();
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}
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void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
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{
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struct mmu_gather *mp = &__get_cpu_var(mmu_gathers);
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unsigned long nr = mp->tlb_nr;
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long s = start, e = end, vpte_base;
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if (mp->fullmm)
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return;
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/* If start is greater than end, that is a real problem. */
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BUG_ON(start > end);
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/* However, straddling the VA space hole is quite normal. */
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s &= PMD_MASK;
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e = (e + PMD_SIZE - 1) & PMD_MASK;
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vpte_base = (tlb_type == spitfire ?
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VPTE_BASE_SPITFIRE :
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VPTE_BASE_CHEETAH);
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if (unlikely(nr != 0 && mm != mp->mm)) {
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flush_tlb_pending();
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nr = 0;
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}
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if (nr == 0)
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mp->mm = mm;
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start = vpte_base + (s >> (PAGE_SHIFT - 3));
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end = vpte_base + (e >> (PAGE_SHIFT - 3));
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/* If the request straddles the VA space hole, we
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* need to swap start and end. The reason this
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* occurs is that "vpte_base" is the center of
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* the linear page table mapping area. Thus,
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* high addresses with the sign bit set map to
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* addresses below vpte_base and non-sign bit
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* addresses map to addresses above vpte_base.
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*/
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if (end < start) {
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unsigned long tmp = start;
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start = end;
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end = tmp;
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}
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while (start < end) {
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mp->vaddrs[nr] = start;
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mp->tlb_nr = ++nr;
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if (nr >= TLB_BATCH_NR) {
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flush_tlb_pending();
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nr = 0;
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}
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start += PAGE_SIZE;
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}
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if (nr)
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flush_tlb_pending();
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}
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