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https://github.com/Fishwaldo/Star64_linux.git
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3dee9fb2a4
Pull RAS updates from Ingo Molnar:
"The main changes in this cycle were:
- add the 'Corrected Errors Collector' kernel feature which collect
and monitor correctable errors statistics and will preemptively
(soft-)offline physical pages that have a suspiciously high error
count.
- handle MCE errors during kexec() more gracefully
- factor out and deprecate the /dev/mcelog driver
- ... plus misc fixes and cleanpus"
* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only
ACPI/APEI: Use setup_deferrable_timer()
x86/mce: Update notifier priority check
x86/mce: Enable PPIN for Knights Landing/Mill
x86/mce: Do not register notifiers with invalid prio
x86/mce: Factor out and deprecate the /dev/mcelog driver
RAS: Add a Corrected Errors Collector
x86/mce: Rename mce_log to mce_log_buffer
x86/mce: Rename mce_log()'s argument
x86/mce: Init some CPU features early
x86/mce: Handle broadcasted MCE gracefully with kexec
106 lines
2.7 KiB
C
106 lines
2.7 KiB
C
#include <linux/device.h>
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#include <asm/mce.h>
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enum severity_level {
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MCE_NO_SEVERITY,
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MCE_DEFERRED_SEVERITY,
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MCE_UCNA_SEVERITY = MCE_DEFERRED_SEVERITY,
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MCE_KEEP_SEVERITY,
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MCE_SOME_SEVERITY,
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MCE_AO_SEVERITY,
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MCE_UC_SEVERITY,
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MCE_AR_SEVERITY,
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MCE_PANIC_SEVERITY,
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};
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extern struct blocking_notifier_head x86_mce_decoder_chain;
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#define ATTR_LEN 16
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#define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
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/* One object for each MCE bank, shared by all CPUs */
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struct mce_bank {
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u64 ctl; /* subevents to enable */
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unsigned char init; /* initialise bank? */
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struct device_attribute attr; /* device attribute */
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char attrname[ATTR_LEN]; /* attribute name */
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};
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struct mce_evt_llist {
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struct llist_node llnode;
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struct mce mce;
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};
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void mce_gen_pool_process(struct work_struct *__unused);
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bool mce_gen_pool_empty(void);
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int mce_gen_pool_add(struct mce *mce);
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int mce_gen_pool_init(void);
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struct llist_node *mce_gen_pool_prepare_records(void);
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extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp);
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struct dentry *mce_get_debugfs_dir(void);
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extern struct mce_bank *mce_banks;
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extern mce_banks_t mce_banks_ce_disabled;
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#ifdef CONFIG_X86_MCE_INTEL
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unsigned long cmci_intel_adjust_timer(unsigned long interval);
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bool mce_intel_cmci_poll(void);
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void mce_intel_hcpu_update(unsigned long cpu);
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void cmci_disable_bank(int bank);
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#else
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# define cmci_intel_adjust_timer mce_adjust_timer_default
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static inline bool mce_intel_cmci_poll(void) { return false; }
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static inline void mce_intel_hcpu_update(unsigned long cpu) { }
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static inline void cmci_disable_bank(int bank) { }
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#endif
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void mce_timer_kick(unsigned long interval);
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#ifdef CONFIG_ACPI_APEI
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int apei_write_mce(struct mce *m);
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ssize_t apei_read_mce(struct mce *m, u64 *record_id);
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int apei_check_mce(void);
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int apei_clear_mce(u64 record_id);
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#else
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static inline int apei_write_mce(struct mce *m)
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{
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return -EINVAL;
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}
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static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id)
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{
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return 0;
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}
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static inline int apei_check_mce(void)
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{
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return 0;
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}
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static inline int apei_clear_mce(u64 record_id)
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{
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return -EINVAL;
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}
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#endif
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void mce_inject_log(struct mce *m);
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/*
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* We consider records to be equivalent if bank+status+addr+misc all match.
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* This is only used when the system is going down because of a fatal error
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* to avoid cluttering the console log with essentially repeated information.
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* In normal processing all errors seen are logged.
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*/
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static inline bool mce_cmp(struct mce *m1, struct mce *m2)
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{
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return m1->bank != m2->bank ||
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m1->status != m2->status ||
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m1->addr != m2->addr ||
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m1->misc != m2->misc;
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}
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extern struct device_attribute dev_attr_trigger;
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#ifdef CONFIG_X86_MCELOG_LEGACY
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extern void mce_work_trigger(void);
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#else
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static inline void mce_work_trigger(void) { }
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#endif
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