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Mark Yao 5e3bc6d1ab drm/rockchip: dw_hdmi: introduce the VPLL clock setting
For RK3399 HDMI, there is an external clock need for HDMI PHY,
and it should keep the same clock rate with VOP DCLK.

VPLL have supported the clock for HDMI PHY, but there is no
clock divider bewteen VPLL and HDMI PHY. So we need to set the
VPLL rate manually in HDMI driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
2017-06-23 08:52:03 +08:00
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Documentation drm/rockchip: dw_hdmi: introduce the VPLL clock setting 2017-06-23 08:52:03 +08:00
drivers drm/rockchip: dw_hdmi: introduce the VPLL clock setting 2017-06-23 08:52:03 +08:00
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include drm: Add drm_atomic_helper_wait_for_flip_done() 2017-06-22 15:11:51 +02:00
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Linux kernel
============

This file was moved to Documentation/admin-guide/README.rst

Please notice that there are several guides for kernel developers and users.
These guides can be rendered in a number of formats, like HTML and PDF.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
See Documentation/00-INDEX for a list of what is contained in each file.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.