Isabel Zhang 685b4d8142 drm/amd/display: Force prefetch mode to 0 ... [Why] On APU should be always using prefetch mode 0. Currently, sometimes prefetch mode 1 is being used causing system to hard hang due to minTTUVBlank being too low. [How] Any ASIC running DCN21 will by default allow self refresh and mclk switch. This sets both min and max prefetch mode to 0 by default. Signed-off-by: Isabel Zhang <isabel.zhang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-11-02 15:29:59 -05:00
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amdgpu_dm	drm/amd/display: Clean up GFX9 tiling_flags path.	2020-10-30 14:27:23 -04:00
dc	drm/amd/display: Force prefetch mode to 0	2020-11-02 15:29:59 -05:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.38	2020-10-26 13:33:46 -04:00
include	drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE	2020-10-30 01:02:03 -04:00
modules	drm/amdgpu: fix build_coefficients() argument	2020-11-01 20:02:01 -05:00
Kconfig	drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE	2020-10-30 01:02:03 -04:00
Makefile
TODO