Konrad Dybcio 694dd304cc drm/msm/dsi: Add phy configuration for SDM630/636/660 ... These SoCs make use of the 14nm phy, but at different addresses than other 14nm units. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>		2020-07-31 06:46:17 -07:00
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phy	drm/msm/dsi: Add phy configuration for SDM630/636/660	2020-07-31 06:46:17 -07:00
pll	drm/msm/dsi/pll: call vco set rate explicitly	2020-02-13 13:49:52 -08:00
dsi.c	drm/msm/dpu: ensure device suspend happens during PM sleep	2020-07-30 13:44:52 -07:00
dsi.h	drm/msm/dsi: split clk rate setting and enable	2020-01-04 08:52:04 -08:00
dsi.xml.h	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00
dsi_cfg.c	drm/msm: add DSI support for sc7180	2020-01-07 08:25:56 -08:00
dsi_cfg.h	drm/msm: add DSI support for sc7180	2020-01-07 08:25:56 -08:00
dsi_host.c	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00
dsi_manager.c	Linux 5.6-rc5	2020-03-11 07:27:21 +10:00
mmss_cc.xml.h	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00
sfpb.xml.h	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00