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bff3ff5254
For certain SiFive CPUs, "sfence.vma addr" cannot exactly flush addr from TLB in the particular cases. The details could be found here: https://sifive.cdn.prismic.io/sifive/167a1a56-03f4-4615-a79e-b2a86153148f_FU740_errata_20210205.pdf In order to ensure the functionality, this patch uses the Alternative scheme to replace all "sfence.vma addr" with "sfence.vma" at runtime. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
106 lines
2.8 KiB
C
106 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021 Sifive.
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/bug.h>
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#include <asm/patch.h>
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#include <asm/alternative.h>
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#include <asm/vendorid_list.h>
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#include <asm/errata_list.h>
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struct errata_info_t {
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char name[ERRATA_STRING_LENGTH_MAX];
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bool (*check_func)(unsigned long arch_id, unsigned long impid);
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};
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static bool errata_cip_453_check_func(unsigned long arch_id, unsigned long impid)
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{
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/*
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* Affected cores:
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* Architecture ID: 0x8000000000000007
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* Implement ID: 0x20181004 <= impid <= 0x20191105
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*/
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if (arch_id != 0x8000000000000007 ||
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(impid < 0x20181004 || impid > 0x20191105))
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return false;
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return true;
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}
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static bool errata_cip_1200_check_func(unsigned long arch_id, unsigned long impid)
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{
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/*
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* Affected cores:
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* Architecture ID: 0x8000000000000007 or 0x1
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* Implement ID: mimpid[23:0] <= 0x200630 and mimpid != 0x01200626
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*/
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if (arch_id != 0x8000000000000007 && arch_id != 0x1)
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return false;
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if ((impid & 0xffffff) > 0x200630 || impid == 0x1200626)
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return false;
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return true;
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}
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static struct errata_info_t errata_list[ERRATA_SIFIVE_NUMBER] = {
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{
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.name = "cip-453",
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.check_func = errata_cip_453_check_func
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},
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{
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.name = "cip-1200",
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.check_func = errata_cip_1200_check_func
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},
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};
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static u32 __init sifive_errata_probe(unsigned long archid, unsigned long impid)
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{
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int idx;
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u32 cpu_req_errata = 0;
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for (idx = 0; idx < ERRATA_SIFIVE_NUMBER; idx++)
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if (errata_list[idx].check_func(archid, impid))
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cpu_req_errata |= (1U << idx);
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return cpu_req_errata;
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}
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static void __init warn_miss_errata(u32 miss_errata)
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{
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int i;
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pr_warn("----------------------------------------------------------------\n");
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pr_warn("WARNING: Missing the following errata may cause potential issues\n");
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for (i = 0; i < ERRATA_SIFIVE_NUMBER; i++)
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if (miss_errata & 0x1 << i)
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pr_warn("\tSiFive Errata[%d]:%s\n", i, errata_list[i].name);
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pr_warn("Please enable the corresponding Kconfig to apply them\n");
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pr_warn("----------------------------------------------------------------\n");
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}
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void __init sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
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unsigned long archid, unsigned long impid)
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{
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struct alt_entry *alt;
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u32 cpu_req_errata = sifive_errata_probe(archid, impid);
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u32 cpu_apply_errata = 0;
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u32 tmp;
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for (alt = begin; alt < end; alt++) {
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if (alt->vendor_id != SIFIVE_VENDOR_ID)
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continue;
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if (alt->errata_id >= ERRATA_SIFIVE_NUMBER) {
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WARN(1, "This errata id:%d is not in kernel errata list", alt->errata_id);
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continue;
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}
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tmp = (1U << alt->errata_id);
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if (cpu_req_errata & tmp) {
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patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
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cpu_apply_errata |= tmp;
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}
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}
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if (cpu_apply_errata != cpu_req_errata)
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warn_miss_errata(cpu_req_errata - cpu_apply_errata);
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}
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