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When DCT QPs work in RoCE LAG mode: 1. DCT creation is allowed only when it is supported 2. The "port" of a DCT QP is assigned in a round-robin way Link: https://lore.kernel.org/r/20200818115245.700581-3-leon@kernel.org Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> |
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.. | ||
accel.h | ||
cq.h | ||
device.h | ||
doorbell.h | ||
driver.h | ||
eq.h | ||
eswitch.h | ||
fs.h | ||
fs_helpers.h | ||
mlx5_ifc.h | ||
mlx5_ifc_fpga.h | ||
port.h | ||
qp.h | ||
rsc_dump.h | ||
transobj.h | ||
vport.h |