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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
71 lines
1.6 KiB
C
71 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*/
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#include "main.h"
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void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val)
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{
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void __iomem *addr = pdata->resources.base_addr + offset;
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iowrite32(val, addr);
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}
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u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset)
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{
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void __iomem *addr = pdata->resources.base_addr + offset;
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return ioread32(addr);
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}
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int xge_port_reset(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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struct device *dev = &pdata->pdev->dev;
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u32 data, wait = 10;
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xge_wr_csr(pdata, ENET_CLKEN, 0x3);
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xge_wr_csr(pdata, ENET_SRST, 0xf);
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xge_wr_csr(pdata, ENET_SRST, 0);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0);
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do {
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usleep_range(100, 110);
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data = xge_rd_csr(pdata, BLOCK_MEM_RDY);
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} while (data != MEM_RDY && wait--);
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if (data != MEM_RDY) {
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dev_err(dev, "ECC init failed: %x\n", data);
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return -ETIMEDOUT;
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}
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xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);
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return 0;
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}
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static void xge_traffic_resume(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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xge_wr_csr(pdata, CFG_FORCE_LINK_STATUS_EN, 1);
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xge_wr_csr(pdata, FORCE_LINK_STATUS, 1);
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xge_wr_csr(pdata, CFG_LINK_AGGR_RESUME, 1);
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xge_wr_csr(pdata, RX_DV_GATE_REG, 1);
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}
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void xge_port_init(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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pdata->phy_speed = SPEED_1000;
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xge_mac_init(pdata);
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xge_traffic_resume(ndev);
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}
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