Star64_linux/include/linux/soc/mediatek/mtk-cmdq.h
Linus Torvalds b682242f60 - qcom : enable support for ipq8074, sm1850 and sm7180.
add child device node for qcs404.
          misc fixes.
 
 - mediatek : enable support for mt8183.
           misc rejig of cmdq driver.
           new client-reg dt property.
 
 - armada: use device-managed registration api
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAl2CUw8ACgkQf9lkf8eY
 P5XWdQ/+JMGoG8nbTkFdvgnRXvxdtZLylOTotnEpYtIOQ6qAckkOc0rGih3qXXRq
 5FUCynImnx0Pqjso8ny8xSqfGy2B1f87tg+GD2r38XjLPo+5gJMkd5aCZ4JtEKZQ
 ms+23pPXCLhh6bej6WW3fmuwk8T3USWfGGhRFQOHN9e152dThXt3vvLo40vy/GD5
 xT2qChONXmyPrG1F3qJhGcHuiubBzZ2mxfEC294PyVwWKdaJ5StlBmSQpomJsJP3
 v04SNI8P/gMtNhFfIVks9Hj1eu2PlO7p+4DpyhBDQii5Dzv+bSnJHIJch6DOYdou
 h1aezWGHdJ5IcJTZcKVq0a8wyCoOGFU6znQQKRDtIdpgoDfGVmIe2bheFB4ePXOQ
 XI9gsNGBrgS4uA5lJKJyJrAokXpTCiwA69c7UULRPKa0jbmVwbrJxxbLYL4k5euC
 Qi6r3qPxvJ+3kYzegqtzHRYx9s+3Bt0CkHG8hv/XtETzM2Jg7TXy9yEF6d53jFAx
 f0eU7PWdfM8TbQYGQ67BRYtSITaL8TgVafby5S1T9jLA5QnCAf4/TMCtJjxvCOVp
 hMBm9JCnQ2U9c8geGkcU51Oz78sdTByE+q0Rzw6C9jFQxECRiSC/a7tvI7Pkui4y
 w9UpCJNfypGHi+WT/UuCePi2JlnPRVCquKR2TEb8BZQKTEV4owk=
 =V6QY
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom:
     - enable support for ipq8074, sm1850 and sm7180
     - add child device node for qcs404
     - misc fixes

 - mediatek:
     - enable support for mt8183
     - misc rejig of cmdq driver
     - new client-reg dt property

 - armada:
     - use device-managed registration api

* tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-apcs: fix max_register value
  mailbox: qcom: Add support for IPQ8074 APCS
  dt-bindings: mailbox: qom: Add ipq8074 APPS compatible
  mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
  dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs
  mbox: qcom: replace integer with valid macro
  mbox: qcom: add APCS child device for QCS404
  mailbox: mediatek: cmdq: clear the event in cmdq initial flow
  mailbox: mediatek: cmdq: support mt8183 gce function
  mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
  dt-binding: gce: add binding for gce client reg property
  dt-binding: gce: add gce header file for mt8183
  dt-binding: gce: remove thread-num property
  mailbox: armada-37xx-rwtm: Use device-managed registration API
2019-09-19 14:01:47 -07:00

130 lines
3.7 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2018 MediaTek Inc.
*
*/
#ifndef __MTK_CMDQ_H__
#define __MTK_CMDQ_H__
#include <linux/mailbox_client.h>
#include <linux/mailbox/mtk-cmdq-mailbox.h>
#include <linux/timer.h>
#define CMDQ_NO_TIMEOUT 0xffffffffu
struct cmdq_pkt;
struct cmdq_client {
spinlock_t lock;
u32 pkt_cnt;
struct mbox_client client;
struct mbox_chan *chan;
struct timer_list timer;
u32 timeout_ms; /* in unit of microsecond */
};
/**
* cmdq_mbox_create() - create CMDQ mailbox client and channel
* @dev: device of CMDQ mailbox client
* @index: index of CMDQ mailbox channel
* @timeout: timeout of a pkt execution by GCE, in unit of microsecond, set
* CMDQ_NO_TIMEOUT if a timer is not used.
*
* Return: CMDQ mailbox client pointer
*/
struct cmdq_client *cmdq_mbox_create(struct device *dev, int index,
u32 timeout);
/**
* cmdq_mbox_destroy() - destroy CMDQ mailbox client and channel
* @client: the CMDQ mailbox client
*/
void cmdq_mbox_destroy(struct cmdq_client *client);
/**
* cmdq_pkt_create() - create a CMDQ packet
* @client: the CMDQ mailbox client
* @size: required CMDQ buffer size
*
* Return: CMDQ packet pointer
*/
struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size);
/**
* cmdq_pkt_destroy() - destroy the CMDQ packet
* @pkt: the CMDQ packet
*/
void cmdq_pkt_destroy(struct cmdq_pkt *pkt);
/**
* cmdq_pkt_write() - append write command to the CMDQ packet
* @pkt: the CMDQ packet
* @subsys: the CMDQ sub system code
* @offset: register offset from CMDQ sub system
* @value: the specified target register value
*
* Return: 0 for success; else the error code is returned
*/
int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
/**
* cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
* @pkt: the CMDQ packet
* @subsys: the CMDQ sub system code
* @offset: register offset from CMDQ sub system
* @value: the specified target register value
* @mask: the specified target register mask
*
* Return: 0 for success; else the error code is returned
*/
int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask);
/**
* cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
* @pkt: the CMDQ packet
* @event: the desired event type to "wait and CLEAR"
*
* Return: 0 for success; else the error code is returned
*/
int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
/**
* cmdq_pkt_clear_event() - append clear event command to the CMDQ packet
* @pkt: the CMDQ packet
* @event: the desired event to be cleared
*
* Return: 0 for success; else the error code is returned
*/
int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
/**
* cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
* packet and call back at the end of done packet
* @pkt: the CMDQ packet
* @cb: called at the end of done packet
* @data: this data will pass back to cb
*
* Return: 0 for success; else the error code is returned
*
* Trigger CMDQ to asynchronously execute the CMDQ packet and call back
* at the end of done packet. Note that this is an ASYNC function. When the
* function returned, it may or may not be finished.
*/
int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
void *data);
/**
* cmdq_pkt_flush() - trigger CMDQ to execute the CMDQ packet
* @pkt: the CMDQ packet
*
* Return: 0 for success; else the error code is returned
*
* Trigger CMDQ to execute the CMDQ packet. Note that this is a
* synchronous flush function. When the function returned, the recorded
* commands have been done.
*/
int cmdq_pkt_flush(struct cmdq_pkt *pkt);
#endif /* __MTK_CMDQ_H__ */