Star64_linux/drivers/gpu/drm/vc4
Maxime Ripard b51cd7ad14
drm/vc4: hvs: Fix frame count register readout
In order to get the field currently being output, the driver has been
using the display FIFO frame count in the HVS, reading a 6-bit field at
the offset 12 in the DISPSTATx register.

While that field is indeed at that location for the FIFO 1 and 2, the
one for the FIFO0 is actually in the DISPSTAT1 register, at the offset
18.

Fixes: e538092cb1 ("drm/vc4: Enable precise vblank timestamping for interlaced modes.")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://lore.kernel.org/r/20220331143744.777652-3-maxime@cerno.tech
2022-04-06 15:18:01 +02:00
..
Kconfig
Makefile
vc4_bo.c
vc4_crtc.c drm/vc4: hvs: Fix frame count register readout 2022-04-06 15:18:01 +02:00
vc4_debugfs.c
vc4_dpi.c
vc4_drv.c
vc4_drv.h drm/vc4: hvs: Fix frame count register readout 2022-04-06 15:18:01 +02:00
vc4_dsi.c
vc4_fence.c
vc4_gem.c
vc4_hdmi.c
vc4_hdmi.h
vc4_hdmi_phy.c
vc4_hdmi_regs.h
vc4_hvs.c drm/vc4: hvs: Fix frame count register readout 2022-04-06 15:18:01 +02:00
vc4_irq.c
vc4_kms.c drm/vc4: kms: Take old state core clock rate into account 2022-04-06 15:18:01 +02:00
vc4_packet.h
vc4_perfmon.c
vc4_plane.c
vc4_qpu_defines.h
vc4_regs.h drm/vc4: hvs: Fix frame count register readout 2022-04-06 15:18:01 +02:00
vc4_render_cl.c
vc4_trace.h
vc4_trace_points.c
vc4_txp.c
vc4_v3d.c
vc4_validate.c
vc4_validate_shaders.c
vc4_vec.c