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flow_action_hw_stats_types_check() helper takes one of the FLOW_ACTION_HW_STATS_*_BIT values as input. If we align the arguments to the opening bracket of the helper there is no way to call this helper and stay under 80 characters. Remove the "types" part from the new flow_action helpers and enum values. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
766 lines
17 KiB
C
766 lines
17 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
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* stmmac TC Handling (HW only)
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*/
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#include <net/pkt_cls.h>
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#include <net/tc_act/tc_gact.h>
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#include "common.h"
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#include "dwmac4.h"
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#include "dwmac5.h"
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#include "stmmac.h"
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static void tc_fill_all_pass_entry(struct stmmac_tc_entry *entry)
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{
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memset(entry, 0, sizeof(*entry));
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entry->in_use = true;
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entry->is_last = true;
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entry->is_frag = false;
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entry->prio = ~0x0;
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entry->handle = 0;
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entry->val.match_data = 0x0;
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entry->val.match_en = 0x0;
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entry->val.af = 1;
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entry->val.dma_ch_no = 0x0;
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}
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static struct stmmac_tc_entry *tc_find_entry(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls,
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bool free)
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{
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struct stmmac_tc_entry *entry, *first = NULL, *dup = NULL;
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u32 loc = cls->knode.handle;
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int i;
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for (i = 0; i < priv->tc_entries_max; i++) {
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entry = &priv->tc_entries[i];
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if (!entry->in_use && !first && free)
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first = entry;
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if ((entry->handle == loc) && !free && !entry->is_frag)
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dup = entry;
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}
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if (dup)
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return dup;
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if (first) {
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first->handle = loc;
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first->in_use = true;
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/* Reset HW values */
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memset(&first->val, 0, sizeof(first->val));
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}
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return first;
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}
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static int tc_fill_actions(struct stmmac_tc_entry *entry,
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struct stmmac_tc_entry *frag,
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struct tc_cls_u32_offload *cls)
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{
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struct stmmac_tc_entry *action_entry = entry;
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const struct tc_action *act;
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struct tcf_exts *exts;
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int i;
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exts = cls->knode.exts;
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if (!tcf_exts_has_actions(exts))
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return -EINVAL;
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if (frag)
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action_entry = frag;
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tcf_exts_for_each_action(i, act, exts) {
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/* Accept */
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if (is_tcf_gact_ok(act)) {
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action_entry->val.af = 1;
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break;
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}
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/* Drop */
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if (is_tcf_gact_shot(act)) {
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action_entry->val.rf = 1;
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break;
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}
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/* Unsupported */
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return -EINVAL;
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}
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return 0;
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}
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static int tc_fill_entry(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls)
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{
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struct stmmac_tc_entry *entry, *frag = NULL;
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struct tc_u32_sel *sel = cls->knode.sel;
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u32 off, data, mask, real_off, rem;
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u32 prio = cls->common.prio << 16;
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int ret;
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/* Only 1 match per entry */
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if (sel->nkeys <= 0 || sel->nkeys > 1)
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return -EINVAL;
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off = sel->keys[0].off << sel->offshift;
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data = sel->keys[0].val;
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mask = sel->keys[0].mask;
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switch (ntohs(cls->common.protocol)) {
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case ETH_P_ALL:
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break;
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case ETH_P_IP:
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off += ETH_HLEN;
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break;
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default:
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return -EINVAL;
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}
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if (off > priv->tc_off_max)
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return -EINVAL;
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real_off = off / 4;
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rem = off % 4;
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entry = tc_find_entry(priv, cls, true);
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if (!entry)
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return -EINVAL;
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if (rem) {
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frag = tc_find_entry(priv, cls, true);
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if (!frag) {
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ret = -EINVAL;
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goto err_unuse;
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}
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entry->frag_ptr = frag;
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entry->val.match_en = (mask << (rem * 8)) &
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GENMASK(31, rem * 8);
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entry->val.match_data = (data << (rem * 8)) &
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GENMASK(31, rem * 8);
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entry->val.frame_offset = real_off;
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entry->prio = prio;
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frag->val.match_en = (mask >> (rem * 8)) &
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GENMASK(rem * 8 - 1, 0);
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frag->val.match_data = (data >> (rem * 8)) &
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GENMASK(rem * 8 - 1, 0);
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frag->val.frame_offset = real_off + 1;
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frag->prio = prio;
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frag->is_frag = true;
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} else {
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entry->frag_ptr = NULL;
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entry->val.match_en = mask;
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entry->val.match_data = data;
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entry->val.frame_offset = real_off;
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entry->prio = prio;
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}
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ret = tc_fill_actions(entry, frag, cls);
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if (ret)
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goto err_unuse;
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return 0;
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err_unuse:
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if (frag)
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frag->in_use = false;
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entry->in_use = false;
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return ret;
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}
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static void tc_unfill_entry(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls)
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{
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struct stmmac_tc_entry *entry;
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entry = tc_find_entry(priv, cls, false);
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if (!entry)
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return;
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entry->in_use = false;
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if (entry->frag_ptr) {
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entry = entry->frag_ptr;
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entry->is_frag = false;
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entry->in_use = false;
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}
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}
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static int tc_config_knode(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls)
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{
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int ret;
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ret = tc_fill_entry(priv, cls);
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if (ret)
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return ret;
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ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries,
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priv->tc_entries_max);
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if (ret)
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goto err_unfill;
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return 0;
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err_unfill:
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tc_unfill_entry(priv, cls);
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return ret;
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}
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static int tc_delete_knode(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls)
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{
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int ret;
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/* Set entry and fragments as not used */
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tc_unfill_entry(priv, cls);
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ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries,
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priv->tc_entries_max);
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if (ret)
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return ret;
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return 0;
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}
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static int tc_setup_cls_u32(struct stmmac_priv *priv,
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struct tc_cls_u32_offload *cls)
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{
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switch (cls->command) {
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case TC_CLSU32_REPLACE_KNODE:
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tc_unfill_entry(priv, cls);
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/* Fall through */
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case TC_CLSU32_NEW_KNODE:
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return tc_config_knode(priv, cls);
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case TC_CLSU32_DELETE_KNODE:
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return tc_delete_knode(priv, cls);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int tc_init(struct stmmac_priv *priv)
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{
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struct dma_features *dma_cap = &priv->dma_cap;
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unsigned int count;
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int i;
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if (dma_cap->l3l4fnum) {
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priv->flow_entries_max = dma_cap->l3l4fnum;
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priv->flow_entries = devm_kcalloc(priv->device,
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dma_cap->l3l4fnum,
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sizeof(*priv->flow_entries),
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GFP_KERNEL);
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if (!priv->flow_entries)
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return -ENOMEM;
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for (i = 0; i < priv->flow_entries_max; i++)
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priv->flow_entries[i].idx = i;
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dev_info(priv->device, "Enabled Flow TC (entries=%d)\n",
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priv->flow_entries_max);
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}
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/* Fail silently as we can still use remaining features, e.g. CBS */
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if (!dma_cap->frpsel)
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return 0;
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switch (dma_cap->frpbs) {
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case 0x0:
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priv->tc_off_max = 64;
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break;
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case 0x1:
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priv->tc_off_max = 128;
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break;
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case 0x2:
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priv->tc_off_max = 256;
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break;
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default:
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return -EINVAL;
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}
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switch (dma_cap->frpes) {
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case 0x0:
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count = 64;
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break;
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case 0x1:
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count = 128;
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break;
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case 0x2:
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count = 256;
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break;
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default:
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return -EINVAL;
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}
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/* Reserve one last filter which lets all pass */
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priv->tc_entries_max = count;
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priv->tc_entries = devm_kcalloc(priv->device,
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count, sizeof(*priv->tc_entries), GFP_KERNEL);
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if (!priv->tc_entries)
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return -ENOMEM;
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tc_fill_all_pass_entry(&priv->tc_entries[count - 1]);
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dev_info(priv->device, "Enabling HW TC (entries=%d, max_off=%d)\n",
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priv->tc_entries_max, priv->tc_off_max);
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return 0;
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}
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static int tc_setup_cbs(struct stmmac_priv *priv,
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struct tc_cbs_qopt_offload *qopt)
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{
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u32 tx_queues_count = priv->plat->tx_queues_to_use;
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u32 queue = qopt->queue;
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u32 ptr, speed_div;
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u32 mode_to_use;
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u64 value;
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int ret;
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/* Queue 0 is not AVB capable */
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if (queue <= 0 || queue >= tx_queues_count)
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return -EINVAL;
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if (!priv->dma_cap.av)
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return -EOPNOTSUPP;
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mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use;
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if (mode_to_use == MTL_QUEUE_DCB && qopt->enable) {
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ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_AVB);
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if (ret)
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return ret;
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priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
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} else if (!qopt->enable) {
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return stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_DCB);
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}
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/* Port Transmit Rate and Speed Divider */
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ptr = (priv->speed == SPEED_100) ? 4 : 8;
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speed_div = (priv->speed == SPEED_100) ? 100000 : 1000000;
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/* Final adjustments for HW */
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value = div_s64(qopt->idleslope * 1024ll * ptr, speed_div);
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priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0);
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value = div_s64(-qopt->sendslope * 1024ll * ptr, speed_div);
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priv->plat->tx_queues_cfg[queue].send_slope = value & GENMASK(31, 0);
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value = qopt->hicredit * 1024ll * 8;
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priv->plat->tx_queues_cfg[queue].high_credit = value & GENMASK(31, 0);
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value = qopt->locredit * 1024ll * 8;
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priv->plat->tx_queues_cfg[queue].low_credit = value & GENMASK(31, 0);
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ret = stmmac_config_cbs(priv, priv->hw,
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priv->plat->tx_queues_cfg[queue].send_slope,
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priv->plat->tx_queues_cfg[queue].idle_slope,
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priv->plat->tx_queues_cfg[queue].high_credit,
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priv->plat->tx_queues_cfg[queue].low_credit,
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queue);
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if (ret)
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return ret;
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dev_info(priv->device, "CBS queue %d: send %d, idle %d, hi %d, lo %d\n",
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queue, qopt->sendslope, qopt->idleslope,
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qopt->hicredit, qopt->locredit);
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return 0;
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}
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static int tc_parse_flow_actions(struct stmmac_priv *priv,
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struct flow_action *action,
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struct stmmac_flow_entry *entry,
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struct netlink_ext_ack *extack)
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{
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struct flow_action_entry *act;
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int i;
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if (!flow_action_has_entries(action))
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return -EINVAL;
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if (!flow_action_basic_hw_stats_check(action, extack))
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return -EOPNOTSUPP;
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flow_action_for_each(i, act, action) {
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switch (act->id) {
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case FLOW_ACTION_DROP:
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entry->action |= STMMAC_FLOW_ACTION_DROP;
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return 0;
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default:
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break;
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}
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}
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/* Nothing to do, maybe inverse filter ? */
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return 0;
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}
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static int tc_add_basic_flow(struct stmmac_priv *priv,
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struct flow_cls_offload *cls,
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struct stmmac_flow_entry *entry)
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{
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struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
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struct flow_dissector *dissector = rule->match.dissector;
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struct flow_match_basic match;
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/* Nothing to do here */
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if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC))
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return -EINVAL;
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flow_rule_match_basic(rule, &match);
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entry->ip_proto = match.key->ip_proto;
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return 0;
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}
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static int tc_add_ip4_flow(struct stmmac_priv *priv,
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struct flow_cls_offload *cls,
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struct stmmac_flow_entry *entry)
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{
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struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
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struct flow_dissector *dissector = rule->match.dissector;
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bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
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struct flow_match_ipv4_addrs match;
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u32 hw_match;
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int ret;
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/* Nothing to do here */
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if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_IPV4_ADDRS))
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return -EINVAL;
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flow_rule_match_ipv4_addrs(rule, &match);
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hw_match = ntohl(match.key->src) & ntohl(match.mask->src);
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if (hw_match) {
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ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
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false, true, inv, hw_match);
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if (ret)
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return ret;
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}
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hw_match = ntohl(match.key->dst) & ntohl(match.mask->dst);
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if (hw_match) {
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ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
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false, false, inv, hw_match);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int tc_add_ports_flow(struct stmmac_priv *priv,
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struct flow_cls_offload *cls,
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struct stmmac_flow_entry *entry)
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{
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struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
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struct flow_dissector *dissector = rule->match.dissector;
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bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
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struct flow_match_ports match;
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u32 hw_match;
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bool is_udp;
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int ret;
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/* Nothing to do here */
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if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_PORTS))
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return -EINVAL;
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switch (entry->ip_proto) {
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case IPPROTO_TCP:
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is_udp = false;
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break;
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case IPPROTO_UDP:
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is_udp = true;
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break;
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default:
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return -EINVAL;
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}
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flow_rule_match_ports(rule, &match);
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hw_match = ntohs(match.key->src) & ntohs(match.mask->src);
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if (hw_match) {
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ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
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is_udp, true, inv, hw_match);
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if (ret)
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return ret;
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}
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hw_match = ntohs(match.key->dst) & ntohs(match.mask->dst);
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if (hw_match) {
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ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
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is_udp, false, inv, hw_match);
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if (ret)
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return ret;
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}
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entry->is_l4 = true;
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return 0;
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}
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static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv,
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struct flow_cls_offload *cls,
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bool get_free)
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{
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int i;
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for (i = 0; i < priv->flow_entries_max; i++) {
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struct stmmac_flow_entry *entry = &priv->flow_entries[i];
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if (entry->cookie == cls->cookie)
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return entry;
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if (get_free && (entry->in_use == false))
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return entry;
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}
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return NULL;
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}
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static struct {
|
|
int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls,
|
|
struct stmmac_flow_entry *entry);
|
|
} tc_flow_parsers[] = {
|
|
{ .fn = tc_add_basic_flow },
|
|
{ .fn = tc_add_ip4_flow },
|
|
{ .fn = tc_add_ports_flow },
|
|
};
|
|
|
|
static int tc_add_flow(struct stmmac_priv *priv,
|
|
struct flow_cls_offload *cls)
|
|
{
|
|
struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
|
|
struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
|
|
int i, ret;
|
|
|
|
if (!entry) {
|
|
entry = tc_find_flow(priv, cls, true);
|
|
if (!entry)
|
|
return -ENOENT;
|
|
}
|
|
|
|
ret = tc_parse_flow_actions(priv, &rule->action, entry,
|
|
cls->common.extack);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tc_flow_parsers); i++) {
|
|
ret = tc_flow_parsers[i].fn(priv, cls, entry);
|
|
if (!ret) {
|
|
entry->in_use = true;
|
|
continue;
|
|
}
|
|
}
|
|
|
|
if (!entry->in_use)
|
|
return -EINVAL;
|
|
|
|
entry->cookie = cls->cookie;
|
|
return 0;
|
|
}
|
|
|
|
static int tc_del_flow(struct stmmac_priv *priv,
|
|
struct flow_cls_offload *cls)
|
|
{
|
|
struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
|
|
int ret;
|
|
|
|
if (!entry || !entry->in_use)
|
|
return -ENOENT;
|
|
|
|
if (entry->is_l4) {
|
|
ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, false,
|
|
false, false, false, 0);
|
|
} else {
|
|
ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, false,
|
|
false, false, false, 0);
|
|
}
|
|
|
|
entry->in_use = false;
|
|
entry->cookie = 0;
|
|
entry->is_l4 = false;
|
|
return ret;
|
|
}
|
|
|
|
static int tc_setup_cls(struct stmmac_priv *priv,
|
|
struct flow_cls_offload *cls)
|
|
{
|
|
int ret = 0;
|
|
|
|
/* When RSS is enabled, the filtering will be bypassed */
|
|
if (priv->rss.enable)
|
|
return -EBUSY;
|
|
|
|
switch (cls->command) {
|
|
case FLOW_CLS_REPLACE:
|
|
ret = tc_add_flow(priv, cls);
|
|
break;
|
|
case FLOW_CLS_DESTROY:
|
|
ret = tc_del_flow(priv, cls);
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int tc_setup_taprio(struct stmmac_priv *priv,
|
|
struct tc_taprio_qopt_offload *qopt)
|
|
{
|
|
u32 size, wid = priv->dma_cap.estwid, dep = priv->dma_cap.estdep;
|
|
struct plat_stmmacenet_data *plat = priv->plat;
|
|
struct timespec64 time;
|
|
bool fpe = false;
|
|
int i, ret = 0;
|
|
u64 ctr;
|
|
|
|
if (!priv->dma_cap.estsel)
|
|
return -EOPNOTSUPP;
|
|
|
|
switch (wid) {
|
|
case 0x1:
|
|
wid = 16;
|
|
break;
|
|
case 0x2:
|
|
wid = 20;
|
|
break;
|
|
case 0x3:
|
|
wid = 24;
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
switch (dep) {
|
|
case 0x1:
|
|
dep = 64;
|
|
break;
|
|
case 0x2:
|
|
dep = 128;
|
|
break;
|
|
case 0x3:
|
|
dep = 256;
|
|
break;
|
|
case 0x4:
|
|
dep = 512;
|
|
break;
|
|
case 0x5:
|
|
dep = 1024;
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
if (!qopt->enable)
|
|
goto disable;
|
|
if (qopt->num_entries >= dep)
|
|
return -EINVAL;
|
|
if (!qopt->base_time)
|
|
return -ERANGE;
|
|
if (!qopt->cycle_time)
|
|
return -ERANGE;
|
|
|
|
if (!plat->est) {
|
|
plat->est = devm_kzalloc(priv->device, sizeof(*plat->est),
|
|
GFP_KERNEL);
|
|
if (!plat->est)
|
|
return -ENOMEM;
|
|
} else {
|
|
memset(plat->est, 0, sizeof(*plat->est));
|
|
}
|
|
|
|
size = qopt->num_entries;
|
|
|
|
priv->plat->est->gcl_size = size;
|
|
priv->plat->est->enable = qopt->enable;
|
|
|
|
for (i = 0; i < size; i++) {
|
|
s64 delta_ns = qopt->entries[i].interval;
|
|
u32 gates = qopt->entries[i].gate_mask;
|
|
|
|
if (delta_ns > GENMASK(wid, 0))
|
|
return -ERANGE;
|
|
if (gates > GENMASK(31 - wid, 0))
|
|
return -ERANGE;
|
|
|
|
switch (qopt->entries[i].command) {
|
|
case TC_TAPRIO_CMD_SET_GATES:
|
|
if (fpe)
|
|
return -EINVAL;
|
|
break;
|
|
case TC_TAPRIO_CMD_SET_AND_HOLD:
|
|
gates |= BIT(0);
|
|
fpe = true;
|
|
break;
|
|
case TC_TAPRIO_CMD_SET_AND_RELEASE:
|
|
gates &= ~BIT(0);
|
|
fpe = true;
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
priv->plat->est->gcl[i] = delta_ns | (gates << wid);
|
|
}
|
|
|
|
/* Adjust for real system time */
|
|
time = ktime_to_timespec64(qopt->base_time);
|
|
priv->plat->est->btr[0] = (u32)time.tv_nsec;
|
|
priv->plat->est->btr[1] = (u32)time.tv_sec;
|
|
|
|
ctr = qopt->cycle_time;
|
|
priv->plat->est->ctr[0] = do_div(ctr, NSEC_PER_SEC);
|
|
priv->plat->est->ctr[1] = (u32)ctr;
|
|
|
|
if (fpe && !priv->dma_cap.fpesel)
|
|
return -EOPNOTSUPP;
|
|
|
|
ret = stmmac_fpe_configure(priv, priv->ioaddr,
|
|
priv->plat->tx_queues_to_use,
|
|
priv->plat->rx_queues_to_use, fpe);
|
|
if (ret && fpe) {
|
|
netdev_err(priv->dev, "failed to enable Frame Preemption\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = stmmac_est_configure(priv, priv->ioaddr, priv->plat->est,
|
|
priv->plat->clk_ptp_rate);
|
|
if (ret) {
|
|
netdev_err(priv->dev, "failed to configure EST\n");
|
|
goto disable;
|
|
}
|
|
|
|
netdev_info(priv->dev, "configured EST\n");
|
|
return 0;
|
|
|
|
disable:
|
|
priv->plat->est->enable = false;
|
|
stmmac_est_configure(priv, priv->ioaddr, priv->plat->est,
|
|
priv->plat->clk_ptp_rate);
|
|
return ret;
|
|
}
|
|
|
|
static int tc_setup_etf(struct stmmac_priv *priv,
|
|
struct tc_etf_qopt_offload *qopt)
|
|
{
|
|
if (!priv->dma_cap.tbssel)
|
|
return -EOPNOTSUPP;
|
|
if (qopt->queue >= priv->plat->tx_queues_to_use)
|
|
return -EINVAL;
|
|
if (!(priv->tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL))
|
|
return -EINVAL;
|
|
|
|
if (qopt->enable)
|
|
priv->tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN;
|
|
else
|
|
priv->tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN;
|
|
|
|
netdev_info(priv->dev, "%s ETF for Queue %d\n",
|
|
qopt->enable ? "enabled" : "disabled", qopt->queue);
|
|
return 0;
|
|
}
|
|
|
|
const struct stmmac_tc_ops dwmac510_tc_ops = {
|
|
.init = tc_init,
|
|
.setup_cls_u32 = tc_setup_cls_u32,
|
|
.setup_cbs = tc_setup_cbs,
|
|
.setup_cls = tc_setup_cls,
|
|
.setup_taprio = tc_setup_taprio,
|
|
.setup_etf = tc_setup_etf,
|
|
};
|