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[Why] Underflow can occur in the case where we change buffer pitch, DCC state, rotation or mirroring for a plane while also performing an immediate flip. It can also generate a p-state warning stack trace on DCN1 which is typically observed during the cursor handler pipe locking because of how frequent cursor updates can occur. [How] Store the update type on each CRTC - every plane will have access to the CRTC state if it's flipping. If the update type is not UPDATE_TYPE_FAST then the immediate flip should be disallowed. No changes to the target vblank sequencing need to be done, we just need to ensure that the surface registers do a double buffered update. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <david.francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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